NOVELLUS SYSTEMS INC - 10-K Annual Report

UNITED STATES SECURITIES AND EXCHANGE COMMISSION
Washington, D.C. 20549

Form 10-K

FOR ANNUAL AND TRANSITION
REPORTS PURSUANT TO SECTIONS 13 OR 15(d)
OF THE SECURITIES EXCHANGE ACT OF 1934

(Mark One)

ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE
SECURITIES EXCHANGE ACT OF 1934

For the fiscal year ended December 31, 2004

OR

TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE
SECURITIES EXCHANGE ACT OF 1934

For the transition period from ____________ to ____________

Commission File Number 000-17157

Novellus Systems, Inc.
(Exact name of Registrant as specified in its charter)

California	77-0024666
(State or other jurisdiction of	(I.R.S. Employer
incorporation of organization)	Identification Number)

4000 North First Street, San Jose, California 95134
(Address of principal executive offices including Zip code)

(408) 943-9700
(Registrant’s telephone number, including area code)

Securities registered pursuant to Section 12(b) of the Act

None
Securities registered pursuant to Section 12(g) of the Act:

Common Stock, no par value
(Title of Class)

Indicate by check mark whether the Registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the Registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. Yes x No o

Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of Registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K. x

Indicate by check mark whether the Registrant is an accelerated filer (as defined in Exchange Act Rule 12b-2). Yes x No o

As of June 25, 2004 the aggregate market value of voting and non-voting stock held by non-affiliates of the Registrant was $ 4,313,778,859, based on the average of the high and low price of the Common Stock as reported on the NASDAQ National Market on such date. Shares of Common Stock held by officers, directors and holders of more than 5% of the outstanding Common Stock have been excluded from this calculation because such persons may be deemed to be affiliates. This determination of affiliate status is not necessarily a conclusive determination for other purposes.

The number of shares of the Registrant’s Common Stock outstanding on March 4, 2005 was 140,530,177.

Documents Incorporated by Reference: Part III of this Annual Report on Form 10-K incorporates information by reference from the Registrant’s Proxy Statement for its 2005 Annual Meeting of Shareholders. Except as expressly incorporated by reference, the Registrant’s Proxy Statement shall not be deemed to be a part of this Annual Report on Form 10-K.

NOVELLUS SYSTEMS, INC.

2004 ANNUAL REPORT ON FORM 10-K

TABLE OF CONTENTS

		Page
	PART I
Item 1:	Business	2
Item 2:	Properties	10
Item 3:	Legal Proceedings	11
Item 4:	Submission of Matters to a Vote of Security Holders	12

	PART II
Item 5:	Market for Registrant’s Common Equity, Related Shareholder Matters and Issuer Purchases of Equity Securities	13
Item 6:	Selected Financial Data	14
Item 7:	Management’s Discussion and Analysis of Financial Condition and Results of Operations	15
Item 7A:	Quantitative and Qualitative Disclosures about Market Risk	37
Item 8:	Financial Statements and Supplementary Data	40
Item 9:	Changes in and Disagreements with Accountants on Accounting and Financial Disclosure	76
Item 9A:	Controls and Procedures	76
Item 9B:	Other Information	77

	PART III
Item 10:	Directors and Executive Officers of the Registrant	78
Item 11:	Executive Compensation	78
Item 12:	Security Ownership of Certain Beneficial Owners and Management	78
Item 13:	Certain Relationships and Related Transactions	78
Item 14:	Principal Accounting Fees and Services	78

	PART IV
Item 15:	Exhibits and Financial Statement Schedules	79

Signatures		83

PART I

The following information should be read in conjunction with the Consolidated Financial Statements and notes thereto included in this Annual Report on Form 10-K.

Item 1.

Business

The Company

Novellus Systems, Inc., a California corporation organized in 1984, develops, manufactures, sells and supports equipment used in the fabrication of integrated circuits, commonly called microchips or chips. The customers for these products are semiconductor device manufacturers who produce chips for sale or for incorporation in their own products, or who provide chip manufacturing services to third parties.

Integrated circuits are generally built on a silicon wafer base and include a large number of different components, such as transistors, capacitors and other electronic devices that are connected by multiple layers of wiring, or interconnects. To build an integrated circuit, transistors are first created on the surface of the silicon wafer. Wiring and insulating structures are then added as multiple thin-film layers through a series of manufacturing process steps. Typically, a first layer of dielectric (insulating) material is deposited on top of the transistors. Subsequent layers of metal (historically, aluminum) are deposited on top of this base layer, etched to create the conductive lines that carry the electricity, and then filled with dielectric material to create the necessary insulators between the lines, in a manufacturing process called subtractive aluminum. When copper wires are being constructed, the manufacturing process, called copper damascene, is a mirror image of that described above: the insulator (dielectric) is etched, and the copper wiring is created in the etched insulator via a high-technology electrochemical deposition process called Electrofill^TM. Building either copper or aluminum wiring requires these manufacturing steps to be repeated many times: advanced chip designs may require as many as 500 process steps.

Novellus has historically focused on a single aspect of the semiconductor device process, the deposition of conducting and insulating material films. Novellus’ advanced deposition systems use chemical vapor deposition (CVD), physical vapor deposition (PVD), and electrochemical deposition (ECD) processes to form the interconnects in the device structure. Our High-Density Plasma CVD (HDP) and Plasma-Enhanced CVD (PECVD) systems employ a chemical plasma to deposit all of the dielectric or insulating layers. Our CVD Tungsten systems are used to deposit tungsten plug films. Our PVD systems use direct-current power to deposit conductive metal layers by sputtering metallic atoms from the surface of a target source. Our Electrofill^TM (ECD) systems are used for depositing conductive layers of copper on wafers in a damascene manufacturing process.

Beginning in 2001, Novellus expanded beyond deposition technologies into the area of wafer surface preparation. That year, we acquired GaSonics International Corporation, a manufacturer of systems used to clean and prepare a wafer surface. In 2002, we acquired SpeedFam-IPEC, Inc., a manufacturer of chemical mechanical planarization (CMP) products. In 2004, we further diversified by acquiring Peter Wolters AG, a 200-year-old German company specializing in lapping and polishing equipment for a number of different industries. With the acquisition of Peter Wolters, Novellus entered into market sectors beyond semiconductor manufacturing for the first time. In December 2004, the board approved the creation of Novellus Development Company LLC, with funding of up to $10 million, for investment in private companies at various stages of development.

Our headquarters are located at 4000 North First Street, San Jose, California 95134 and our telephone number is (408) 943-9700.

Additional information about Novellus is available on our web site at www.novellus.com. We make available free of charge on our web site our Annual Reports on Form 10-K, our Quarterly Reports on Form 10-Q, and our Current Reports on Form 8-K, as well as amendments to those Reports filed or furnished pursuant to Section 13(a) or 15(d) of the Securities Exchange Act of 1934, as amended. These reports are available as soon as reasonably practicable after we electronically file them with — or furnish them to — the Securities and Exchange Commission, or the SEC. Information contained on our web site is not part of this Annual Report on Form 10-K or of our other filings with the SEC.

Semiconductor Industry Background

Over the past twenty years, the semiconductor industry has grown rapidly as a result of increasing demand for personal computers, the expansion of the Internet and the telecommunications industry, and the emergence of new applications in consumer electronics. More recently, growth has slowed, and there are signs that the industry is beginning to mature. While unit demand for semiconductor devices continues to rise, the average selling prices of chips continue to decline. There is growing pressure on semiconductor device manufacturers to reduce manufacturing costs while increasing the value of their products. The semiconductor industry has also been historically cyclical, with periods of rapid expansion followed by periods of over-capacity.

Several technological trends characterize semiconductor manufacturing. Perhaps the most prominent of these trends is the increasing density of the integrated circuit. Moore’s Law, first postulated in the mid-1960s and still substantially accurate almost 40 years later, states that the density of circuitry on an individual semiconductor chip doubles every 18 months. Today’s advanced devices are being manufactured with line widths as small as 90 nanometers, and with up to ten layers of interconnect circuitry. By increasing circuit density, manufacturers can pack more electronic components on a chip and thereby provide higher performance and value.

Another trend worth noting is the transition to copper wiring from aluminum wiring as the primary conductive material in semiconductor devices. Copper has a lower electrical resistance value than aluminum, which provides a number of performance advantages. Because of the superior properties of copper, a chip made with copper may need only half as many metal layers as one made with aluminum, providing considerable reduction in manufacturing cost. In addition, copper wiring produces a substantial improvement in device performance and a significant reduction in power requirements in comparison to aluminum.

A similar transition is underway from traditional insulating films made of silicon oxide to insulators with a low dielectric constant, or “low-k”. Low-k dielectrics reduce the capacitance between metal lines in a device. This improves the speed and performance of the chip. However, low-k materials are more fragile than silicon oxide, and this poses a host of new challenges to the semiconductor industry in integrating the new materials into a manufacturing process flow.

Another important trend is the move to larger wafer sizes. Semiconductor device manufacturers are now migrating to larger, 300mm wafers because of the potential manufacturing cost advantages of these larger wafers compared to 200mm. The 300mm wafers provide in excess of 2.25 times the number of chips per wafer, and hence may provide significant economies of scale in the manufacturing process.

These trends shape the equipment and process demands of our customers. Our customers generally measure the cost and performance of their production equipment in terms of “cost per wafer,” a ratio determined by factoring in the costs for acquisition and installation of a system, operating costs, and net throughput rate. In a fixed period of time, a system with higher net throughput allows a manufacturer to recover the purchase price over a greater number of wafers, thereby reducing the cost of ownership of the system on a per-wafer basis. Yield and film qualities are also significant factors in selecting processing equipment. The increased cost of larger and more complex semiconductor wafers have made high yields extremely important to our customers. To achieve elevated yields and better film quality, systems must be able to repeat a process consistently and reliably. This characteristic, known as repeatability, is critical in achieving commercially acceptable yields. Systems that operate at desired throughput rates without approaching critical tolerance limits can achieve repeatability more easily.

Semiconductor Business Strategy

Our business objective is to use our core expertise to increase our market share in semiconductor manufacturing process equipment, and strengthen our position as a leading supplier to the semiconductor industry. The following are the key elements of our strategy:

Emphasize High-Productivity Systems — We established our current position in the industry by emphasizing high productivity as the principal benefit that our products and technologies deliver to customers. Our unique multi-station sequential deposition, or MSSD^TM, system for continuous PECVD processing illustrates our commitment to productivity. The MSSD^TM design enables our PECVD systems to attain very high levels of wafer throughput, uniformity and overall film quality. The simple architecture of our systems also takes up less space in the fabrication

facility and requires less downtime than other system designs. We intend to retain our historical focus on productivity by applying our MSSD^TM architecture in product enhancements and new product offerings.

Be Recognized as the Technology Leader in our Served Available Markets — In the era of nanoelectronics manufacturing, technology leadership becomes critically important due to the difficulties in manufacturing chips at challenging design rules. It is our strategy, then, to provide our customers with leading edge technologies in each of our served available markets.

Focus on Reducing Customer Costs — Cost is an important component when measuring overall productivity. To that end, we strive to provide products and technologies that reduce our customers’ overall cost of ownership by offering semiconductor device manufacturers a number of process improvements and process differentiators, as well as by providing highly reliable systems that require less servicing than competing alternatives in the market. We also strive to design our systems to be extendible over multiple process generations.

Broaden our Interconnect Offerings — As semiconductor manufacturing technology becomes more complex, the interconnect structures on a chip take on greater importance in the manufacturing process. We believe that by expanding beyond our historical focus on deposition products, we can add value in related interconnect manufacturing process steps. The acquisitions of GaSonics and SpeedFam-IPEC are examples of this strategy in action. Our goal is to be the leading industry supplier of interconnect manufacturing equipment.

Differentiate our Service Philosophy — Our philosophy is to develop reliable products that require less servicing than competing alternatives. We strive to provide support that minimizes the downtime and service costs that our customers experience.

Expand Market Presence in Asia — While we derive a significant percentage of net sales from Asia, we believe that substantial additional growth potential exists in the region over the long term. Japan, Taiwan and Korea continue to represent a significant portion of the world’s capacity for semiconductor manufacturing, and China is rapidly becoming a major manufacturing region for the industry. Our local presence in Asia includes sales and support offices throughout Japan. In addition, we maintain four offices in Korea, three in China, three in Taiwan, and one each in Malaysia, Singapore and India.

Leverage our Low Cost Manufacturing Structure — We perform all system design, assembly and testing in-house, and outsource the manufacture of major subassemblies. This manufacturing strategy allows us to minimize our fixed costs and capital expenditures and gives us the flexibility to increase capacity as needed. Outsourcing also allows us to focus on product differentiation through system design and quality control, and helps to ensure that our subsystems incorporate the latest third-party technologies in robotics, gas panels and microcomputers. We work closely with our suppliers to achieve mutual cost reduction through joint development projects.

Semiconductor Manufacturing Products

Deposition Technologies

Our historical strength is rooted in deposition products, where we have consistently maintained a leadership position in the industry. We currently offer products that address the needs of manufacturers across a number of different deposition technologies — CVD, PVD and ECD.

Since the introduction of our Concept One dielectric platform in 1987, we have offered a range of processing systems for dielectric and metal deposition. In 1991, we introduced the Concept Two platform — a modular, integrated production system capable of depositing both dielectric and conductive metal layers by combining one or more processing chambers with a common, automated wafer handler. The Concept Two enabled semiconductor device manufacturers to increase production throughput and system capability by adding process modules, without having to replace existing equipment. In 1997, we introduced the Concept Three platform, which built on the foundation of Concept Two to offer greater throughput in 300mm wafer manufacturing applications.

CVD Products

In the CVD process, manufacturers place wafers in a reaction chamber, introduce a variety of pure and precisely metered gases into the chamber, and then add some form of energy to activate a chemical reaction that deposits a film on the wafer. The CVD process is the traditional method used to deposit dielectric films on wafers.

Manufacturers also use CVD to deposit conductive metal layers, particularly tungsten, as it is difficult to deposit such layers on devices with very small features when using conventional PVD or other deposition technologies.

HDP CVD Products

Concept Two SPEED^® — Introduced in 1996, Concept Two SPEED was the semiconductor industry’s first high-density plasma system capable of high-volume manufacturing. Today, Concept Two SPEED is one of the top two product offerings for the HDP CVD marketplace. Concept Two SPEED is a single-wafer processing system for 200mm substrates, and was originally designed to deposit dielectric materials in an aluminum interconnect manufacturing process. However, today, Concept Two SPEED is primarily used to deposit shallow trend isolation (STI) as part of the transistor formation, as well as deposit pre-metal layer dielectrics (PMD) in both aluminum or copper based devices.

Concept Three SPEED^® — Introduced in 1997, the Concept Three SPEED is designed to apply dielectric material in the 300mm wafer manufacturing processes. Because it is based on our production-proven Concept Two product, Concept Three SPEED offers minimal risk to our customers in making the transition from 200mm to 300mm wafers.

SPEED^® NExT^TM — Introduced in 2004, the SPEED NExT system for 300 mm wafers is designed specifically to address the challenges of dielectric gap fill at 65 nm and beyond. SPEED NExT builds upon the superior high conductance chamber design of the existing SPEED platform with an innovative source technology that enables repeatable gap fill across a 300-mm wafer. In addition, the ability to control the wafer position relative to the source allows SPEED NExT to have a wider gap fill process window.

W-CVD Products

Concept Two ALTUS — In 1994, we introduced the Concept Two ALTUS, used to deposit the tungsten plugs and vias that connect aluminum interconnect lines in aluminum-based chips. The Concept Two ALTUS combines the modular architecture of the Concept Two with an advanced tungsten CVD dual-process chamber. The ALTUS’ pulsed nucleation layer (PNL^TM) technology also permits the system to deposit conformal film in device structures with extremely high aspect ratios, an advantage that has translated into a market leadership position for Novellus in tungsten deposition.

Concept Three ALTUS — The Concept Three ALTUS, introduced in 1997, provides the same advantages to 300mm wafer tungsten deposition as its Concept Two ALTUS predecessor delivers for 200mm wafer applications.

ALTUS DirectFill^TM — Introduced in 2004, the ALTUS DirectFill tungsten nitride/tungsten deposition system is designed for advanced contact and via-fill applications at 65 nm and below. ALTUS DirectFill simplifies the tungsten deposition process by replacing the standard multi-tool Ti/TiN/W approach with a single three-module system. The advanced plug-fill technology of the ALTUS DirectFill can reduce contact resistance and lower the overall cost of ownership by 50% or more when compared to existing processes.

PECVD Products

Concept Two SEQUEL Express^® — Introduced in 1999, the Concept Two SEQUEL Express is designed to deposit our CORAL^® family of low-k dielectric films, as well as other advanced films required for manufacturing 0.18 micron-and-smaller semiconductor devices. With a throughput in excess of 110 wafers per hour, Concept Two SEQUEL Express delivers up to 40 percent higher capital productivity and 40 percent lower cost of ownership than competing PECVD systems.

VECTOR^® — Introduced in 2000, VECTOR is a PECVD system for depositing dielectric films on 300mm wafers. VECTOR delivers all the dielectric films required for a low-k device at 90 nanometer-and-smaller design rules. Our VECTOR has approximately two-thirds the footprint of the nearest competitor and 33% fewer critical subsystems.

PVD Products

PVD, also known as “sputtering,” is a process where ions of an inert gas such as argon are electrically accelerated in a high vacuum toward a target of pure metal, such as tantalum or copper. Upon impact, the argon

ions sputter off the target material, which is then deposited as a thin film on the silicon wafer. PVD processes are used to create the barrier and seed layers in copper damascene interconnect applications. We entered the PVD marketplace with the acquisition of Varian Associates’ Thin Film Systems Division in 1997.

INOVA^® — The INOVA 200mm system was originally developed by the Thin Films Systems division of Varian Associates, acquired by Novellus in 1997. Novellus reintroduced the product in 1998 with the addition of a patented Hollow Cathode Magnetron (HCM^TM) ionized PVD source that was designed specifically for the deposition of copper barrier and seed films. The INOVA continues to gain market acceptance based on its superior barrier seed step coverage in advanced geometries.

INOVA xT — In 2000, we introduced the 300mm INOVA xT, which features HCM technology. The INOVA xT continues to offer superior barrier performance which leads to low via resistance and improved device reliability.

Electrochemical Deposition Products

Our Electrofill^TM products are used to build the copper primary conduction layers in advanced integrated circuits. Electrofill uses a copper electrolytic solution to create lines and vias in a dielectric layer which has been etched with the pattern of the circuitry, in a process called copper damascene. Our highly reliable and cost-effective Electrofill^TM products employ aqueous chemistries to deposit the copper wiring into the dielectric structure.

SABRE — The SABRE copper Electrofill^TM system, introduced in 1998, is one of the most reliable and technologically advanced copper ECD systems available on the market. SABRE meets today’s technology requirements for copper metal layers at 65 nanometer and beyond. The SABRE employs a proprietary electrofill cell that prevents contamination of the back of the wafer with copper. It features a unique plating cell design that improves the repeatability of the copper fill. The simplicity of SABRE’s design is the key to the system’s high reliability and manufacturing availability. When coupled with the INOVA PVD system, SABRE provides a complete system for depositing advanced copper interconnects.

SABRE xT — The second generation SABRE xT, introduced in 1999, is the industry’s leading ECD platform for both 200mm and 300mm wafers. New features on the SABRE xT that were not found on the original SABRE include advanced plating chemistries, an integrated anneal module and closed-loop chemical monitoring.

SABRE NExT — Introduced in 2003, the SABRE NexT, or the Nano Era xT, builds on the SABRE xT’s production track record, offering a proprietary chemistry, a new anode cell design and other hardware refinements to tackle the complex process requirements of 90 nanometer, 65 nanometer and 45 nanometer interconnect structures. In comparison to the SABRE xT, the SABRE NExT reduces chemical costs by over 30%, and when combined with its improved throughput, cuts overall cost of ownership by over 10% on what is already a highly productive process.

Surface Preparation Technologies

Photoresist strip and clean processes represent an area of semiconductor manufacturing that is becoming increasingly important with the industry’s migration to copper interconnects. Semiconductor device manufacturers use surface preparation products to remove photoresist and other potential contaminants from a wafer before proceeding with the next deposition step in the manufacturing process. We entered this application in 2001, and today we are one of the industry’s leading suppliers of dry-clean surface preparation products.

GAMMA^TM 2100 — The GAMMA 2100 200mm photoresist removal system uses a plasma source to strip photoresist. The GAMMA architecture features a multi-station sequential processing design with six strip stations, resulting in high wafer throughput with a minimal number of critical subsystems.

GAMMA 2130 — The GAMMA 2130 system is our photoresist strip system for 300mm wafers. Our multi-station sequential processing architecture incorporates six stations within a single process chamber, enabling a 30% higher throughput rate than the closest competitor.

PEP IRIDIA^® — The PEP IRIDIA is an advanced cleaning system designed for sub-0.18-micron 200mm wafer applications. The IRIDIA’s modular architecture allows manufacturers to configure the system for both front-and

back-end-of-line cleaning applications down to 90 nanometers. Targeted at critical steps in the copper and low-k manufacturing processes, the IRIDIA offers the highest productivity of any 200mm dry-clean system currently on the market.

CMP Technologies

CMP systems polish the surface of a wafer after a deposition step to create a planar surface before moving on to subsequent manufacturing steps. Since copper films are more difficult to polish than the tungsten and oxide films used in previous-generation aluminum interconnects and since low-k dielectrics are much more porous than their predecessors, CMP has been elevated to the forefront of the enabling technologies required in a copper damascene manufacturing process. In recognition of this trend, we acquired SpeedFam-IPEC, a global supplier of CMP systems used in the fabrication of advanced copper interconnects, in 2002. We believe that the opportunity to understand the interactions between planarization, deposition and surface preparation steps and optimize them for overall performance gives us an important advantage in extending copper and low-k processes to advanced semiconductor devices.

MOMENTUM^TM — MOMENTUM is a high-throughput, dry-in/dry-out CMP system for all 200mm wafer process applications. Designed with extendibility to accommodate future reductions in line widths, the MOMENTUM has four independent wafer-polishing platens that allow for maximum manufacturing flexibility. MOMENTUM also employs an orbital polishing motion and features a through-the-pad slurry delivery system that results in more efficient consumption of polishing chemicals, minimized dishing and reduced erosion.

XCEDA^TM — Introduced in 2004, the XCEDA copper CMP system is an advanced 300-mm platform designed to exceed both the technical and economic requirements of CMP at 65 nm and beyond. The XCEDA’s four polishing modules and through-the-pad slurry delivery system can reduce slurry usage by up to 40%, dramatically reducing cost-of-ownership. The XCEDA system has also demonstrated quality planarization results on porous ultra low-k (ULK) materials with k-values of less than 2.0.

Marketing, Sales and Service

We rely on a direct sales force to sell our products in all geographic regions in the world where semiconductors are manufactured, including Europe, the United States, Korea, Japan, China, Taiwan, and Southeast Asia.

The ability to provide prompt and effective field support is critical to our sales efforts, and we believe the support that we provide to our installed base has accelerated the penetration of certain key accounts. We also believe that our marketing efforts are enhanced by the technical expertise of our research and development personnel, who provide customer process applications support and participate in a number of industry forums, conferences and technical symposia.

Customers

For the year ended December 31, 2004, Taiwan Semiconductor Manufacturing Company, Ltd., UMC (United Microelectronics Corporation) and Intel Corporation, each accounted for 10% of our net sales. For the year ended December 31, 2003, Samsung and Intel Corporation accounted for 27% and 12% of our system sales, respectively. For the year ended December 31, 2002, Samsung, Intel Corporation, Taiwan Semiconductor Manufacturing Company, Ltd. and IBM Corporation accounted for 17%, 11%, 11% and 10% of our system sales, respectively. Historically, we have sold a significant proportion of systems in any particular period to a limited number of customers. System sales to our ten largest customers in 2004, 2003 and 2002 accounted for 69%, 76% and 79% of our system sales, respectively. We expect that sales of our products to relatively few customers — none of which has entered into a long-term agreement requiring it to purchase our products — will continue to account for a high percentage of our net sales in the foreseeable future.

Export sales outside of the United States for the year ended December 31, 2004 were $1.0 billion, or 77% of net sales. For the year ended December 31, 2003, export sales were $603.5 million, or 65% of net sales, while export sales for the year ended December 31, 2002 were $513.6 million, or 61% of net sales.

Backlog

As of December 31, 2004, our backlog was $474.7 million, with approximately $3.4 million of cancellations in the period subsequent to December 31, 2004 to the date of this Annual Report on Form 10-K. As of December 31, 2003, our backlog was $341.0 million, with approximately $8.6 million of cancellations subsequent to December 31, 2003. Our backlog includes only those customer orders for which we have accepted purchase orders and assigned shipment dates within twelve months. All orders are subject to cancellation or rescheduling by customers, with limited or no penalties. Some products are shipped in the same quarter in which the order was received. For this reason, and because of possible changes in delivery schedules, cancellations of orders and delays in shipments, our backlog as of any particular date is not necessarily a reliable indicator of actual shipments for any succeeding period.

Research and Development

The highly cyclical semiconductor manufacturing industry is subject to rapid technological change and continual new product introductions and enhancements. Our ability to remain competitive depends on our success in developing new and enhanced systems, and introducing them at competitive prices on a timely basis. For this reason, we devote a significant portion of our personnel and financial resources to research and development programs.

Our current research and development efforts are directed at developing new systems and processes and improving the capabilities of existing systems. Research and development programs include advanced PVD systems, advanced gap fill technology, primary conductor metals, low-k dielectric materials, CMP systems, and additional advanced deposition and surface preparation technologies for the next generation of smaller-geometry fabrication lines. All new systems under development are capable of processing 300mm wafers.

Expenditures for research and development, excluding charges for acquired in-process research and development, during 2004, 2003 and 2002 were $252.1 million, $227.4 million and $222.3 million, respectively. These expenditures represented approximately 19%, 25% and 26% of our net sales in 2004, 2003 and 2002, respectively. We believe that research and development expenditures will continue to represent a substantial percentage of our net sales in the future.

Manufacturing

Our manufacturing activities consist primarily of assembling and testing components and subassemblies that we acquire from third-party vendors and then integrate into a finished system. We utilize an outsourcing strategy for the manufacture of major subassemblies, and we perform all system design, assembly and testing in-house. Our outsourcing strategy enables us to minimize fixed costs and capital expenditures, and provides us with the flexibility to increase production capacity. This strategy also allows us to focus on product differentiation through system design and quality control. We believe that our use of outsourced product specialists enables our subsystems to incorporate the latest and most advanced technologies in robotics, gas panels and microcomputers without the need for in-house expertise. We strive to work as closely as possible with all of our suppliers to achieve mutual cost reduction through joint development efforts.

Although we make reasonable efforts to ensure that such parts are available from multiple suppliers, certain key parts may only be obtained from a single or limited source. These suppliers are, in some cases, thinly capitalized, independent companies who generate significant portions of their business from us and/or a small group of other companies in the semiconductor industry. We seek to reduce our dependence on single or limited source suppliers. However, disruptions in parts delivery or termination of certain of these suppliers may occur, and such disruptions and terminations could have an adverse effect on our operations. A prolonged inability to obtain certain parts could have a material adverse effect on our business, financial condition or results of operations, and could result in our inability to meet customer demands on time.

We manufacture our systems in clean-room environments similar to those used by semiconductor manufacturers for chip fabrication, which helps to minimize the amount of particulates and other contaminants in the final assembled system and to improve yields for our customers. Following assembly, we package our completed systems in plastic shrink-wrap to maintain clean-room standards during shipment.

Competition

Significant competitive factors in the semiconductor equipment market include system performance and flexibility, cost, the size of each manufacturer’s installed customer base, customer support capability and the breadth of a company’s product line. We believe that we compete favorably in all of the market segments we serve because of the fundamental advantages associated with our system performance and flexibility, low cost of ownership, high wafer yields and customer support. However, we face substantial competition from both established competitors and potential new entrants in each of these markets. Installing and integrating capital equipment into a semiconductor production line represents a substantial investment. For this reason, once a manufacturer chooses a particular vendor’s capital equipment, experience has shown that the manufacturer will generally rely upon that equipment for the useful life of the specific application. As a result, all of today’s semiconductor equipment makers typically have difficulty in selling a product to a particular customer to replace or substitute for a competitor’s product previously chosen or qualified by that customer.

In the CVD, PECVD, HDP and PVD markets, our principal competitor is Applied Materials, Inc., a major supplier of systems who has established a substantial base of installed equipment among today’s leading semiconductor manufacturers. In the PECVD market, we also compete against ASM International. In the ECD market, our principal competitors are Applied and Semitool, Inc. Our principal competitors in the surface preparation product arena are Mattson Technologies, Inc. and Axcelis Technologies, Inc. In the CMP market, our major competitors are Applied and Ebara Corporation.

Patents and Proprietary Rights

We intend to continue to pursue patent and trade secret protection for our technology. We currently hold over 475 patents. We have many pending patent applications, and we intend to file additional patent applications as appropriate. There can be no assurance that patents will be issued from any of these pending applications or future filings, or that any claims allowed from existing patents or pending or future patent applications will be sufficiently broad to protect our technology. While we intend to vigorously protect our intellectual property rights, there can be no assurance that any patents we hold will not be challenged, invalidated or circumvented, or that the rights granted thereunder will provide competitive advantages to us. See Item 3. Legal Proceedings, for further discussions.

We also rely on trade secrets and proprietary technology that we protect through confidentiality agreements with employees, consultants, and other parties. There can be no assurance that these parties will not breach those agreements, that we will have adequate remedies for any breach, or that our trade secrets will not otherwise become known to or independently developed by others.

There has been substantial litigation regarding patent and other intellectual property rights in semiconductor-related industries. We are currently involved in such litigation. Except as set forth in Item 3. Legal Proceedings, we are not aware of any significant claim of infringement by our products of any patent or proprietary rights of others; however, we could become involved in additional litigation in the future. Although we do not believe the outcome of current litigation will have a material impact on our business, financial condition or results of operations, no assurances can be given that current or future litigation will not have such an impact. For further discussion see Item 3. Legal Proceedings.

In addition to current litigation, our operations, including the further commercialization of our products, could provoke additional claims of infringement from third parties. In the future, litigation may be necessary to enforce patents issued to us, to protect trade secrets or know-how that we own, to defend ourselves against claimed infringement of the rights of others, or to determine the scope and validity of the proprietary rights of others. Any such litigation could result in substantial cost and diversion of efforts and could have a material adverse effect on our financial condition or operating results. In addition, adverse determinations in such litigation could result in loss our of proprietary rights, subject us to significant liabilities to third parties, require us to seek licenses from third parties, or prevent us from manufacturing or selling our products. Any of these occurrences could have a material adverse effect on our business, financial condition or results of operations.

Employees

On December 31, 2004, we had 3,505 full-time and temporary employees. This includes the acquisition of Peter Wolters AG. None of our employees are represented by a labor union, and we have never experienced a work stoppage, slowdown or strike. We consider our employee relations to be good.

The success of our future operations depends in large part on our ability to recruit and retain senior management, engineers, technicians, marketing, sales and service professionals and other key personnel. Qualified people are in great demand across each of these industry disciplines, and there can be no assurance that we will be successful in retaining or recruiting key personnel.

Business Combinations

We purchased all of the outstanding capital stock of Peter Wolters for an aggregate purchase price, excluding transaction costs, of approximately $149.5 million in cash on June 28, 2004. The Company funded the purchase price of the acquisition with borrowings under a credit facility with JPMorgan Chase Bank.

We acquired SpeedFam-IPEC on December 6, 2002 in a stock-for-stock acquisition. Each share of SpeedFam-IPEC common stock and stock options outstanding as of December 6, 2002 was converted into 0.1818 of a share of Novellus common stock or options on a fixed exchange ratio basis.

Environmental Matters

Neither compliance with federal, state and local provisions regulating discharge of materials into the environment, nor remedial agreements or other actions relating to the environment, has had, or is expected to have, a material effect on our capital expenditures, financial condition, results of operations or competitive position.

Item 2.

Properties

Information regarding our principal properties at December 31, 2004 is as follows:

# of Buildings	Location	Operating Segment	Use	Ownership	Square Footage
9	San Jose, CA	Semiconductor Group	Corporate Headquarters, Manufacturing, Research and Development, Engineering, Applications Demonstration Lab, Customer Support, Administration and Warehousing	Owned	642,000
4	Tualatin, OR	Semiconductor Group	Manufacturing, Research and Development, Engineering, Customer Support, Administration and Warehousing	Owned	442,000
1	Chandler, AZ	Semiconductor Group	Manufacturing, Research and Development, Engineering, Customer Support, Administration and Warehousing	Leased	108,000
1	Des Plaines, IL	Industrial Applications Group	Manufacturing, Research and Development, Owned Engineering, Customer Support, Administration and Warehousing	Owned	41,000
1	Plainville, MA	Industrial Applications Group	Research and Development, Engineering, Customer Support, and Warehousing	Owned	25,000
1	Leicestershire, UK	Industrial Applications Group	Manufacturing, Customer Support, Administration and Warehousing	Owned	9,000
1	Rendsburg, Germany	Industrial Applications Group	Manufacturing, Research and Development, Engineering, Customer Support, Administration and Warehousing	Owned	189,000
			Total	Owned	1,348,000 Sq. Ft.
				Leased		108,000	Sq. Ft.

In addition to the above properties used by our Semiconductor Group operating segment, we lease several domestic field offices totaling approximately 59,000 square feet of space. We also lease several sites outside the United States that we use as sales and customer service centers. These sites total approximately 185,000 square feet of space. Our facilities in Europe include approximately 48,000 square feet of leased space in various countries including France, Germany, Italy, and Ireland. Our facilities in Asia include approximately 137,000 square feet of leased space in various countries including China, India, Japan, Korea, Malaysia, Singapore and Taiwan. We also lease approximately 778,000 square feet of space in and around San Jose, California and Chandler, Arizona, all of which is occupied by subtenants or available for sublease.

In addition to the above properties used by our Industrial Applications Group operating segment, we lease three field offices totaling approximately 3,000 square feet in Germany, China and Japan. We also sublease approximately 65,000 square feet of space in Mettmann, Germany.

We believe that our current facilities are sufficient to meet our requirements for the foreseeable future.

Item 3.

Legal Proceedings

Applied Materials, Inc.

On September 20, 2004, we settled all pending patent litigation with Applied Materials, Inc., “Applied”, by entering into a Binding Memorandum of Understanding with Applied. The Memorandum of Understanding was effective as of September 3, 2004.

Semitool, Inc.

On October 11, 2004, we settled the pending patent litigation with Semitool, Inc. pursuant to the terms of a settlement agreement effective October 8, 2004.

Plasma Physics Corporation and Solar Physics Corporation

On June 14, 2002, certain of our present and former customers — including Agilent Technologies, Inc., Micron Technology, Inc., Agere Systems, Inc., National Semiconductor Corporation, Koninklijke Philips Electronics N.V., Texas Instruments, Inc., ST Microelectronics, Inc., LSI Logic Corporation, International Business Machines Corporation, Conexant Systems, Inc., Motorola, Inc., Advanced Micro Devices, Inc. and Analog Devices Inc. — were sued for patent infringement by Plasma Physics Corporation and Solar Physics Corporation. We have not been sued by Plasma Physics, Solar Physics, or any other party for infringement of any Plasma Physics or Solar Physics patent. Certain defendants in the case, however, contend that we allegedly have indemnification obligations and liability relating to these lawsuits. We believe that these matters will not have a material adverse impact on our business, financial condition, or results of operations. There can be no assurance, however, that Novellus would prevail in a future lawsuit filed in connection with the alleged indemnification obligations, if such a lawsuit were brought. If one or more parties were to prevail against us in such a suit and damages were awarded, the adverse impact on our business, financial condition, or results of operations could be material. However, due to the uncertainty surrounding the litigation process, we are unable to estimate a range of loss, if any, at this time.

Linear Technology Corporation

In March, 2002, Linear Technology Corporation (Linear) filed a complaint against Novellus, among other parties, in the Superior Court of the State of California for the County of Santa Clara. The complaint seeks damages (including punitive damages) and injunctions for causes of actions involving alleged breach of contract, fraud, unfair competition, breach of warranty and declaratory relief. On September 3, 2004, Novellus filed a demurrer to all causes of action in the complaint, which the Court granted without leave to amend on October 5, 2004. On January 19, 2005, we received notice that Linear intends to appeal the court’s order granting judgment in favor of Novellus. Although we prevailed on these claims in the Superior Court, it is possible that the Court of Appeals will reverse the ruling of the Superior Court, in which case Novellus could face potential liability on these claims. We cannot predict how the Court of Appeals will rule on this issue or, if it does rule against Novellus, estimate a range of potential loss, if any, due to the uncertainty of the litigation process.

Other Litigation

We are a defendant or plaintiff in various actions that arose in the normal course of business. We believe that the ultimate disposition of these matters will not have a material adverse effect on our business, financial condition or results of operations. However, due to the uncertainty surrounding the litigation process, we are unable to estimate a range of loss, if any, at this time.

Item 4.

Submission of Matters to a Vote of Security Holders

Not applicable.

PART II

Item 5.

Market for Registrant’s Common Equity, Related Shareholder Matters and Issuer Purchases of Equity Securities

Stock Information

Novellus’ common stock is traded on the NASDAQ Stock Market and is quoted on the NASDAQ National Market under the symbol “NVLS.” The following table sets forth the closing high and low prices of our common stock as reported by the NASDAQ National Market for the periods indicated:

	2004
	High		Low
First Quarter	$	44.44	$	29.15
Second Quarter		34.64		28.48
Third Quarter		31.44		23.13
Fourth Quarter		29.55		24.15

	2003
	High		Low
First Quarter	$	34.74	$	25.27
Second Quarter		38.53		26.28
Third Quarter		40.85		33.32
Fourth Quarter		45.03		33.60

We have not paid cash dividends on our common stock since inception, and our Board of Directors presently plans to reinvest our earnings in the business and to repurchase common shares. As of December 31, 2004, we had approximately $1.1 billion authorized by the Board of Directors for the repurchase of our common stock. Accordingly, it is anticipated that no cash dividends will be paid to holders of common stock in the foreseeable future. As of March 4, 2005, there were 1,102 holders of record of our common stock.

Following is a summary of our stock repurchases for the quarter ended December 31, 2004. ⁽¹⁾

Period		Average Price Paid per Share			Approximate Dollar Value of Shares that May Yet Be Purchased Under the Plans or Programs
September 26, 2004 to October 30, 2004	360,000	$	23.98	360,000	$	1,089.8	million
October 31, 2004 to November 27, 2004	—		—	—	$	1,089.8	million
November 28, 2004 to December 31, 2004	—		—	—	$	1,089.8	million
Total	360,000	$	23.98	360,000	$	1,089.8	million

(1)

On February 24, 2004, we announced that our Board of Directors had approved a stock repurchase plan that authorized the repurchase of up to $500.0 million of our outstanding common stock through February 13, 2007. On September 20, 2004 we announced that our Board of Directors had authorized an additional $1.0 billion for repurchase of our outstanding common stock through September 14, 2009. We may repurchase shares from time to time in the open market, through block trades or otherwise. The repurchases may be commenced or suspended at any time or from time to time without prior notice depending on prevailing market conditions and other factors.

(2)

All shares were purchased pursuant to the publicly announced plan.

Item 6.

Selected Financial Data

Set forth below is a summary of certain consolidated financial information with respect to Novellus as of the dates and for the periods indicated. The Consolidated Statements of Operations data set forth below for the five years ended December 31, 2004 and the Consolidated Balance Sheet data at each year end for the five years ended December 31, 2004 have been derived from our Consolidated Financial Statements, which have been audited. We acquired Peter Wolters, AG, on June 28, 2004, in a transaction accounted for as a purchase business combination. The Selected Consolidated Financial Data includes the operating results and financial data of Peter Wolters AG from June 28, 2004. We acquired SpeedFam-IPEC, Inc. on December 6, 2002, in a transaction accounted for as a purchase business combination. The Selected Consolidated Financial Data includes the operating results and financial data of SpeedFam-IPEC from December 6, 2002.

Selected Consolidated Financial Data

	Years Ended December 31,
	2004		2003	2002	2001	2000⁽⁸⁾
	(in thousands, except per share data)
Consolidated Statements of Operations Data:
Net sales	$	1,357,288