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UNITED STATES

SECURITIES AND EXCHANGE COMMISSION

Washington, D.C. 20549

FORM 10-K

(Mark One)

For the fiscal year ended December 31, 2004

OR

For the transition period from                                  to                                 

Commission file number: 000-22339

RAMBUS INC.

(Exact name of registrant as specified in its charter)

4440 El Camino Real

Los Altos, CA 94022

(Address of principal executive offices) (Zip Code)

(650) 947-5000

(Registrant’s telephone number, including area code)

Securities registered pursuant to Section 12(b) of the Act: None

Securities registered pursuant to Section 12(g) of the Act:

Common Stock, $.001 Par Value

Preferred Share Purchase Rights

(Title of Class)

Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days.    Yes  x    No  ¨

Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K (§229.405 of this chapter) is not contained herein, and will not be contained, to the best of the registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K.    ¨

Indicate by check mark whether the registrant is an accelerated filer (as defined in Rule 12b-2 of the Act). Yes  x    No  ¨

The aggregate market value of the Registrant’s Common Stock held by non-affiliates of the Registrant as of June 30, 2004 was approximately $1.3 billion based upon the closing price reported for such date on the Nasdaq Stock Market. For purposes of this disclosure, shares of Common Stock held by persons who hold more than 5% of the outstanding shares of Common Stock and shares held by officers and directors of the Registrant have been excluded because such persons may be deemed to be affiliates. This determination of affiliate status is not necessarily a conclusive determination for other purposes.

The number of outstanding shares of the Registrant’s Common Stock, $.001 par value, was 99,025,643 as of January 31, 2005.

DOCUMENTS INCORPORATED BY REFERENCE

Portions of the Proxy Statement for the Registrant’s next Annual Meeting of Stockholders are incorporated by reference into Part III of this Form 10-K.

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PART I

This Annual Report on Form 10-K (Annual Report) contains forward-looking statements. These forward-looking statements include, without limitation, predictions regarding the following aspects of our future:

You can identify these and other forward-looking statements by the use of words such as “may,” “should,” “expects,” “plans,” “anticipates,” “believes,” “estimates,” “predicts,” “intends,” “potential,” “continue,” or the negative of such terms, or other comparable terminology. Forward-looking statements also include the assumptions underlying or relating to any of the foregoing statements.

Actual results could differ materially from those anticipated in these forward-looking statements as a result of various factors, including those set forth under “Risk Factors.” All forward-looking statements included in this document are based on our assessment of information available to us at this time. We assume no obligation to update any forward-looking statements.

Rambus, RDRAM, XDR, RaSer, RaSerX and FlexIO are trademarks or registered trademarks of Rambus Inc. Other trademarks that may be mentioned in this annual report on Form 10-K are the property of their respective owners.

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Industry wide terminology, used widely throughout this annual report, has been abbreviated and, as such, these abbreviations are defined below for your convenience:

From time to time we will refer to the abbreviated names of certain companies and, as such, have provided a chart to indicate the full names of those companies for your convenience.

Item 1.    Business

Rambus Inc.^™ (“we” or “Rambus”) was founded in 1990 and reincorporated into Delaware in March 1997. Our principal executive offices are located at 4440 El Camino Real, Los Altos, California. Our Internet address is www.rambus.com. You can obtain copies of our Form 10-K, 10-Q, 8-K reports, and other filings with the SEC, and all amendments to these filings, free of charge from our website as soon as reasonably practicable following our filing of any of these reports with the SEC. In addition, you may read and copy any material we file with the SEC at the SEC’s Public Reference Room at 450 Fifth Street, N.W., Washington, D.C. 20549. You may obtain information on the operation of the Public Reference Room by calling the SEC at 1-800-SEC-0330. The SEC also maintains an Internet site that contains reports, proxy, and information statements, and other information regarding registrants that file electronically with the SEC at www.sec.gov.

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We create a broad range of chip interface technologies that improve the time-to-market, performance, and cost-effectiveness of our customers’ semiconductor and system products. Our licensed products are used in a broad range of computing, consumer electronics and communications applications.

Our chip interface technologies are covered by more than 380 U.S. and international patents. Additionally, we have over 380 patent applications currently pending. These patents and patent applications cover important inventions in memory and logic chip interfaces, in addition to other technologies. We believe that our interface technologies provide a lower risk, more cost-effective alternative for our customers than can be achieved through their own internal research and development efforts.

We offer our customers a number of alternatives for using our chip interface technologies in their products. First, we license our broad portfolio of patented inventions to semiconductor and system companies who use these inventions in the development and manufacture of their own products and for which they pay us royalties. Such licensing agreements may cover the license of part, or all, of our patent portfolio. Second, we develop industry standard and custom chip interface designs that we provide to our customers under license for incorporation into their semiconductor and system products and for which we receive royalty payments or other revenues. In conjunction with the chip interface licenses, our customers receive licenses to our patents as necessary to implement the interface in their products with specific rights and restrictions to the applicable patents elaborated in their individual contracts. Third, we offer engineering services to customers to help them successfully integrate our interface technologies into their chip and system products.

On April 10, 2003, the Board of Directors of Rambus voted to change the fiscal year end of Rambus from September 30 to December 31, effective January 1, 2003. As a result, financial statements included in this report show results of operations for the twelve months ended December 31, 2004 and 2003 (audited) and 2002 (unaudited), the three months ended December 31, 2002 (audited) and 2001 (unaudited) and the twelve months ended September 30, 2002 (audited). Except as specifically required under Regulation S-X or S-K, we have chosen to present the twelve months ended December 31 information since this is our new fiscal year end.

Background

The performance of computers, consumer electronics and other electronic systems is typically constrained by the speed of data transfer between the chips within the system. Ideally, the frequency of the data transfer between chips should be the same as the frequency of the data transfer on-chip. Over the last decade, however, this has not been the case as on-chip frequencies continue to exceed the frequency of communication between chips at an ever-increasing rate. For example, today’s fastest Pentium^® 4 processors transfer data on-chip at a rate in excess of 3.0 gigahertz (GHz), but transfer data between chips at 1.066 GHz. As a result of this widening performance gap, continued advances to increase on-chip frequencies face potentially diminishing returns in increasing overall system performance. Further, Moore’s Law continues to drive up transistor counts at a much faster rate than packaging technology can increase the pin counts of chips, resulting in another widening performance gap that may impact the ability to increase overall system performance. Our chip interface technologies help semiconductor and system designers narrow these gaps thus helping to boost the performance of electronic systems.

Our Products

Memory Interfaces

We have three memory interface product families:

Our XDR memory interface product family is designed for high-performance, low-cost memory applications. The 2-byte wide XDR DRAM operating at a 3.2 GHz data rate provides up to 6.4 gigabytes per second (GB/s) of bandwidth. The XDR memory interface is available for integration into memory and controller

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chips for next-generation consumer electronics, computer graphics and networking applications. The XDR memory interface achieves its high performance using many of our patented inventions, including in the areas of: transferring 8 bits of data per clock cycle using Octal Data Rate technology, using ultra-low voltage differential bi-directional signaling, and utilizing our FlexPhase^™ technology which uses flexible circuits to synchronize data output and compensate for timing errors. Our XDR memory interface technology includes a roadmap to over 12.8 GHz data rates, which enable system memory bandwidth of 400 GB/s and beyond. Leading technology companies such as Elpida, Matsushita, Samsung, Sony, and Toshiba have licensed our XDR memory interface technology.

Our RDRAM memory interface product family has been integrated into DRAM memory chips and memory controllers by a number of chip manufacturers. Chips incorporating our RDRAM memory interface are in production, providing high performance for servers, video game consoles, projectors, printers, digital TVs, set-top boxes, routers and switches. Leading technology companies such as Cisco, Intel, Matsushita, Samsung, Sony, Texas Instruments and Toshiba incorporate our RDRAM interface into their products.

Our DDR controller interface product family is designed to be compatible with a number of industry standards. Our DDR controller interfaces support mainstream DDR1 and DDR2 up to 800 megahertz (MHz) data rates and graphics DDR, including GDDR1, GDDR2 and GDDR3, up to 1600MHz data rates. We also offer interfaces that combine DDR or GDDR interfaces with our XDR memory interfaces to provide even higher speed solutions that enable significant improvements in system bandwidth with increased design flexibility. Matsushita and Toshiba have licensed our DDR2 interface for use in their products.

Logic Interfaces

We have three logic interface product families:

We offer a family of industry-standard, high-speed and low-power serial links for communications between logic chips in a broad range of computing, consumer and communications applications. Our industry-standard serial interfaces are compatible with communication protocols such as XAUI, Fibre Channel, Ethernet, PCI Express^® and Serial ATA, as well as emerging next-generation solutions that enable further significant improvements in system bandwidth. Leading companies including Intel, S3 Graphics, Toshiba, and UMC have licensed our serial link interfaces for use in their products.

We also offer a family of customized, high-performance serial links, based on our RaSer V and RaSer X technology, for applications requiring data transfer rates not supported by industry standards. Our RaSer X interface has been demonstrated to operate at greater than 10 gigabits per second (Gb/s) over network backplanes, enabling significant improvement in bandwidth and capacity of enterprise systems. The RaSer V interface technology has been licensed by Toshiba, and the RaSer X interface technology has been licensed by NECEL.

The FlexIO family of processor bus interfaces provides communication between logic chips in a broad range of computing, consumer and communications applications. This technology has been demonstrated to operate at data rates greater than 6.4 Gb/s in test platforms. The FlexIO processor bus interface has been licensed by Toshiba and Sony for use in the cell processor and future broadband applications.

Patent Licenses

We license select parts of our broad portfolio of patents that underpin our chip interface products to our customers. Leading companies such as Elpida, Intel, Matsushita, NEC, Renesas, Samsung, and Toshiba have taken licenses to certain of our patents for use in their own products. Additionally, licensees of our memory and logic interface products and designs, described above, receive, as an adjunct to their interface license agreements, patent licenses as necessary to implement the interface in their products with specific rights and restrictions to the applicable patents elaborated in their individual contracts.

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Target Markets, Applications and Customers

We work with leading and emerging chip and system customers to enable their next generation products. We engage with our customers across the entire product life cycle, from system architecture development, to chip design, to system integration, to production ramp up through product maturation. Our interface technologies are incorporated into a broad range of high-volume applications in the computing, consumer electronics and communications markets. System level products that utilize our interfaces include servers, printers, video projectors, video game consoles, digital TVs, set-top boxes, routers and switches manufactured by such companies as Canon, Cisco, Cray, Hewlett-Packard, Juniper, Matsushita and Sony. We also license our patented inventions to a wide range of semiconductor companies including Elpida, Hitachi, Intel, Matsushita, Mitsubishi, NEC, Oki, Renesas, Samsung and Toshiba.

Our Strategy

The key elements of our strategy are as follows:

Develop Core Technology: Develop and patent our core technology to provide us with a fundamental competitive advantage in memory and logic chip interfaces.

Develop Products: Develop products which incorporate our core technology and provide our customers with the benefits of faster time-to-market, lower risk and greater cost effectiveness for a range of applications and performances spanning from industry standard to high performance proprietary interfaces.

Develop Infrastructure and Market: Develop the infrastructure and market to ensure interoperability and the broad availability of our chip interface products.

Engage With Leading and Emerging Companies: Engage with leading and emerging chip and system customers to solve their critical interface design problems and incorporate our low-risk, silicon-proven interfaces into their solutions.

License our Interface Technologies: License our patented inventions and specific chip interface products to customers for use in their semiconductor and system products.

Design and Manufacturing

Our chip interface technologies are developed with high-volume manufacturing processes in mind, such as industry-standard complementary metal-oxide semiconductor processes among others, including those available from leading semiconductor manufacturers. Typically, our interfaces are delivered in one of three ways: implementation package, custom development or off-the-shelf design. We provide implementation packages to licensees who wish to port our interface designs to a manufacturing process being used to develop their semiconductor products. This package typically includes a specification, a generalized circuit layout database and test parameter software. We do custom development when licensees have contracted with us to produce a specific design implementation optimized for the licensee’s manufacturing process. In such cases, the licensee provides specific design rules and transistor models for the licensee’s process. We deliver off-the-shelf products when licensees purchase a previously developed interface design, which is typically the case with fabless semiconductor companies where the design rules and transistor models are provided by a third-party foundry manufacturer.

Research and Development

Our ability to compete in the future will be substantially dependent on our ability to advance our chip interfaces and patented inventions in order to meet changing market needs. To this end, we have assembled a team of highly skilled engineers whose activities are focused on further development of our chip interfaces and patented inventions as well as adaptation of current interfaces to specific customers’ processes. Our engineers are

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developing new interfaces and new versions of existing interfaces that we expect will allow chip data transfer at higher speeds, as well as provide other improvements and benefits. Our design and development process is a multi-disciplinary effort requiring expertise in system architecture, digital and analog circuit design and layout, semiconductor process characteristics, packaging, printed circuit board routing, signal integrity and high-speed testing techniques.

As of December 31, 2004, we had 170 employees in our engineering departments, representing 72% of our total human resources. Approximately 52% of our engineering employees have advanced technical degrees and 15% have PhDs. For the twelve months ended December 31, 2004, 2003 and 2002, research and development expenses were approximately $32.6 million, $30.4 million and $23.7 million, respectively. We expect that we will continue to invest substantial funds in research and development activities. In addition, because our license and customer service agreements often call for us to provide engineering support, a portion of our total engineering costs have been allocated to the cost of contract revenues, even though these engineering efforts have direct applicability to our technology development.

Competition

The semiconductor industry is intensely competitive and has been impacted by price erosion, rapid technological change, short product life cycles, cyclical market patterns and increasing foreign and domestic competition. Some semiconductor companies have developed and support competing logic interfaces including their own serial link interfaces and parallel bus interfaces. We also face competition from semiconductor and intellectual property companies who provide their own DDR memory interface technology and solutions. In addition, most DRAM manufacturers, including our RDRAM and XDR licensees, produce versions of DRAM such as SDRAM, DDRx (where the “x” is a number that represents a version) and GDDRx (where the “x” is a number that represents a version) which compete with RDRAM and XDR chips. We believe that our principal competition for memory interfaces may come from our licensees and prospective licensees, some of which are evaluating and developing products based on technologies that they contend or may contend will not require a license from us. In addition, our competitors are also taking a system approach similar to ours in seeking to solve the application needs of system companies. Many of these companies are larger and may have better access to financial, technical and other resources than we possess.

The JEDEC Solid State Technology Association, a standards setting body including semiconductor and system companies, has standardized what they call an extension of DDR, known as DDR2. JEDEC is also thought to be standardizing what they describe as an extension of DDR that they refer to as DDR3 and a fully buffered DIMM standard. Other efforts are underway to create other products including those sometimes referred to as GDDR4 and GDDR5. To the extent that these alternatives might provide comparable system performance at lower or similar cost than RDRAM and XDR memory chips, or are perceived to require the payment of no or lower royalties, or to the extent other factors influence the industry, our licensees and prospective licensees may adopt and promote alternative technologies. Even to the extent we determine that such alternative technologies infringe our patents, there can be no assurance that we would be able to negotiate agreements that would result in royalties being paid to us without litigation, which could be costly and the results of which would be uncertain.

In addition, certain semiconductor companies are now marketing semiconductors which combine logic and DRAM on the same chip. Such technology, called “embedded DRAM,” eliminates the need for an external chip interface to memory. The impact of embedded DRAM on our business is difficult to predict. If embedded DRAM were to gain widespread acceptance in the electronics industry, and if new royalty-generating licenses were not entered into between us and the manufacturers and/or users of the embedded DRAM products, embedded DRAM would have a negative impact on the royalties that we receive for the use of our patents. We do not currently receive royalties for embedded DRAM. There can be no assurance that competition from embedded DRAM will not increase in the future.

In the industry standard and custom serial link interface business, we face additional competition from semiconductor companies that sell discrete transceiver chips for use in various types of systems, from

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semiconductor companies that develop their own serial link interfaces, as well as from competitors, such as ARM and Synopsys, who license similar serial link interface products. At the 10 Gb/s speed, competition will also come from optical technology sold by system and semiconductor companies. There are standardization efforts under way or completed for serial links from standard bodies such as PCI-SIG and OIF. We may face increased competition from these types of consortia in the future that could negatively impact our serial link interface business.

In the FlexIO processor bus interface business, we face additional competition from semiconductor companies who develop their own parallel bus interfaces, as well as competitors who license similar parallel bus interface products. We may also see competition from industry consortia or standard setting bodies that could negatively impact our FlexIO processor bus interface business.

As with our memory interface products, to the extent that competitive alternatives to our serial or parallel logic interface products might provide comparable system performance at lower or similar cost, or are perceived to require the payment of no or lower royalties, or to the extent other factors influence the industry, our licensees and prospective licensees may adopt and promote alternative technologies.

Employees

As of December 31, 2004, we had 237 full-time employees. We believe that our relationship with our employees is excellent.

Patents and Intellectual Property Protection

We maintain and support an active program to protect our intellectual property, primarily through the filing of patent applications and the defense of issued patents against infringement. We currently have more than 380 U.S. and international patents on various aspects of our technology, with expiration dates ranging from 2010 to 2022, and have over 380 pending patent applications. In addition, we attempt to protect our trade secrets and other proprietary information through agreements with licensees and systems companies, proprietary information agreements with employees and consultants and other security measures. We also rely on trademarks and trade secret laws to protect our intellectual property.

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RISK FACTORS

We face current and potential adverse determinations in litigation stemming from our efforts to protect and enforce our patents and intellectual property, which could broadly impact our intellectual property rights, distract our management and cause a substantial decline in our revenues and stock price.

We seek to diligently protect our intellectual property rights. In connection with the extension of our licensing program to SDRAM compatible and DDR compatible products in 2000-01, we became involved in litigation related to such efforts. As of December 31, 2004, we were in litigation with three such potential SDRAM compatible and DDR compatible licensees. In each of these cases, we have claimed infringement of our patents while the potential licensees have generally sought damages and a determination that our patents at suit are invalid and not infringed. These potential licensees have also relied or may rely upon defenses and counterclaims (some not yet formally asserted) that our patents are unenforceable based on various allegations concerning our alleged conduct in the 1990s and early 2000s, including that we engaged in litigation misconduct and/or acted improperly during our 1991-96 participation in the JEDEC standard setting organization.

For example, Hynix has now broadened its counterclaims to attempt to include our 1990s relationship with Intel and our alleged disparagement of DDR and SDRAM products in the 1990s. By way of further example, Infineon has indicated that it may, by pointing to documents not produced by us in time for the 2001 trial, try to set aside the 2003 Federal Circuit decision in our favor and reopen all of its now-dismissed JEDEC-related claims against us. The Infineon court held a hearing on February 4-5, 2005 on Infineon’s motion to dismiss our patent infringement claims, and for summary judgment of unclean hands, based on alleged litigation misconduct and spoliation. Infineon has also complained about the alleged destruction of evidence, including through our document retention programs. The trial court has made preliminary rulings endorsing the basis for these “spoliation” claims.

There can be no assurance that parties will not succeed with such claims against us or that they will not in some other way establish broad defenses against our patents or otherwise avoid or delay paying what we believe to be appropriate royalties for the use of our patents or that the pending litigations and other circumstances will not reach a point where we elect to compromise for less than what we now believe to be fair consideration.

Any of these matters, whether or not determined in our favor or settled by us, is costly and diverts the efforts and attention of our management and technical personnel from normal business operations. Furthermore, any adverse determination or other resolution in litigation could result in our losing certain rights, beyond the rights at issue in a particular case, including, among other things: our being effectively barred from suing others for violating certain or all of our intellectual property rights; our patents being held invalid or unenforceable; our being subjected to significant liabilities; our being required to seek licenses from third parties; our being prevented from licensing our patented technology; or our being required to renegotiate with current licensees on a temporary or permanent basis. Failure to achieve positive results in litigation will also result in a failure to trigger certain contractual provisions which would convert certain flat rate royalty arrangements to per unit royalties. Any or all of these adverse results could cause a substantial decline in our revenues.

An unfavorable outcome to us from court proceedings related to Infineon’s motion to dismiss our patent infringement claim and for other sanctions for alleged litigation misconduct that are set for February 2005 is probable and, depending on the severity of the adverse outcome, may lead to a significant decline in our stock price.

Infineon, has recently amended its counterclaims, with leave of the court, to assert legal theories against us related to what it calls spoliation, unfair business practices and/or JEDEC misconduct. On December 20, 2004, Infineon filed a motion for summary judgement to dismiss our patent infringement claim and for other sanctions for alleged litigation misconduct and spoliation. The motion was heard by the court on February 4, 2005. Although, that motion was denied in part, a bench trial has been set to begin on February 21, 2005 to try Infineon’s “unclean hands” defense based on similar allegations. The remanded patent trial is currently set to follow that bench trial with a jury decision that may be issued in early March. Based upon the rulings, conduct and comments of the trial court to date and the appellate court’s rejection of our efforts to have these expanded

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claims removed from the case before trial by denying our request for interlocutory review on the subject, we believe it is probable that the trial court will grant some or all of the sanctions requested by Infineon at the February 4, 2005 hearing, that we will, at or before trial, otherwise be denied the relief we seek in the trial court on our affirmative claims for patent infringement, and that Infineon will be granted some form of relief on its counterclaims. An unfavorable outcome to us in some or all of these areas may adversely affect our pending litigations with Hynix and Micron, our pending appeal before the Federal Trade Commission (FTC), our ability to enforce our patents against others, our relationships with our existing licensees, our ability to renew existing licenses or secure additional licensees and the value of our stock. While we intend to vigorously pursue an appeal of unfavorable rulings, it is likely that our business will continue to be adversely affected during the pendency of any such appeal, and possibly longer, depending on the severity of the unfavorable outcomes in the trial court and depending on the outcome of any such appeal.

An adverse resolution by or with a governmental agency, such as the Federal Trade Commission or the European Patent Office, could result in severe limitations on our ability to protect and license our intellectual property, and would cause our revenues to decline substantially.

If there were an adverse determination by, or other resolution with, a government agency, we may be limited in enforcing our intellectual property rights and in obtaining licenses, which would cause our revenues to decline substantially. For example, in June 2002, the FTC filed a complaint against us alleging, among other things, that we had failed to disclose certain patents and patent applications during our participation in the establishment of SDRAM standards with JEDEC and that we should be precluded from enforcing our intellectual property rights in patents with a priority date prior to June 1996. Although the initial decision in the FTC proceeding supported Rambus and dismissed the complaint, that initial decision has been appealed by the FTC staff and may be reversed by the FTC or subject to some future compromise given developments in that case or the totality of circumstances we face. The European Commission has directed inquiries to us relating to similar topics. If proceedings by one of these agencies, or any other governmental agency, resulted in a resolution that could limit our ability to enforce or license our intellectual property, our revenues could decline substantially.

On May 13, 2004, the Technical Appeals Board of the European Patent Office issued its written opinion as to the revocation of European Patent No. 0525068. In addition, on January 13, 2005, an opposition board of the European Patent Office revoked our European Patent No. 004956, but has not yet issued its written decision. Although we intend to appeal this decision to an appellate panel of the European Patent Office, this result leaves us with one remaining issued patent in Europe relating to DDR DRAM memory products, which patent is currently subject to a pending opposition proceeding. If a sufficient number of our other patents are similarly impaired or revoked, our ability to enforce or license our intellectual property would be significantly impaired and would cause our revenues to decline substantially.

If we are unable to successfully protect our inventions through the issuance and enforcement of patents, our operating results could be adversely affected.

We have an active program to protect our proprietary inventions through the filing of patents. There can be no assurance, however, that:

If any of the above were to occur our operating results could be adversely affected.

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Our inability to protect and own the intellectual property created by us would cause our business to suffer.

We rely primarily on a combination of license, development and nondisclosure agreements, trademark, trade secret and copyright law, and contractual provisions to protect our other, non patentable, intellectual property rights. If we fail to protect these intellectual property rights, our licensees and others may seek to use our technology without the payment of license fees and royalties, which could weaken our competitive position, reduce our operating results and increase the likelihood of costly litigation. The continued growth of our business depends in large part on the applicability of our intellectual property to the products of third party manufacturers, and our ability to enforce intellectual property rights against them. In addition, effective trade secret protection may be unavailable or limited in certain foreign countries. Although we intend to protect our rights vigorously, if we fail to do so our business will suffer.

We might experience payment disputes for amounts owed to us under our licensing agreements, and this may harm our results of operations.

The standard terms of our license agreements require our licensees to document the manufacture and sale of products that incorporate our technology and report this data to us on a quarterly basis. While standard license terms give us the right to audit books and records of our licensees to verify this information, audits can be expensive, time consuming, and potentially detrimental to our ongoing business relationship with our licensees. We have implemented a royalty audit program, which consists of periodic royalty audits of our major licensees, using accounting firms that are independent of our independent registered public accounting firm, PricewaterhouseCoopers LLP. We have performed royalty audits from time to time but we primarily rely on the accuracy of the reports from licensees without independently verifying the information in them. Our failure to audit our licensees’ books and records may result in us receiving more or less royalty revenues than we are entitled to under the terms of our license agreements. The result of such royalty audits could result in an increase, as a result of a licensee’s underpayment, or decrease, as a result of a licensee’s overpayment, to previously reported royalty revenues. Such adjustments are recorded in the period they are determined. Any adverse material adjustments resulting from royalty audits or dispute resolutions may result in us missing analyst estimates and causing our stock price to decline. Royalty audits may also trigger disagreements over contract terms with our licensees and such disagreements could hamper customer relations, divert the efforts and attention of our management from normal operations and impact our business operations and financial condition.

Our revenue is concentrated in a few customers, and if we lose any of these customers, our revenues may decrease substantially.

For the twelve months ended December 31, 2004 and 2003, revenues from our top five licensees accounted for approximately 74% and 75% of our revenues, respectively. For the twelve months ended December 31, 2004, revenues from Intel, Toshiba, and Elpida, each accounted for greater than 10% of our total revenues. In contrast, for the twelve months ended December 31, 2003, revenues from Intel, Toshiba and Samsung, each accounted for greater than 10% of total revenues. We expect that we may continue to experience significant revenue concentration for the foreseeable future.

Substantially all of our licensees, including Intel, have the right to cancel their licenses, and all but one of our patent licenses covering SDRAM and DDR SDRAM memory and controllers are set to expire in 2005. Failure to renew our existing licenses and/or the loss of any of our top five licensees would cause revenues to decline substantially.

In addition, some of our commercial agreements require us to provide certain customers with the lowest royalty rate that we provide to other customers for similar technologies, volumes and schedules. These clauses may limit our ability to effectively price differently among our customers, respond quickly to market forces, or otherwise to compete on the basis of price. The particular licensees which account for revenue concentration have varied from period to period as a result of the addition of new contracts, expiration of existing contracts,

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industry consolidation, the expiration of deferred revenue schedules under existing contracts, and the volumes and prices at which the licensees have recently sold licensed semiconductors to system companies. These variations are expected to continue in the foreseeable future, although we anticipate that revenue will continue to be concentrated in a limited number of licensees.

We are substantially leveraged, which could adversely affect our ability to adjust our business to respond to competitive pressures and to obtain sufficient funds to satisfy our future research and development needs and defense of our intellectual property.

We have significant indebtedness. On February 1, 2005, we issued $300 million aggregate principal amount of zero coupon senior convertible notes due February 1, 2010.

The degree to which we are leveraged could have important consequences, including, but not limited to, the following:

Our ability to pay interest and principal on our debt securities, to satisfy other debt obligations which may arise and to make planned expenditures will be dependent on our future operating performance, which could be affected by changes in economic conditions and other factors, some of which are beyond our control. A failure to comply with the covenants and other provisions of our debt instruments could result in events of default under such instruments, which could permit acceleration of the debt under such instruments and in some cases acceleration of debt under other instruments that may contain cross-default or cross-acceleration provisions. We believe that cash flow from operations will be sufficient to cover our debt service and other requirements. If we are at any time unable to generate sufficient cash flow from operations to service our indebtedness, however, we may be required to attempt to renegotiate the terms of the instruments relating to the indebtedness, seek to refinance all or a portion of the indebtedness or obtain additional financing. There can be no assurance that we will be able to successfully renegotiate such terms, that any such refinancing would be possible or that any additional financing could be obtained on terms that are favorable or acceptable to us.

Our financial results are materially dependent upon Intel, and if we cannot maintain this relationship into the future, our results of operations may decline significantly.

Intel is our largest customer and is an important catalyst for the development of new memory and logic interfaces in the semiconductor industry. We have a patent cross-license agreement with Intel for which we will receive quarterly royalty payments through the second quarter of 2006. The patent cross-license agreement expires in September 2006, at which time; Intel will have a paid up license for the use of all of our patents claiming priority prior to September 2006. Intel has the right to cancel the agreement with us prior to the expiration of the contract. We have other licenses with Intel, in addition to the patent cross-license agreement, for the development of serial link interfaces. If we cannot maintain our relationship with Intel into the future, our results of operations may decline significantly.

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Our inexperience in managing rapid growth could strain our resources and cause our financial results to decline.

We may not be equipped to successfully manage any future periods of rapid growth or expansion, which could be expected to place a significant strain on our limited managerial, financial, engineering and other resources. Our licensees and systems customers rely heavily on our technological expertise in designing, testing and manufacturing products incorporating our chip interface technologies. In addition, relationships with new licensees or system companies generally require significant engineering support. As a result, any increases in adoption of our interfaces will increase the strain on our resources, particularly our engineers. Any delays or difficulties in our research and development process caused by these factors or others could make it difficult for us to develop future generations of our interface technologies and to remain competitive. The rapid rate of hiring new employees or coordinating a third party sales relationship with a substantially larger sales force, could be disruptive and could adversely affect the efficiency of our business or cause conflicts in our distribution or sales channels.

We may make future acquisitions or enter into mergers, strategic transactions or other arrangements that could cause our business to suffer.

We may continue to make investments in complementary companies, products or technologies or enter into mergers, strategic transactions or other arrangements, such as our acquisition of certain intellectual property assets from Cadence. If we buy a company or a division of a company, we may experience difficulty integrating that company or division’s personnel and operations, which could negatively affect our operating results. In addition:

In connection with future acquisitions or mergers, strategic transactions or other arrangements, we may incur substantial expenses regardless of whether the transaction occurs. We may also incur non-cash charges in connection with a merger, acquisition, strategic transaction or other arrangement. In addition, we may be required to assume the liabilities of the companies we acquire. By assuming the liabilities, we may incur liabilities such as those related to intellectual property infringement or indemnification of customers of acquired businesses for similar claims, which could materially and adversely affect our business. We may have to incur debt or issue equity securities to pay for any future acquisition, the issuance of which would involve restrictive covenants or be dilutive to our existing stockholders.

We face risks associated with our international licenses and operations, including our new manufacturing and design facility in Bangalore, India.

For the twelve months ended December 31, 2004 and 2003, international revenues constituted approximately 69% and 64% of our total revenues, respectively. For these periods, our international revenues were derived primarily from licenses of our intellectual property. In an effort to expand our international presence, we recently established a design facility in Bangalore, India which we expect to be fully operational during the first half of 2005. As a result of this new facility and our continued focus on international licensing, we expect that future revenues derived from international sources will continue to represent a significant portion of our total revenues.

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To date, all of our internationally based revenues have been denominated in U.S. dollars. However, to the extent that future international revenues are not denominated in U.S. dollars, such revenues would be subject to fluctuations in currency exchange rates. In addition, if the effective price of products sold by us, licensed by our foreign licensees, or sold by companies that incorporate our technology into their products (such as system companies) were to increase as a result of fluctuations in the exchange rate of the relevant currencies, overall demand for our products could fall, which in turn would reduce our royalties. Currently, we do not use derivative instruments to hedge foreign exchange rate risk.

In addition to the risks mentioned above, our international operations and demand for our products are subject to a variety of other risks which are beyond our control, including: