UNITED STATES
SECURITIES AND EXCHANGE COMMISSION
Washington, D.C. 20549
FORM 10-K
(Mark One)
| x | ANNUAL REPORT PURSUANT TO SECTIONS 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 |
For the fiscal year ended December 31, 2003
| ¨ | TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 |
For the transition period from to .
Commission file number 000-31173
ChipPAC, Inc.
(Exact Name of Registrant as Specified in Its Charter)
| Delaware (State or Other Jurisdiction of Incorporation or Organization) |
77-0463048 (I.R.S. Employer Identification No.) |
47400 Kato Road, Fremont, California 94538
(Address of Principal Executive Offices, Zip Code)
Registrants telephone number, including area code (510) 979-8000
Securities registered pursuant to Section 12(b) of the Act:
| Title of Each Class |
Name of Each Exchange on Which Registered |
None
Securities registered pursuant to Section 12(g) of the Act:
Class A common stock, $.01 par value
Indicate by check mark whether the registrant: (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. YES x NO ¨
Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of registrants knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K. ¨
Indicate by check mark whether the registrant is an accelerated filer (as defined in Rule 12b.2 of the Act). YES x NO ¨
The aggregate market value of voting stock held by non-affiliates of the registrant (based upon the closing sales price of such shares on the Nasdaq National Market as of March 9, 2004) was $636,523,693.65.
At the close of market on March 9, 2004, there were 98,193,522 shares of the Registrants Class A common stock outstanding. No shares of the Registrants Class B common stock were outstanding on that date.
| Page | ||||
| PART I | 3 | |||
| Item 1. |
3 | |||
| Item 2. |
13 | |||
| Item 3. |
14 | |||
| Item 4. |
14 | |||
| PART II | 15 | |||
| Item 5. |
MARKET FOR REGISTRANTS COMMON EQUITY AND RELATED STOCKHOLDER MATTERS |
15 | ||
| Item 6. |
16 | |||
| Item 7. |
MANAGEMENTS DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND RESULTS OF OPERATIONS |
17 | ||
| Item 7A. |
28 | |||
| Item 8. |
30 | |||
| Item 9. |
CHANGES IN AND DISAGREEMENTS WITH ACCOUNTANTS ON ACCOUNTING AND FINANCIAL DISCLOSURE |
69 | ||
| Item 9A. |
69 | |||
| PART III | 69 | |||
| Item 10. |
69 | |||
| Item 11. |
73 | |||
| Item 12. |
SECURITY OWNERSHIP OF CERTAIN BENEFICIAL OWNERS AND MANAGEMENT |
78 | ||
| Item 13. |
80 | |||
| Item 14. |
81 | |||
| PART IV | 81 | |||
| Item 15. |
EXHIBITS, FINANCIAL STATEMENT SCHEDULES, AND REPORTS ON FORM 8-K |
81 | ||
| SIGNATURES | 87 | |||
2
DISCLOSURE REGARDING FORWARD-LOOKING STATEMENTS
This annual report on Form 10-K contains forward-looking statements. In some cases, you can identify forward-looking statements by terminology such as may, will, should, expects, plans, target, anticipates, believes, estimates, predicts, potential, continue or the negative of these terms or other comparable terminology. These statements are only predictions and speak only as of their dates. These forward-looking statements are based largely on our current expectations and are subject to a number of risks and uncertainties, including those identified under Exhibit 99.1 of this annual report and other risks and uncertainties indicated from time to time in our filings with the SEC. Actual results could differ materially from these forward-looking statements. In addition, important factors to consider in evaluating these forward-looking statements include our proposed merger with ST Assembly Test, Ltd, possible international conflicts, changes in general economic and external market factors, changes in our business or growth strategy or an inability to execute our strategy due to changes in our industry or the economy generally, the emergence of new or growing competitors and various other competitive factors. In light of these risks and uncertainties, there can be no assurance that the matters referred to in the forward-looking statements contained in this annual report will in fact occur.
Industry
ChipPAC is one of the worlds largest independent providers of semiconductor packaging, test, and distribution services. We offer one of the broadest portfolios of packaging and test services for integrated circuits. We supply packaging solutions to some of the leading semiconductor companies servicing the computing, communications, consumer, automotive and industrial markets. We are a leader in providing high end packaging solutions, including ball grid array packages, or BGA packages, chip scale packages, flip-chip and stacked die packages. In addition to providing assembly and test services on a global basis, we are the largest independent semiconductor packaging and test service provider in mainland China. As consumers demand smaller electronic devices with more functionality, there is a greater requirement for power regulation and generation, which we expect to drive demand for our power packages. We are a leader in high-volume assembly, test and distribution of discrete and analog power packages. We are also one of the leading providers of advanced packaging products that address the needs of semiconductors used in wireless LAN and handset applications, including chip-scale, stacked die technologies.
Our online design and characterization process, referred to as SmartDESIGN, is a proprietary web-based design collaboration system that we believe provides a higher rate of product qualification, improved technical performance and shorter time-to-market service for our customers. This system enables us to link to our customers via the Internet to aid with the performance of package design, electrical, thermal and mechanical analysis and to model end system performance.
Outsourcing of packaging and test services to independent packagers like ChipPAC continues to expand due to several factors, including time-to-market pressures, cost reduction, resource allocation, equipment utilization, the increased technological complexity of packaging and test services and the growth of fabless semiconductor manufacturers. Historically, outsourced semiconductor manufacturing services have grown faster than the semiconductor market as a whole. Management believes that the reduced investments in assembly and test capacity by semiconductor manufacturers over the past two years will position outsource providers well to capture a greater percentage of future volume levels. The packaging and test industry is highly fragmented as we compete against a number of established independent packaging houses as well as the internal capabilities of some of our largest customers.
The semiconductor industry has historically experienced volatility with sharp periodic downturns and steep volume ramps. These downturns have been characterized by, among other things, diminished product demand,
3
excess production capacity and accelerated erosion of selling prices. The semiconductor industry is presently recovering from a downturn, and we expect conditions to continue to improve in 2004.
Our headquarters are located in Fremont, California, and our manufacturing facilities are strategically located in China, Malaysia and South Korea, to address the global needs of our customers. We have design personnel located at customer sites, as well as design centers located in Arizona, China, Malaysia and South Korea to provide 24-hour design support to our customers.
We believe that we differentiate ourselves from our competitors by the following factors:
| | High End Technology ExpertiseWe are one of the worlds largest providers of outsourced advanced packaging, which accounted for approximately 68.5% and 60.3% of our packaging revenue for the years ended December 31, 2003 and 2002, respectively. Our substrate based packages are used for most high-end applications such as computing, wireline and wireless communications devices, gaming, and stacked die packages for portable applications. Our advanced package portfolio also includes next generation flip-chip technology for system on a chip, or SOC, which is used in network servers and telecom switching devices, as well as single and multi-die CSP packaging for digital signal processors, or DSPs, and other chipsets for wireless handset, wireless LAN, and other portable handheld equipment such as PDAs. In addition, we have critical expertise for testing radio frequency, or RF, devices. We believe that our advanced technology expertise and our commitment to research and development will enable us to continue to drive the development of solutions for next generation semiconductor packages. |
| | Leader in Growing Power Discrete, Power Management and Analog SegmentWe are a leader in high-volume semiconductor assembly and test services for discrete, analog, RF and mixed-signal technologies, for small signal and power applications. Power products manage the electricity requirements for multiple components, ensuring an accurate and efficient flow of voltage so electronic devices run longer and more efficiently. As electronics become increasingly more complex, portable and performance-driven, the demand for power regulation and management increases significantly. A broad and fast-growing range of end markets, including portable devices, household appliances, computers, automotive systems and telecommunications, will continue to drive power semiconductor usage and the demand for our power products. |
| | Strategic Geographic DiversificationWe are strategically located to take advantage of industry outsourcing trends. Our Shanghai, China facility, which was established in 1994, is the largest packaging and test provider in China. We provide local content for products sold into the Chinese market, including cellular telephones, computers and portable devices. Our high-volume packaging site for advanced BGA packages is in Ichon, South Korea, which is significant for its proximity to large semiconductor customers and to an available pool of highly-skilled research and development and technical staff. Our Malaysian facility in Kuala Lumpur positions us to benefit from the growth in fabless manufacturing taking place in Southeast Asia. Our headquarters in Silicon Valley and state-of-the-art research development and design facilities in Arizona and South Korea are located near our customers and provide us with the ability to work on a 24-hour-basis with our customers in the design process and in supply chain management. |
| | New and Diversifying Customer BaseIn 2003, we continued to diversify and broaden our customer base to over 90 customers worldwide. Our customers include some of the largest companies in the semiconductor industry. Our largest customer accounted for 15.9% of our total sales in 2003 versus 16.6% of total sales in 2002. |
| | Among the Leaders in Growing Test ServicesThrough our long-term partnerships and existing customer base, we are well positioned to capitalize on the growth of outsourced testing by semiconductor producers. This growth in outsourced testing is driven by the increasing demand for RF, mixed-signal and high performance logic devices that require greater capital expenditures on testing equipment. We have made significant capital expenditures on testing equipment that provides us with the capability to test mixed-signal, analog, digital logic, memory, power and RF devices. By increasing |
4
| our emphasis on our test business and adding capacity, we have increased our test revenue over the past several years, and we expect this growth to continue. Our test business revenue grew to $59.5 million in 2003 from $56.2 million in 2002. |
Pending Merger
On February 10, 2004, we signed a definitive agreement for the merger of a wholly-owned subsidiary of ST Assembly Test Ltd, or STATS, with ChipPAC in a stock-for-stock transaction. If the merger is consummated, we will become a wholly owned subsidiary of STATS. Under the terms of the agreement, ChipPAC stockholders will receive 0.87 STATS American Depositary Shares, or ADSs, for each share of ChipPAC Class A common stock. Following the consummation of the merger, STATS and ChipPAC stockholders will own approximately 54% and 46% of the combined company, respectively, on a fully-converted basis. Charles Wofford, Chairman of STATS, will remain Chairman of the combined company, Dennis McKenna, Chairman and Chief Executive Officer of ChipPAC, will be the Vice-Chairman, and Tan Lay Koon, President and Chief Executive Officer of STATS, will be the President and Chief Executive Officer of the combined company. The Board of Directors of the combined company will have 11 members, and is expected to be comprised of 7 current STATS directors and each of Messrs. Conn, Norby, Park and McKenna, current members of the ChipPAC board, who will be nominated for election by STATS shareholders. The new company is proposed to be named STATS ChipPAC Ltd, and it will be headquartered in Singapore.
Consummation of the merger is subject to certain conditions, including approval by ChipPAC and STATS stockholders, expiration of waiting periods under the Hart-Scott-Rodino Act, receipt of a private letter ruling from the Internal Revenue Service or opinions of outside legal counsel relating to the tax treatment of the merger for ChipPAC stockholders and other customary conditions. A vote of the majority of our outstanding Class A common stock will be required to approve the merger. Our board of directors has voted to approve the transaction and recommend that our stockholders vote to approve the merger. The transaction is expected to close during the second calendar quarter of 2004. There can be no assurance that the conditions to the merger will be satisfied or that the merger will close in the expected time frame or at all. Additional information, including a discussion of the background and our reasons for the merger, will be provided in the proxy statement/prospectus to be mailed to our stockholders. The information in this report is qualified in its entirety by the impact of this proposed merger on us and our stockholders.
Our Services
We offer semiconductor packaging and test services to the semiconductor industry for applications in communications, computing, consumer, automotive and industrial end markets. Approximately 86.1%, 84.5% and 86.2% of our revenue were derived from packaging services during the years ended December 31, 2003, 2002 and 2001, respectively. Approximately 13.9%, 15.5% and 13.8% of our revenue were derived from test and other services during the years ended December 31, 2003, 2002 and 2001, respectively.
Since customers require their suppliers to pass a lengthy and rigorous qualification process that can be costly to the customers, we believe they generally do business with only a few suppliers. As our services are considered part of the customers manufacturing infrastructure, we must have dedicated resources and systems to provide flexible manufacturing, quick-turns and real-time information transfers.
Packaging
We have provided independent semiconductor packaging and test services since 1984, and offer a broad range of packaging formats for a wide variety of electronics applications. Our two types of packaging services,
5
leadframe and advanced, contributed approximately 59.0% and 27.1%, respectively, of revenue for the year ended December 31, 2003.
Leaded Packaging
Leaded or leadframe packaging is the most widely used packaging type and is used in almost every electronic application, including automobiles, household appliances, desktop and notebook computers and telecommunications. Leaded packages have been in existence since semiconductors were first produced. A semiconductor die encapsulated in a plastic mold compound with metal leads surrounding the perimeter of the package characterizes leaded packages. With leaded packages, the die is attached to a leadframe (a flat lattice of leads) and very small gold wires are bonded (welded) to the chip and then welded to the leads to provide the interconnect. The chip is then encapsulated in plastic to form a package, with the ends of the leadframe leads protruding from the edges of the package to enable connection to a printed circuit board. This packaging type has evolved from packages design to be plugged into a printed circuit board by inserting the leads into holes on the printed circuit board to the more modern surface-mount design, in which the leads or pins are soldered to the surface of the printed circuit board. Specific packaging customization and improvements are continually being engineered to improve electrical and thermal performance, shrink package sizes and enable multi-chip capability.
We offer a wide range of lead counts and body sizes within this packaging group to satisfy customer die design variations. Our traditional leaded packages are at least two millimeters in thickness and include PDIP, PLCC, and SOIC. Our advanced leaded packages are thinner than our traditional leaded packages, approximately two millimeters in thickness or less, and generally have a finer pitch lead spacing, allowing for a higher pin count and greater functionality in a smaller package foot print. Our advanced leaded packages include MQFP, TQFP, iQUAD®, TSSOP and SSOP. Our acquisition of the Malaysian business in 2000 added power packages to our portfolio.
Power Packaging
Power semiconductors are used in a variety of end-markets, including telecommunications and networking systems, computers and computer peripherals, consumer electronics, electronic office equipment, automotive systems and industrial products. These end markets increasingly depend upon power regulation and control in the trend toward smaller devices and longer operating times. Packaging manufacturers are left to contend with shrinking chip geometries owing to continued emphasis upon greater mobility and portability. Power semiconductors typically involve higher current and voltage levels than memory, logic and microprocessor devices. The high current involved with switching on/off high voltages and the phase control of AC signals results in considerable power dissipated internally that produces heat. Thus our power packages are designed in such a way as to conduct the resultant heat away from the chip as power is dissipated, preventing the power device from being destroyed.
Power package assembly is somewhat different from non-power IC assembly as it often employs special solder alloys requiring different semiconductor bonding machines. Higher current levels of power semiconductors likewise require larger diameter aluminum and gold wire than non-power ICs to carry the load. Our Malaysian facility maintains a vast array of these special machines needed for power semiconductor assembly and test. With a current capacity of over 12.5 million units per week, we believe we are the industry leader in power package assembly supporting a number of the worlds major power semiconductor manufacturers, whose products are designed and used in power supplies, battery chargers, ignition modules, voltage regulators, motor controllers, ignition controllers and power management devices.
Advanced Packaging
Advanced substrate based packaging represents one of the fastest growing areas in the packaging industry and is used primarily in computing platforms, networking, hand held consumer products, wireless
6
communications devices, personal digital assistants, video cameras, home electronic devices such as DVDs and home video game machines.
Benefits of advanced packaging over leaded packaging include:
| | smaller size; |
| | greater pin count, or number of connections to the printed circuit board; |
| | greater reliability; |
| | better electrical signal integrity; and higher power dissipation |
| | easier attachment to a printed circuit board. |
BGA technology was first introduced as a solution to problems associated with the increasingly high lead counts required for advanced semiconductors. As the number of leads surrounding the integrated circuit increased, high lead count packages experienced significant electrical shorting problems. The BGA methodology solved this problem by effectively creating leads on the bottom surface of the package in the form of small bumps or solder balls. In a typical BGA package, the semiconductor die is placed on top of a plastic or tape laminate substrate rather than a lead frame. The die is connected to the circuitry in the substrate by a series of fine gold wires that are bonded to the top of the substrate near its edges. On the bottom of the substrate is a grid of metal balls that connect the packaged device to a printed circuit board.
We supply our customers with substantially the entire family of BGA packaging services offered in the marketplace today, including:
| | Ball Grid Array (BGA). Standard BGA packaging has a grid array of balls on the underside of the integrated circuit, and is used in high-performance applications, like personal computer chipsets, graphic controllers and DSPs. A BGA package generally has greater than 100 pins. BGA packages have better thermal and electrical performance than leaded packages. They also feature more advanced surface mount technology, allowing for easier handling in the packaging process. |
| | Chip-Scale. Chip-scale BGA, LFCSP, and BCC packaging includes all packages where the package is less than 1.2 times the size of the silicon die. Chip-scale BGA is a substrate-based package that is designed for memory devices and other medium pin count semiconductors and requires dense ball arrays in very small package sizes, like wireless telephones and personal digital assistants, video cameras, digital cameras and pagers. We also include LFCSP and BCC packages in this category. While they use a metal lattice instead of a laminate substrate, they are a chip-scale package serving these markets. |
| | System-in-Package. System-in-Package, or SiP, is a family of chip-scale-packages that contain several semiconductor die in one package, either stacked on top of each other or side by side. This technology allows greater functionality in the same package footprint and thickness without significant cost increase. These packages are used in wireless handsets, consumer products and mobile computing applications. |
| | Flip-Chip BGA. Flip-chip BGA packaging in which the silicon die is directly attached to the substrate using gold bumps instead of solder balls provides the most dense interconnect at the lowest cost and highest performance. Flip-chip BGA technology is used in a wide array of applications ranging from consumer products to highly sophisticated application specific integrated circuits, referred to as ASIC, computer chipsets, graphics and memory packages. While we believe that flip-chip BGA represents the next generation of BGA packaging technology, we believe that standard BGA and chip-scale BGA packaging will experience long life cycles as have many of our leaded packaging solutions. |
7
The following chart summarizes the different types of packaging services we offer and revenue for the year ended December 31, 2003. The full names of each packaging type are provided in the Glossary accompanying our registration statement on Form S-1 (Registration Number 333-39428).
| Year Ended December 31, 2003 |
Year Ended December 31, 2002 |
Year Ended December 31, 2001 |
Package Types |
Application | ||||||||||||||
| Revenue |
% of Total Assembly Revenue |
Revenue |
% of Total Assembly Revenue |
Revenue |
% of Total Assembly Revenue |
|||||||||||||
| (in millions) | (in millions) | (in millions) | ||||||||||||||||
| Leadframe | ||||||||||||||||||
| $ 103.6 | 28.0% | $ | 109.0 | 35.4% | $ | 104.9 | 37.0% | Traditional: | PDIP, PLCC, SOIC, SSOP, TSOP, TSSOP, SIP, DPAK, D2PAK, and TO220 |
Telecommunications automobiles, household, and appliances, and desktop and notebook computers | ||||||||
| $ 12.8 | 3.5% | $ | 13.3 | 4.3% | $ | 27.2 | 9.6% | Advanced: | MQFP, TQFP, LQFP, and iQUAD® |
Personal computers and telecommunications | ||||||||
| Advanced | ||||||||||||||||||
| $ 132.6 | 35.9% | $ | 112.3 | 36.6% | $ | 110.9 | 39.2% | BGA: | PBGA, M2BGA® TBGA, EBGA, and Flip PAC |
Personal computer chipsets, graphic controllers high-end network servers products, application specific integrated circuits, microprocessors and memory packages. | ||||||||
| $ 120.7 | 32.6% | $ | 72.9 | 23.7% | $ | 40.2 | 14.2% | Chip Scale Packages: |
EconoCSP, M2CSP®, Micro BGA, LFCSP, BCC, and Flip Chip CSP |
Wireless telephones, personal digital assistants, video cameras, wireless pagers, and wireless LAN | ||||||||
Test Services
We also provide our customers with semiconductor test services for a number of device types, including mixed-signal, digital logic, memory, power and RF devices. Semiconductor testing measures and ensures the performance, functionality and reliability of a packaged device, and requires knowledge of the specific applications and functions of the devices being tested. In order to enable semiconductor companies to improve their time-to-market, streamline their operations and reduce costs, there has been an increasing trend toward outsourcing both packaging and test services. We have capitalized on this trend by enhancing our test service capabilities. Our test revenue increased 5.9% from 2002 to 2003. The acquisition of the Malaysian business expanded our mixed-signal tester base and provided us with critical expertise for testing RF devices, one of the fastest growth areas for test outsourcing. We have also noted an increased demand from our customers to provide both assembly and test services on a full turn-key basis.
In order to test the capability of a semiconductor device, a semiconductor company will provide us with its proprietary test program and specify the test equipment to run that program. Alternatively, our customers at times may consign their test equipment to us. The devices to be tested are placed into a socket-custom load board by an automated handling system, which is connected to the test equipment, which then tests the devices using software programs developed and supplied by our customers. The cost of any specific test and the time required to conduct it, ranging from a few milliseconds to several seconds, varies depending on the complexity of the semiconductor device and the customers test program.
8
Other Services
We also provide a full range of other value-added services, including:
| | Design and Characterization Services. We offer design and characterization services at our Arizona, South Korea, Malaysia and China facilities. Our design engineers at these facilities select, design and develop the appropriate package, leadframe or substrate for that device by simulating the semiconductors performance and end-use environment. |
| | Dry Pack Services. In order to prevent the failure of any semiconductors due to exposure to moisture during shipping, we dry pack many of our packaged integrated circuits in specially sealed, environmentally secure containers. |
| | Tape and Reel Services. Many electronic assembly lines utilize tape and reel methods in which semiconductors are placed into a pocket tape to enable faster attachment to the printed circuit board. We offer a service in which we ship packaged and tested devices on a tape and reel mechanism rather than in a tray, to facilitate the assembly process. |
| | Warehousing and Drop Shipment. In order to enable semiconductor companies to improve their time-to-market and reduce supply chain and handling costs, we offer warehousing and drop shipment services in which we ship packaged semiconductor devices directly to our customers customers. |
| | Wafer Probe. We offer a wafer sort service where an electrical test is performed on the die while still in wafer form. This process identifies suitable die on each wafer which can be assembled into a final package. |
Customers
In 2003, we continued to diversify and broaden our customer base to over 90 customers worldwide. Our customers are comprised of companies in the semiconductor industry located primarily in the United States of America. Our customers include some of the largest semiconductor companies in the world. There were four customers in 2003 and five customers in 2002 that each accounted for more than 10% of our total sales. These customers include Fairchild Semiconductor International, Inc., Intel Corporation, Intersil Corporation, LSI Logic Corporation and nVIDIA Corporation. Our largest single customer accounted for 15.9% and 16.6% of our total sales in 2003 and 2002, respectively. We anticipate that this customer concentration will decrease as our business grows with new customers with whom we have already become qualified and as we add new customers with whom we are currently undergoing qualification.
Our customers are located around the world, but principally in the United States of America. We report geographic distribution of revenue based on the location of our customers headquarters. The following table details the percentage of total revenue we received from the United States, Asia and Europe:
| Year Ended December 31, |
|||||||||
| 2003 |
2002 |
2001 |
|||||||
| United States of America |
86 | % | 89 | % | 92 | % | |||
| Asia |
12 | 10 | 6 | ||||||
| Europe |
2 | 1 | 2 | ||||||
| Total |
100 | % | 100 | % | 100 | % | |||
In general, our customers rely on at least two sources for packaging. A packaging and test service company must pass a lengthy and rigorous qualification process that typically takes three to six months, and typically costs the customer approximately $250,000 to $300,000. Once a primary packager has been selected, that packager gains insight into its customers business operations and an understanding of its products as part of the overall working relationship. These factors, combined with the pressures of a semiconductor company to meet the time-
9
to-market demands of its customers, result in high switching costs for semiconductor companies, making them adverse to changing or adding additional suppliers. We have been successful in attracting new customers because we are one of a few independent packaging and test companies that offers packaging, test and distribution services for a full portfolio of packages. Also, new customers are drawn to our advanced technologies.
Marketing, Sales and Customer Support
We provide sales support to our customers through an international network of offices coordinated from our British Virgin Islands company:
| | United States of America: |
| | Chandler, Arizona |
| | Fremont, California |
| | Longmont, Colorado |
| | Palm Bay, Florida |
| | Northborough, Massachusetts |
| | Austin, Texas |
| | Dallas, Texas |
| | Shanghai, China, |
| | Tokyo, Japan, |
| | Kuala Lumpur, Malaysia, |
| | Kampen, Netherlands, |
| | Singapore |
| | Ichon, South Korea, |
| | Seoul, South Korea, and |
| | HsinChu City, Taiwan |
Our account managers, applications engineers, customer service representatives and sales support personnel form teams that focus on a specific customer or geographic region.
Customers generally deliver rolling six month forecasts and release production die to us in daily or weekly increments for packaging, test and distribution. These near-term forecasts guide us as to anticipated volumes, but provide no meaningful backlog statistics. Substantially all of our materials inventory is purchased based on customer forecasts, we carry relatively small quantities of raw material inventory and we have relatively low levels of finished goods inventory.
Our marketing efforts focus on creating a brand awareness and familiarity with our advanced device packaging technologies and an understanding of our end-user market applications in wireless handset and PDA graphics, PC chipsets, wireless LAN, memory, storage and networking. We market our leadership in advanced packaging, test technology, and distribution and our ability to supply a broad line of packaging and test services to the semiconductor industry. We target engineers and executive level decision makers through a direct sales force, the delivery of white papers at industry conferences, mailings of technical brochures and newsletters, advertisements in trade journals and our website.
10
Suppliers
Our packaging operations depend upon obtaining adequate supplies of materials on a timely basis. The principal materials used in our packaging process are lead frames, rigid and flexible substrates, gold wire, molding compound, epoxy, tubes and trays. We purchase materials based on the demand forecasts of our customers. Our customers are generally responsible for the costs of any unique materials that we purchase but do not use, particularly those lead frames and substrates that are ordered on the basis of customer-supplied forecasts. We work closely with our primary materials suppliers to insure the timely availability of materials supplies, and we are not dependent on any one supplier for a substantial portion of our materials requirements. We had no significant long-term agreements with materials suppliers in 2003. The materials we procure are normally available and we are able to meet our production requirements from multiple sources through periodic negotiation and placement of written purchase orders. We typically combine our global requirements into centrally negotiated blanket purchase orders to gain economies of scale in procurement and more significant volume discounts. Should material become scarce, we would look to enter into long-term supply agreements with key suppliers. In 2003, approximately 33% of our substrate costs were incurred from the purchase of materials from supplies located in South Korea, down from 79% in 2002. The balance of our substrate purchases was from suppliers in Japan and Taiwan.
Our packaging operations and expansion plans also depend on obtaining adequate quantities of equipment on a timely basis. To that end, we work closely with our major equipment suppliers to insure that equipment deliveries are on time and the equipment meets our stringent performance specifications. We expect that equipment lead times will lengthen in 2004 based on increased demand in the semiconductor equipment market.
Intellectual Property
Our ability to develop and provide advanced packaging technologies and designs for our customers depends in part on our proprietary know-how, trade secrets and other patented and non-patented, confidential technologies, which we either own or license from third parties. We have licenses to use numerous third party patents, patent applications and other technology rights, as well as trademark rights, in the operation of our business. We believe that these licenses are renewable under normal commercial terms once they expire.
Our primary registered trademark and trade name is ChipPAC®. We own or are licensed to use other secondary trademarks.
Research and Development
Our research and development efforts are focused on developing new packages, design, assembly and test technologies and on improving the efficiency and capabilities of our existing packaging and test services. Technology development is a basic competence of ChipPAC and a key competitive factor in the packaging industry. We have invested considerable resources and we are among the leaders in new product and technology development. Our web based proprietary design and performance characterization, SmartDESIGNTM capability, provides the shortest time-to-market with predictable performance.
During the past two years, we have introduced the following new package families:
| |
M2CSP® | Molded multi-die chip scale package family with the following chip-stack combinations in package profile thickness ranging from 1.0 to 1.4mm: | ||
| ü | Two-chip stack, same chip size | |||
| ü | Three-chip stack, pyramid stack | |||
| ü | Three-chip stack with the two chip same size | |||
| ü | Three-chip stack with three chip same size | |||
| ü | Four-chip stack, pyramid stack | |||
| ü | Four-chip stack with two chips same size | |||
| ü | Four-chip stack with three chips same size | |||
11
| |
LFCSP | Lead frame chip scale package | ||
| |
BCC, BCC+, BCC++ | Bumped Chip Carrier package family | ||
| |
G4 | Gigabit-Green-Gold-to-Gold flip chip interconnection package family of CSPs and BGAs | ||
| |
TEBGA+ | Thermally enhanced ball grid array family with integrated passive components | ||
| |
TEBGA-II | Higher thermal performance TEBGA | ||
| |
FC-MPM | Flip Chip Multi Package Module family module | ||
| |
FC-CSP | Lead Free Flip Chip-Chip Scale Package | ||
Materials engineering plays a critical role in advanced packaging and has enabled us to develop environmentally friendly, lead free, and halogen free packaging, which is required by several of our customers.
We have established four design centers where new packages are designed and fully characterized for performance and tested both for package and system level reliability to meet end customer needs.
During 2003, 2002 and 2001, we spent approximately $11.7 million, $10.1 million and $14.2 million, respectively, on research and development. The increase in spending in 2003 is due to the timing of projects and on increase in the number of package family introductions. Employee headcount in research and development went up by 16.8% in 2003, compared to 2002 and went up by 9.2% in 2002, compared to 2001.
Competition
The packaging and test industry is highly fragmented. Our primary competitors and their primary locations are as follows:
| | Advanced Semiconductor Engineering, Inc.Taiwan |
| | Amkor Technology, Inc.South Korea, Japan, Taiwan and the Philippines |
| | ASE Test LimitedSouth Korea, Taiwan and Malaysia |
| | Siliconware Precision Industries Co., Ltd.Taiwan |
Each of these companies has significant packaging capacity, financial resources, research and development operations, marketing and other capabilities, and has some degree of operating experience. These companies also have established relationships with many large semiconductor companies, which are current or potential customers of ours. We also compete with the internal packaging and testing capabilities of many of our largest customers. We believe the principal elements of competition in the independent semiconductor packaging market include time-to-market, breadth of packaging services, technical competence, design services, quality, yield, customer service and price. We believe that we compete favorably in these areas.
In general, our customers principally rely on at least two independent packagers. A packaging company must pass a lengthy and rigorous qualification process that can take a minimum of three months for a typical leaded package and can take more than six months for a typical BGA package. Once a primary packager has been selected, that packager gains insight into its customers business operations and an understanding of its products as part of the overall working relationship. These factors, combined with the pressures of a semiconductor company to meet the time-to-market demands of its customers, result in high switching costs for semiconductor companies, making them adverse to changing or adding additional suppliers. We have been successful in attracting new customers because we are one of a few independent packaging and test companies that offers packaging, test and distribution services for a full portfolio of packages.
12
Employees
As of December 31, 2003, we employed 6,319 full-time employees, of whom approximately 139 were employed in research and development, 5,850 in packaging and test services and 330 in marketing, sales, customer service and administration.
Approximately 1,200 of our employees at the Ichon, South Korea facility are represented by the ChipPAC Korea Labor Union and are covered by collective bargaining and wage agreements. The collective bargaining agreement, which covers basic union activities, working conditions and welfare programs, among other things is effective through May 1, 2005 and the wage agreement is effective to May 1, 2004. We believe that we have good relationships with our employees and the union.
SEC Reports
Our annual reports on Form 10-K, quarterly reports on Form 10-Q, current reports on Form 8-K, and all amendments to these reports filed with the U.S. Securities and Exchange Commission, are available for review free of charge on our website at www.chippac.com as soon as reasonably practicable after such material is electronically filed or furnished to the Commission.
Our corporate headquarters are located in Fremont, California, and we provide all packaging, test and distribution services through facilities in Ichon, South Korea, Shanghai, China and Kuala Lumpur, Malaysia. The Ichon facility was founded in 1985 and the Shanghai facility was founded in 1994. We acquired the Kuala Lumpur facility in 2000. Both the Ichon and Shanghai facilities are ISO-14001 certified and QS-9000 certified. The Kuala Lumpur facility is ISO-9002, QS-9000 and ISO-14001 certified.
The following chart summarizes the information about our main facilities:
| Facility Location |
Leased/Owned |
Sq. Ft. |
Functions/Services |
Principal Packaging | ||||
| Fremont, California |
Leased |
56,320 | Executive Offices, Research and Development, Sales, Marketing and Administration | Sales, Marketing, Administration and Design Review Services | ||||
| Chandler, Arizona |
Leased |
5,357 | Research and Development, Sales and Marketing | Design and Characterization Services | ||||
| Shanghai, China |
Owned(1) |
442,000 | Packaging and Test Services, Research and Development, Warehousing Services Distribution Services | Leaded IC, Chip-Scale, BGA, Packaging and Test | ||||
| Ichon, South Korea | ||||||||