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UNITED STATES

SECURITIES AND EXCHANGE COMMISSION

WASHINGTON, DC 20549

FORM 10-K

For the fiscal year ended December 31, 2003

or

For the transition period from                              to                             

Commission File Number: 000-32417

VERISITY LTD.

(Exact name of registrant as specified in its charter)

(650) 934-6800

(Registrant’s telephone number, including area code)

Indicate by check mark whether the registrant: (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days.    Yes  x    No  ¨

Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K.  ¨

Indicate by check mark whether the registrant is an accelerated filer (as defined in Rule 12b-2 of the Exchange Act).    Yes  x    No  ¨

The aggregate market value of the voting shares held by non-affiliates of the registrant, based upon the closing sale price of the ordinary shares on June 30, 2003, as reported on the Nasdaq National Market, was approximately $92,582,083. Ordinary shares held by each executive officer and director and by each person who owns 5% or more of the outstanding ordinary shares have been excluded in that such persons may be deemed to be affiliates. This determination of affiliates status is not necessarily a conclusive determination for other purposes.

Securities registered pursuant to Section 12(b) of the Act:

None

Securities registered pursuant to Section 12(g) of the Act:

Ordinary shares, par value 0.01 NIS per share

As of January 31, 2004, there were 20,403,410 of registrant’s ordinary shares, par value 0.01 NIS per share, outstanding.

DOCUMENTS INCORPORATED BY REFERENCE

Part III incorporates certain information by reference from the registrant’s definitive proxy statement (the “Proxy Statement”) for the 2004 Annual General Meeting of Shareholders.

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VERISITY LTD.

ANNUAL REPORT ON FORM 10-K

For the Year Ended December 31, 2003

INDEX

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Some of the statements contained in this Form 10-K are forward looking statements, including but not limited to those specifically identified as such, that involve risks and uncertainties. The statements contained in this Form 10-K that are not purely historical are forward-looking statements within the meaning of Section 27A of the Securities Act and Section 21E of the Exchange Act, including, without limitation, statements regarding our expectations, beliefs, intentions or strategies regarding the future. All forward-looking statements included in this Form 10-K are based on information available to us on the date hereof, and we assume no obligation to update any such forward-looking statements. These statements involve known and unknown risks, uncertainties and other factors, which may cause our actual results to differ materially from those implied by the forward-looking statements. In some cases, you can identify forward-looking statements by terminology such as “may,” “will,” “should,” “expects,” “plans,” “anticipates,” “believes,” “estimates,” “predicts,” “potential,” or “continue,” or the negative of these terms or other comparable terminology. Although we believe that the expectations reflected in the forward-looking statements are reasonable, we cannot guarantee future results, levels of activity, performance or achievements. Important factors that may cause actual results to differ from expectations include those discussed in “Risk Factors”.

PART I

ITEM 1.    BUSINESS

Overview

Verisity Ltd. (“Verisity” or “we”) provides proprietary technologies and software products used to efficiently verify designs of electronic systems and complex integrated circuits that are essential to virtually every high growth segment of the electronics industry. Our functional verification products automate critical steps in the process of determining whether systems and integrated circuits, or ICs, conform to their design specifications. By facilitating the identification of design flaws, we enable our customers to deliver higher quality products to market in less time, while helping them to reduce product development costs.

Verisity Ltd., an Israeli corporation, was founded in September 1995 and commenced operations in January 1996. We wholly own the following subsidiaries: (1) Verisity Design, Inc.—founded in June 1996, and located in the U.S., (2) Verisity Design EURL—headquartered in France, founded in July 1999, and includes U.K. operations as well, (3) Verisity Design GMBH—founded in Germany in September, 1999, includes operations in Sweden, (4) Verisity Design Canada—founded in Canada in July 2000, and (5) Axis Systems acquired February 9, 2004.

We make available free of charge on or through our Internet website our annual reports on Form 10-K, quarterly reports on Form 10-Q, current reports on Form 8-K and all amendments to those reports as soon as reasonably practicable after such material is electronically filed with or furnished to the Securities and Exchange Commission. Investors can find these reports on the Investor Relations web site located at http://www.verisity.com.

Industry Background

The communications, consumer electronics and computers segments as well as other segments of the global electronics industry continue to expand. Within these segments, devices such as high speed network routers, mobile telephones, personal digital assistants and Internet appliances are revolutionizing the way businesses and consumers interact and exchange information. These devices are all examples of complex electronic systems that are comprised of ICs, which implement their key functions. Over the past decade, rapidly growing demand for smaller, faster, more power efficient and increasingly reliable communications and computing devices has created a significant market opportunity for companies to develop more complex systems and ICs that integrate a greater number of highly sophisticated functions.

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Advances in system and IC complexity

During the past two decades, systems and the ICs used within them have become increasingly complex in response to business and consumer demand. In 1980, the most complex ICs contained tens of thousands of transistors, which are the basic building blocks of ICs. Today’s most complex ICs contain over a hundred million transistors and are designed to perform a growing number of sophisticated functions. Some of these complex ICs, known as systems-on-chips, or SoCs, integrate a microprocessor, which controls the logic functions of the device, with other functional modules such as memory and digital signal processors onto a single chip. Only a few years ago each of these functions required a separate IC or even an entire circuit board. For instance, today’s most advanced mobile telephones contain a single SoC that performs all the traditional telephone functions and integrates advanced functions such as address books, organizers and web browsers. Consequently, these phones are smaller, more reliable and have longer battery lives than earlier product generations. Gartner Dataquest estimates that the worldwide market for SoCs will grow from $26 billion in 2002 to $55 billion in 2007, which represents a compounded annual growth rate of approximately 17%.

Companies that design and sell ICs often use one or more off-the-shelf design modules to reduce costs and improve time-to-market of their SoC products. These reusable designs, known as intellectual property modules, or IP cores, can include microprocessors, communication cores and other functional modules and are often licensed from independent third parties, known as IP providers. The growth in demand for complex ICs, particularly SoCs, has created an increased need for IC designers to integrate quickly and accurately IP cores onto a single chip. Gartner Dataquest estimates that the third party market for IP grew from $891.5 million in 2001 to approximately $933.8 million in 2002, which represents an annual growth of 5%.

Challenges of functional verification

Every new system, IC and IP core design must be verified to detect and eliminate discrepancies, known as design flaws, between the specifications and the implementation of its design to ensure that the manufactured device functions properly. Functional verification is the engineering process of determining, before fabrication, whether a system, IC or IP core design behaves as described in its specification. As new generations of systems and ICs expand in complexity, their designs pose far greater challenges to functional verification due to greater numbers of transistors, the integration of reusable IP cores and more elaborate SoC designs. In fact, the verification complexity grows exponentially more than the complexity of the design itself. These sources of additional complexity place a greater burden on the tools and resources that engineers typically employ in the functional verification of each new system and IC design.

For most of the past decade, the functional verification process has generally relied upon software simulators to mimic the behavior of the design. To identify design flaws, engineers use these simulators to run a large number of different test scenarios against descriptions of the design that are typically written in special-purpose software languages. Engineers who use this approach to functional verification create test plans that attempt to both identify the most important areas of the design for testing and describe the numerous real world scenarios that the design must be capable of addressing.

As designs have become increasingly more complex, creating the number and types of test scenarios sufficient to identify all potential design flaws has moved beyond the capacity of the human brain. In addition, the performance improvements of the software simulators have not kept up with the throughput requirements to thoroughly test new system level ICs. As a result, system and IC designers have deployed more engineering and computing resources to address functional verification. Today, functional verification typically accounts for between 50% and 70% of the total development resources devoted to electronic systems and complex ICs. This has created a shortage of trained verification engineers, resulting in a significant bottleneck in the overall time-to-market for many new products. Gartner Dataquest identifies the ESL (Electronic System Level) Test and Verification sub-application as a “hot area” and expects significant growth, because “verification is driving the move to the ESL”. They report that the ESL Test and Verification market (in which we sell our products) is expected to expand at a

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compounded annual growth rate of 36% from 2002 through 2007. According to Gartner Dataquest, Verisity still maintains its market share lead and had 55% of the ESL Test and Verification market in 2002.

The growing need for improved functional verification solutions

Traditionally, companies that design and sell systems and ICs, developed many of their own functional verification tools. In-house tools are generally not sophisticated enough to handle today’s complex system and IC designs. Functional verification using these tools tends to be manual and time consuming and often fail to find many elusive design flaws, such as ambiguous specifications and unforeseen usage scenarios. Without tools that automate verification processes and best practices, and a new generation simulation technology that scales to the system level, companies can no longer count on their development teams to deliver timely and effective results. Engineering teams are unable to predict the quality or timeliness of their projects, managers are unable to effectively utilize human and compute resources, and executives expose themselves to significant direct costs and market opportunity costs.

Design flaws that are discovered in the manufactured device can be costly, requiring the redesign and remanufacture of the IC, a process commonly referred to as a re-spin. Multiple re-spins are common before the first commercial shipment, with costs ranging from hundreds of thousands of dollars to over $1 million for each re-spin of today’s typical 0.13 micron or 0.09 micron application-specific IC. Re-spins also disrupt production planning and consume valuable engineering resources.

Beyond these costs, the financial and strategic consequences of an undiscovered design flaw can be severe and include the following:

The Verisity Solution

We provide proprietary technologies, methodologies, and software products that address the growing need for automating the entire functional verification process for system and IC designs. Our verification process automation (VPA) portfolio of products, led by our top selling Specman Elite, automate and enhance the process of detecting design flaws in systems and ICs before they are manufactured. While dramatically increasing the engineering productivity, time to market, development predictability, and end product quality.

In December, 2003, Verisity announced a definitive agreement to acquire Axis Systems, Inc., a Delaware corporation (“Axis” or “Axis Systems”). This transaction, which is expected to enable Verisity to provide a comprehensive and highly differentiated VPA platform that will take projects from specification to verification closure, closed as of February 9, 2004. Axis has three main products that will be integrated with various Verisity products in 2004 and beyond. The key technology acquired from Axis is a third generation simulation technology that can serve as a software simulator, an accelerator, or an in-system emulator. This technology is packaged into three tightly linked solutions: (i) Xsim, a mixed Verilog, VHDL, and SystemC event-based simulator, (ii) Xtreme, a recompiled version of the simulator that is targeted to run on a high performance parallel processing machine, and (iii) XoC, an extension of Xtreme that enables the co-verification of hardware with embedded software.

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Our products solve critical functional verification challenges

We enable our customers to realize these critical business objectives with products that provide the following key benefits to the process of functional verification:

Our Strategy

Our business objective is to establish our proprietary technologies, methodologies, and software products as the industry standard for the functional verification of system, IC and IP core designs required by the communications, consumer, computers and other high growth segments of the electronics industry. We intend to accomplish this through internal development and strategic acquisition of these technologies and products as well as through strategic alliances.

To achieve the above objectives, we are pursuing the following key business strategies:

Expand Verisity’s VPA portfolio from test bench automation at the logic level to the automation of all hardware, system, and project level processes that ensure total system and project success.

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Continue to expand Verisity’s partnership programs to maximize reach and influence across the industry design chain

In order to proliferate our products, we are leveraging marketing and sales channels outside of our organization that we believe will enable us to accelerate our sales growth. To carry out our strategy, we have created and implemented the following programs and alliances:

Establish our e verification language as the industry standard

Specman Elite utilizes e, a specialized functional verification software language that is a key enabler for Verisity’s unique process automation solution. Verisity is promoting e more aggressively to ensure accelerated adoption and interoperability with key partner solutions. The elements of this strategy include:

Continue to invest in research, development and customer-focused product innovation

We believe that we are a technology leader in the functional verification market segment and that we have one of the largest and most experienced engineering teams focused solely on this segment. We intend to maintain this position by broadening the scope of solutions to address new critical challenges our customers face. We will be responding with product innovations based on leading-edge research and development. We believe that by continuing to work closely with our highest end systems and IC customers, we will be able to develop product

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innovations specific to their particular requirements. We will then productize these innovations and take them to the broader market. We will continue to invest in research and development and customer-focused innovations to extend the capabilities of our products, and introduce new ones, while expanding interoperability with complementary third-party products.

Focus on high growth market segments

We will continue to focus our research and development efforts on product innovations targeting high growth market segments such as communications, consumer electronics and computers. Within these market segments, we will continue to focus our sales and marketing efforts on industry leaders. We also plan to maximize the proliferation of our products and encourage their widespread adoption within key targeted customers. In addition, we will continue to enhance existing products and develop new ones that are particularly focused on the functional verification needs of our targeted customer base.

Products

We offer a suite of sophisticated products that address the critical need to improve the functional verification of electronic system and complex IC designs.

Specman Elite

Our flagship Specman Elite software product is at the core of our product line. It automates the overall process of functional verification at the block, chip and system levels. Specman Elite improves the overall quality of a design by detecting many subtle design flaws through its ability to rapidly generate real world test scenarios for the design being verified. It also increases engineering productivity by automating manual processes such as developing verification environments, generating tests, checking results and analyzing coverage.

Our e language and e reuse methodology manual (eRM) enables the rapid creation of powerful, reusable verification environments that can work with any simulator, including our recently acquired simulator from Axis Systems. e enables engineers to efficiently extract and describe the rules from a design project’s specifications, such as restrictions on inputs, protocols and test scenarios. It also allows the specification of constraints that constrain the generator from creating illegal stimulus, and coverage points that Specman’s coverage engines can monitor for metric generation.

Specman Elite now offers additional levels of abstraction and automation to enable full SoC chip and system level verification. This includes the use of higher level constructs called sequences, coupled with the ability to automatically generate system level scenarios using a technology we call multi-channel generation.

vManager

vManager is a new product that enables verification and project managers to coordinate distributed and multi-level verification activities from specification to verification closure. vManager enables managers to capture the system specifications and test plans in an executable, reusable form. It then supports the monitoring, direction, and control of verification resources to ensure that the optimal choice of automated tests is created that will cover all aspects of the verification plan. Visibility is provided through analysis of resource utilization, coverage, and failures that are occurring during the verification runs. As a result, vManager provides a new level of predictability and compute resource utilization, and serves the master controller for the overall verification process.

Verification Advisor

Our Verification Advisor product provides our customers with an extensive collection of verification methodologies designed to accelerate the use of our Specman Elite product. These methodologies and example

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templates written in e reflect our recommended “best practices” to address real world functional verification problems. These are organized in an easy-to-use database accessible via any standard web browser. For example, an engineer who needs advice on implementing a test plan could access Verification Advisor to quickly find suggestions and examples for that purpose. In many cases, Verification Advisor reduces the amount of time needed to create verification environments. Furthermore, because Verification Advisor accelerates the learning process of engineers, it decreases our cost of customer support.

e Verification Components

An e Verification Component (eVC) is a complete verification environment including stimulus generation, checking and monitoring, and functional coverage reporting. Each eVC is configurable and extensible to easily satisfy specific verification environment requirements. In addition, since eVCs are plug-and-play, they can be intermixed within a verification environment. By using eVCs to verify standard protocols, interfaces and processors, engineering resources are focused on maximizing the product’s proprietary value-add.

eVCs provide numerous advantages to verification teams including a major increase in productivity and higher quality products. With an eVC, verification environments are created in days instead of weeks or months. Tests can begin to be written much earlier and verification is completed faster. Because an eVC is pre-verified, engineering teams can be confident in their quality and completeness.

Currently Verisity provides eVCs for PCI Express, PCI-X, PCI, AMBA, AHB, USB, and Ethernet.

eRM and sVM

Our eRM provides dramatic productivity gains through its comprehensive set of best-known methods for e Verification Components development practices and Specman Elite functionality to deliver reusable, consistent, and extensible, plug-and-play verification environments and e Verification components. With eRM, e environments and e Verification Components are developed using consistent terminology, architecture, coding style and packaging—thereby eliminating incompatibility issues and creating a pool of truly reusable and interoperable verification components.

sVM is a new methodology describing how chip and system level verification can be automated. It describes how to rapidly compose e Verification Components and use higher abstractions to build system level verification environments. It also describes how to leverage new generation technology to automatically create system level scenarios.

eAnalyzer

eAnalyzer is a new product that statically analyzes e code to ensure that it meets the coding guidelines described in eRM, sVM and vAdvisor. eAnalyzer therefore enables the rapid proliferation of Verisity’s advanced methodologies. This enables higher engineer productivity with few mistakes, more effective verification and associated quality, and more rapid proliferation of best practices.

eCelerator

eCelerator is our new testbench acceleration tool that gives customers access to the automated verification capabilities of Specman Elite in combination with the high performance of hardware-assisted verification. The testbench acceleration enabled by eCelerator allows verification engineers to run portions of test scenarios written in the e verification language on standard hardware verification platforms, known as emulators or accelerators, including the platforms acquired from Axis Systems. The ability to accelerate the simulation of testbenches is particularly critical when verifying the designs of complex systems and SoCs.

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Invisible Specman

Our Invisible Specman product is a special purpose version of Specman Elite that verifies IP core integration within SoC designs. Invisible Specman simplifies the effort required to integrate IP cores by operating as a seamless and invisible portion of the verification environment during simulation, with minimal user interaction other than alerting the user whenever it discovers an integration flaw in the design. As part of our Pure IP program, we license Invisible Specman to IP providers, which bundle the software with their IP cores as a portion of their own verification toolkits for delivery to their customers. This provides us with an additional sales entry point to those customers for our standard Specman Elite product.

SureCov

Our SureCov software product is fully automated and enables engineers to determine the extent to which their design code has been simulated. SureCov allows engineers to distinguish which portions of the design code have been sufficiently exercised and which require further effort. In addition, SureCov provides engineers with the ability to determine if any tests are redundant, and to define an optimal sequence of tests, in order to save valuable simulation time.

Customer Service and Support

Our functional verification products are designed to enable ease of use, to increase the productivity of our customers’ engineers and to comply with industry standards. Our customers use our products to verify the designs of systems, ICs and IP cores developed by their engineers. We recognize that each of our customers has specific requirements and issues that need to be addressed during both the initial implementation of our functional verification technology and the ongoing use of it. We believe that a high level of customer service and support is critical to our continued success. As a result, we have developed and continue to enhance our customer service and support programs to address our customers’ needs.

We also support customers who license our products through paid maintenance and support services. These support services include periodic product updates, if and when available, and remote technical support through electronic mail, web based systems and telephone hotlines from our Mountain View, California and Rosh Ha’ain, Israel locations. These support services are generally sold when one of our customers purchases either a time-based license or a perpetual license to use our products. Each year, we have released one or more new updates to our products. Our customers with perpetual licenses or time-based licenses with terms greater than one year may elect to renew maintenance on an annual basis.

Customers

We license our functional verification products to the designers of systems, ICs and IP cores, for use in products specifically developed for the communications, computers, business automation, consumer electronics, and other high growth electronic device markets. Within these market segments, our customers can use our products to verify designs in the following applications:

In 2003 two customers accounted for 12.2% and 11.4% of total revenue. The loss of such customers would have a material adverse effect in the Company as a whole. See also the ‘Risk Factors.”

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Strategic Programs and Alliances

We have created several strategic programs and industry alliances to support our business strategies, with a particular focus on accelerating the proliferation of our products and building greater barriers to competition.

Pure IP program

Through our Pure IP program, we build alliances with Specman Elite customers that are either influential independent IP providers or semiconductor companies that also provide IP cores. These companies, which include ARM, LSI Logic and Rambus, can deliver our Invisible Specman product as part of the verification toolkits they deliver to their IP customers. They benefit from participating in our program by reducing the cost of supporting their IP customers through the difficult task of verifying the integration of the provider’s IP cores into their customers’ designs. We benefit from our Pure IP program by obtaining significant industry endorsements from these influential leaders in the semiconductor and independent IP provider industries. This usage and endorsement generates greater market demand for Specman Elite.

LicenseE program

Our LicenseE program enables tool vendors to license our e language for use as an interface to their products. These vendors benefit by leveraging our existing customer base familiar with e in an effort to proliferate their products more rapidly. We benefit by further proliferating e as an industry standard, and by improving the interoperability of our products with those of other vendors. Among the several companies that have participated in this program, include: @HDL, Averant, Axis Systems, NoBug Consulting, Novas Software, Prover Technology, STARC, SynaptiCAD and TNI-Valiosys. In addition to commercial partners, customers have joined the LicenseE program in order to help drive the e verification language to be an open, public standard. These customers include: ARM, Cisco Systems, Infineon Technologies, LSI Logic, PMC-Sierra and ST.

Verification Alliance program

To improve time-to-market and to supplement their internal engineering resources, a growing number of companies that design systems and ICs utilize outside consultants for assistance with their functional verification efforts. Our Verification Alliance program grants consulting organizations access to our suite of advanced verification products and to our existing customer base. The program enables the proliferation of our functional verification tools and underlying methodologies, including the e verification language. We currently have over 40 consulting organizations and consultants enrolled in the program, located in the United States, Europe, Israel and Asia. In addition, several of these companies are now developing commercial e Verification Components as part of their business model.

University Program

Our University Program was developed to support educational institutions in their verification-related education and research. The program unites us with universities all over the world in providing engineers with open access to our tools and the e verification language. Some of the members in the program include: Carnegie Mellon University; UC Berkeley; University of Michigan; Purdue University, University of Texas-Austin and Technion Israel Institute of Technology.

Interoperability with key vendors and technologies

Today’s functional verification methods integrate several technologies and products from multiple vendors to form a single solution. Because our products are designed to automate the process of functional verification, they must interoperate with all common verification tools. In this respect, we have developed many interfaces, and are members of the key industry interoperability programs, including the Cadence Connections Program with Cadence Design Systems, the in-Sync Program from Synopsys and the VAP Program from Mentor Graphics’ Model Technology.

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In addition, we have an interoperability program for companies in the Electronic Design Automation industry called VIP (Verisity Interoperability Partner) Program to enable other companies in that industry to develop and test integrations to our products. Current members in the VIP program include: 0-in, Aldec, Aptix Corporation, Axis Systems, Cadence Design Systems, CoWare, Denali Software, Emulation and Verification Engineering, Fintronics, ISS, Mentor Graphics, Model Technology, Novas Software, Provis Software, Runtime Design Automation, Summit, Synopsys, Tharas Systems, TNI-Valiosys SA, and Veritools. We have also formed deeper alliances with several companies that provide for the joint development and marketing of solutions and often extend into channel cooperation and training. These alliances help us supplement our existing channels, provide differentiated solutions to our customers and gain endorsements for our products from some of the most influential vendors to our customer base.

Marketing and Sales

Marketing

We focus our marketing efforts on creating and increasing market awareness of our products, creating alignment and strategic initiatives with key industry partners, defining and launching new products, and generating leads for our sales organization. Our marketing strategy is designed to expand the market, further differentiate the company, communicate higher level value propositions, and create more demand for our functional verification solutions.

We employ a wide variety of marketing communications channels to inform existing customers and potential new customers about our products. These channels include trade shows, print and web advertising, our website, public relations, hosting user conferences and publication of our quarterly newsletter.

Direct sales

We license our software products to customers primarily through our direct sales organization. As of December 31, 2003, our direct sales staff totaled 73 employees located in 23 sales offices. Our sales staff includes both sales personnel and consulting engineers, who are our field engineers.

Our sales personnel and consulting engineers operate out of our sales and customer support offices in the following North American locations: Austin, Texas; Lake Forest, Illinois; Plano, Texas; Denver, Colorado; Mountain View, California; Ottawa, Canada; Paradise Valley, Arizona; Scotsdale, Arizona; Tigard, Oregon; Research Triangle Park, North Carolina; San Diego, California; Irvine, California; Monroe Township, New Jersey; Redmond, Washington; New York City, New York and Westborough, Massachusetts. In Europe, we have sales and customer support centers in London, England; Munich, Germany, Stockholm, Sweden and Paris and Grenoble, France. In the Far East, we have a customer support center in Singapore and we also have a regional sales and support office in Rosh Ha’ain, Israel.

Indirect sales

We also sell our products through independent sales representatives and distributors. We have a representative that covers Japan on an exclusive basis with respect to Specman Elite and on a non-exclusive basis with respect to SureCov. This distributor also has an office in San Jose, California to maintain a sales and customer support relationship with predominantly Japanese systems and semiconductor companies that do business in the San Jose metropolitan area. We also have non-exclusive representatives in India, Taiwan and China. In Korea we distribute our products through an exclusive distributor. These outside sales representatives and distributor organizations also have technical support resources. Our revenue through these indirect channels accounted for 11.8% of our total revenue in 2001, 7.7% of our total revenue in 2002 and 7.9% of our total revenue in 2003.

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Competition

The functional verification market is highly competitive and is characterized by rapid technological innovation and frequently emerging new suppliers. We directly compete with large vendors of design and verification tools such as Synopsys and Cadence Design Systems. We also compete with a number of smaller verification tool vendors. In addition, we face competition from within our potential new customers, in the form of the in-house verification engineering teams of major systems and IC companies that use and promote their own internally-developed functional verification tools. One of our largest competitive challenges is to convince these engineering teams that our products are superior to their internal verification tools.

We believe that the principal competitive factors in the functional verification market include technology, product quality, performance and capabilities, compatibility and interoperability with other verification and design tools, reputation within the installed customer base, customer service and support, access to customers, expertise, support of standards, regional sales and technical support and price. We believe that we compete favorably with respect to these factors. However, we believe that we will continue to experience increased competition from both existing and potential new entrants into the functional verification market, some of which may have longer operating histories, greater overall brand recognition and significantly greater financial and marketing resources to affect market directions.

Technology, Research and Product Development

Technology

Our Specman Elite software product is the first commercial solution that combines the key technologies needed to automate the entire functional verification process. The core innovative technologies include constraint-driven test generation, data and assertion checking and functional coverage analysis. The test generator can create test data according to a series of constraints that allow for a relatively concise description of valid or even invalid input states. It will work within these constraints to automatically generate any number of test values. A relatively simple modification of selected constraints directs the generated values to focus on selected functions of the design being tested. Assertion checking allows an engineer to monitor certain events within a stated time period. The functional coverage analysis shows an engineer what functionality has or has not been exercised or tested during simulations. The engineer can modify the test constraints to direct testing at any desired function or portion of a device being tested, and the functional coverage analysis can highlight additional areas the engineer should consider.

Another important technology innovation within Specman Elite is the e verification language. This software language, which directs the Specman Elite functions, is particularly well suited for the description of hardware behavior, including time-related and hardware function elements, as well as specific features for verification.

During 2003, Verisity added new technologies to create new levels of abstraction in specification, new levels of generation based automation, enable more effective overall management of the verification process, and ensure improved quality of the underlying verification coding by engineers. This included the additions of mechanisms to describe sequences and the ability for the constraint solver to work across multiple interfaces and generate multi-channel stimulus at the system level.

Our e Verification Components, significantly shorten the time it takes to create a verification environment. e Verification Components are pre-verified, reusable pieces of verification code written in e. e Verification Components comprise a complete verification environment including test generation, assertions and monitors, and functional coverage. e Verification Components are configurable and extensible to satisfy each specific verification environment’s requirements.

Our eCelerator software product is the first commercially available testbench synthesis tool. This product allows verification engineers to partition, synthesize and run portions of an e testbench, which is the input to Specman Elite, on verification hardware known as accelerators and emulators. Hardware accelerators and

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emulators significantly improve the speed of testbench simulation and thereby reduce the engineering time needed for design simulation and verification. This gives customers access to the automated verification features of Specman Elite at significantly higher levels of performance.

Our SureCov software product automatically measures the completeness of functional verification according to nine separate metrics, including code coverage and finite state machine analysis. Code coverage indicates the lines of code actually executed during simulation. Finite state machines are key components of the design that indicate its internal control flow. SureCov indicates the coverage of design states and the transition between those states.

The technologies acquired with Axis Systems offer a unique foundation to achieve scalable verification performance. Axis’s technology provides third generation simulation that combines all languages and required engines for hardware, embedded software and system-level verification. This includes patented ‘semulation’ technology and RCC (Reconfigurable Computing Compiler) that enables this third generation simulator to move from the workstation to a high performance parallel processing machine.

Research and development

Our research and development expenses were $8.9 million in 2001, $9.2 million in 2002 and $10.3 million in 2003. We expect that these costs will increase in the future as we attempt to maintain a leading technology position in the functional verification market. As of December 31, 2003, we had more than 70 employees engaged in research and development activities.

Proprietary and intellectual property rights

We rely primarily on a combination of nondisclosure agreements, license agreements and other contractual provisions, as well as patent, trademark, trade secret and copyright law to protect our proprietary rights. Our general policy has been to seek patent protection for those inventions and improvements likely to be incorporated in our technologies or otherwise expected to be of value. We have an active program to protect our proprietary technology through the filing of patents.

As of January 31, 2004, we have 11 patents issued in the United States and 9 patent applications on file with the USPTO. Once granted, the duration of each patent will be up to 20 years from the effective date of filing of the applications. Our earliest two issued patents can remain effective until August 7, 2017 and until February 6, 2018. Although we have no patents issued in any other jurisdiction, we have 4 patent applications filed under the Patent Cooperation Treaty process and 18 patent applications filed in Europe, Japan, Israel and other jurisdictions. These patents, if granted, will allow us to take legal action against others who may infringe on our core technologies covered by the patent claims. We intend to continue to file patent applications as appropriate in the future. We cannot be sure, however, that any of our pending patent applications will be allowed, that any issued patents will protect our intellectual property or will not be challenged by third-parties, or that the patents of others will not seriously harm our ability to do business. In addition, others may independently develop similar or competing technologies or design around any of our patents.

In addition, as of January 31, 2004, we had 6 United States trademark registrations with respect to our Verisity and Sure branded products. We also had approximately 24 additional applications pending or registrations granted in various countries where we focus our sales efforts, specifically for Verisity, Specman, Specman Elite, Invisible Specman, and other important corporate names. These existing registrations, and those that may be granted in the future, will improve our ability to take legal action against others who may use these or similar marks on similar goods and services in the respective countries. However, unlike patents, in the United States and in some foreign countries we may have certain rights with respect to our trademarks even though they are not registered with the respective national trademark offices. We cannot be sure that the USPTO or other national trademark offices will issue registrations for any of our pending trademark applications. Further, any trademark rights we hold or may hold in the future may be challenged or may not be of sufficient scope to provide meaningful protection.

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We protect the source code of our software products as both trade secrets and unpublished copyrighted works. We license the object code to our customers for limited uses and maintain contractual controls over the use of our software. Wide dissemination of our software may make protection of our proprietary rights difficult, particularly in jurisdictions outside the United States that may be less likely to enforce copyrights owned by foreign parties against local infringers. Although most of our customers have signed license agreements which may further protect our copyrights and trade secrets beyond the protections afforded by applicable law, not all of our customers have signed such agreements.

We protect our trade secrets and other proprietary information with security measures and through a policy of entering into nondisclosure agreements with our employees and customers.

Others may still gain access to our trade secrets or discover them independently. Should any of our customers that have not signed a license agreement or nondisclosure agreement disclose to third-parties any of our information that we regard as trade secrets, we may be unable to enforce our trade secret rights with respect to such information.

Although we believe that our technologies do not infringe on any copyrights or other proprietary rights of third-parties, we cannot be certain that we will not infringe upon the intellectual property rights of third parties, including our competitors, who may assert patent, copyright and other intellectual property rights to technologies, code, features or other product elements that are important to us. The costs of defending our proprietary rights or claims that we infringe third-party proprietary rights may be high. Also, if we are unsuccessful in defending against third-party infringement claims, we could be legally prevented from continuing to license our software products to the extent they contain technologies, code, features or other elements that are determined by the courts to infringe the proprietary rights of such third parties.

Employees

As of December 31, 2003, we employed 205 people, of whom 113 worked in North America, 73 worked in our Israeli and Singapore facilities and 19 worked in Europe. Of the North American employees, 63 were in sales and marketing, 19 were in research and development, 16 were in general and administration and 15 were in technical customer support. Our employees in Israel worked primarily in research and development. Our employees in Europe worked primarily in sales and customer support. Our employees are not represented by a collective bargaining agent, except as may be required by government legislation or regulation. We consider our relations with our employees to be good, and we will continue to strive to provide a positive working environment for our employees.

Revenue by Geographic Area

The following is a summary of revenue within geographic areas based on the location of the entity making the sales:

We do business in a single industry segment.

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ITEM 2.    PROPERTIES

All of our operations are conducted in leased office facilities. Our principal executive offices in the U.S. occupy approximately 20,000 square feet and are located in Mountain View, California. These offices house substantially all of our marketing, administration, finance, customer service and support employees and approximately one-fifth of both our sales employees and research and development team. Our lease for the Mountain View facility expired on December 31, 2003 and was extended through June 30, 2004. Once this lease expires we intend to relocate to a new location in Mountain View, California, for which we have recently signed a letter of intent. The lease agreement for the new offices will have a five year term and will be for 35,000 square feet, initially, and up to 58,000 square feet. This new office space will allow us to consolidate operations with Axis Systems and provide room for future growth.

In addition, we lease four facilities with a total of approximately 16,200 square feet in Rosh Ha’ain, Israel, approximately 10 miles from Tel Aviv. Those facilities house a substantial portion of our research and development employees, a portion of our customer service and support team and the local sales team. All four leases expire on February 2005, with an option for a two-year extension.

We also occupy an additional 3,200 square feet of office space in Westborough, Massachusetts where we maintain our East Coast operations under a lease which expires on March 31, 2006 and 3,300 square feet of office in Austin, Texas under a lease agreement which expires on December 31, 2004. In addition, we occupy less than 1,000 square feet of space in each of our small regional sales offices located in Paris and Grenoble, France; London, England; Munich, Germany; Denver, Colorado and Austin and Plano, Texas; each under leases for a term not exceeding one year.

ITEM 3.    LEGAL PROCEEDINGS

We are not presently a party to any material legal proceedings.

ITEM 4.    SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS

None

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PART II

ITEM 5.    MARKET FOR REGISTRANT’S ORDINARY EQUITY AND RELATED SHAREHOLDER MATTERS

On March 26, 2001, we completed our initial public offering in which we sold 3,335,000 ordinary shares at $7.00 per share. The net proceeds we received from this offering after deducting underwriting discounts were approximately $21.7 million.

In April 2001, the underwriters of the initial public offering exercised their over-allotment option to purchase an additional 500,250 ordinary shares at $7.00 per share, the initial public offering price of the ordinary shares. The net proceeds received after deducting underwriting discounts were approximately $3.3 million.

We intend to use the aggregate net proceeds from our initial public offering, share purchases pursuant to equity incentives plans and cash genera