Back to GetFilings.com

UNITED STATES

SECURITIES AND EXCHANGE COMMISSION

Washington, D.C. 20549

FORM 10-K

FOR ANNUAL AND TRANSITION REPORTS PURSUANT TO SECTIONS 13 OR 15(d)

OF THE SECURITIES EXCHANGE ACT OF 1934

(Mark One)

For the fiscal year ended October 31, 2003

OR

For the transition period from             to             

0-22366

(Commission file number)

CREDENCE SYSTEMS CORPORATION

(Exact name of registrant as specified in its charter)

(408) 635-4300

(Registrant’s telephone number, including area code)

Securities registered pursuant to Section 12(b) of the Act:

Securities registered pursuant to Section 12(g) of the Act:

Common Stock, $0.001 par value

Preferred Stock Purchase Rights

Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days.    Yes  x    No  ¨

Indicate by a check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of the registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K.  x

Indicate by check mark whether the registrant is an accelerated filer (as defined in Rule 12b-2 of the Exchange Act).    Yes  x    No  ¨

The aggregate market value of voting stock held by non-affiliates of the Registrant, as of April 30, 2003 was approximately $436,530,160 (based upon the closing price for shares of the Registrant’s common stock as reported by the Nasdaq National Market for the last trading date prior to that date). Shares of common stock held by each officer, director and holder of 5% or more of the outstanding common stock have been excluded in that such persons may be deemed to be affiliates. This determination of affiliate status is not necessarily a conclusive determination for other purposes.

On January 6, 2004, approximately 63,953,445 shares of the Registrant’s common stock, $0.001 par value, were outstanding.

DOCUMENTS INCORPORATED BY REFERENCE

Portions of the Registrant’s Proxy Statement for the 2003 Annual Meeting of Stockholders to be held on March 23, 2004 are incorporated by reference into Part III of this report. Except as expressly incorporated by reference, the Registrant’s Proxy Statement shall not be deemed to be a part of this report.

PART I

In addition to the historical information contained in this document, the discussion in this Annual Report on Form 10-K contains forward-looking statements, within the meaning of Section 27A of the Securities Act of 1933, as amended, and Section 21E of the Securities Exchange Act of 1934, as amended, that involve risks and uncertainties, such as statements of the Company’s plans, objectives, expectations and intentions. Statements that include the use of terminology such as “may,” “will,” “expects,” “plans,” “anticipates,” “estimates,” “potential,” or “continue,” or the negative thereof or other comparable terminology are forward-looking statements. The cautionary statements made in this Annual Report on Form 10-K should be read as being applicable to all related forward-looking statements whenever they appear in this Annual Report on Form 10-K. Forward-looking statements include, without limitation, statements regarding the intended purpose of the ATE production test systems, our intention to keep pace with rapid advances in IC design and test, our intention to continually enhance our existing systems, our intention to continue to build close working relationships with IC manufacturers, EDA software vendors and ATE machine vendors, our anticipation that international business will continue to account for a significant portion of net sales, our belief that order cancellations and shipment delays will continue, our intention to continue to scrutinize our inventory, our continued development of stabilitzation techniques, our intention to focus our research and development efforts on the Octet product line, our intention to continue to invest significant resources in development of new products and enhancements, our anticipation that revenue levels will continue to remain under pressure, our anticipation that significant portion of orders may depend upon demand from semiconductor device manufacturers building or expanding fabrication facilities and new devise testing requirements, our intention to pursue additional acquisitions, our anticipation that we will not pay any dividends on our common stock, our expectation that gross margins will improve, our anticipation that R&D expenses will remain significant, our expectation that SG&A expenses will be flat to slightly higher, the effect of the adoption of certain accounting policies, the expectation as to the maturity of the Emiscope II product, the ultimate liability for pending claims, our continuing to defer certain revenue, our intent to sublease the Fremont space, and the use of proceeds from our $180 million convertible note offering.

Our actual results could differ materially from those discussed herein. Factors that could cause or contribute to such differences include cyclicality or downturns in the semiconductor market and the markets served by our customers, the timing of new product announcements and releases by us or our competitors, market acceptance of new products and enhanced versions of our products, manufacturing inefficiencies associated with the start up of new products, changes in pricing by us, our competitors, customers or suppliers, the ability to volume produce systems and meet customer requirements, excess and obsolete inventory, patterns of capital spending by customers, delays, cancellations or rescheduling of orders due to customer financial difficulties or otherwise, expenses associated with acquisitions and alliances, product discounts, product reliability, the proportion of direct sales and sales through third parties, including distributors and original equipment manufacturers, the mix of products sold, the length of manufacturing and sales cycles, natural disasters, political and economic instability, regulatory changes and outbreaks of hostilities and other factors set forth in “Risk Factors” and elsewhere herein.

Item 1. Business

We design, manufacture, sell and service engineering validation test equipment, emission-based optical diagnostics and failure analysis products and automatic test equipment, or ATE, used for testing semiconductor integrated circuits, or ICs. We also develop, license and distribute software products that provide automation solutions in the IC design and test flow fields. We serve a broad spectrum of the semiconductor industry’s testing needs through a wide range of products that test digital logic, mixed-signal, system-on-a-chip, radio frequency, volatile, and static and non-volatile memory semiconductors. We utilize our proprietary technologies to design products which are intended to provide a lower total cost of ownership than many competing products currently available while meeting the increasingly demanding performance requirements of today’s engineering validation test, emission-based optical diagnostics and failure analysis and ATE markets. Our hardware products are designed to test semiconductors at two stages of their lifecycle; first, at the prototype stage, and, second, as they

2

are produced in high volume. Our software products enable design and test engineers to develop and troubleshoot production test programs prior to fabrication of the device prototype. Collectively, our customers include major semiconductor manufacturers, fabless design houses, foundries and assembly and test services companies.

We were incorporated in California in March 1982 and were reincorporated in Delaware in October 1993. “Credence” or the “Company”, “we”, “us” and “our” refers to Credence Systems Corporation and our subsidiaries. Our principal executive offices are located at 1421 California Circle, Milpitas, California, and our telephone number is (408) 635-4300. Our worldwide website address is www.credence.com. On our Investor Relations page on this web site we post the following filings as soon as reasonably practicable after they are electronically filed with or furnished to the Securities and Exchange Commission: our annual report on Form 10-K, our quarterly reports on Form 10-Q, our current reports on Form 8-K and any amendments to those reports filed or furnished pursuant to Section 13(a) or 15(d) of the Securities Exchange Act of 1934. All such filings on our Investor Relations web page are available to be viewed on this page free of charge. Information contained on our web site is not part of this annual report on Form 10-K or our other filings with the Securities and Exchange Commission. We assume no obligation to update or revise any forward-looking statements in this annual report on Form 10-K, whether as a result of new information, future events or otherwise, unless we are required to do so by law. A copy of this annual report on Form 10-K is available without charge upon written request to: Mr. John R. Detwiler, the Company’s Senior Vice President, Chief Financial Officer and Secretary at the Company’s headquarters at 1421 California Circle, Milpitas, California 95035. “Credence Systems Corporation,” “Credence,” “IMS,” “Fluence,” “SC,” “ValStar,” “Quartet,” “Octet,” “Electra,” “Vanguard,” “Wavebridge,” “MemBIST,” “TDS,” “TDX,” “BOST,” “MemBOST,” “Kalos,” “DUO,” “TMT,” “MVNA,” “Opmaxx,” “DirectTest,” “Virtual Test,” “Optonics,” “Emiscope”, and “SZ” are certain of our trademarks. This Annual Report on Form 10-K also includes trademarks of other companies.

Background

The semiconductor industry’s successful production of increasingly smaller, faster and more sophisticated ICs has made semiconductor devices available for a wide range of applications resulting in semiconductor content growth in almost all appliances ranging from dishwashers to automobiles, cell phones to PDAs and laptops to servers. At the same time, semiconductors have emerged as the building blocks of the communications, internet and telephony infrastructures. IC proliferation, together with a competitively driven reduction in device average selling prices, has forced IC manufacturers to continually drive to reduce manufacturing costs while improving their time to volume production and profit.

The process of designing and manufacturing ICs is complex and capital-intensive, involving stages of design, prototype manufacture, engineering validation test of the prototypes, device manufacture and production test. Each stage in this process has come under pressure as ICs have increased in complexity and speed. At the design stage, advances in electronic design automation, or EDA, software have allowed design engineers to work with IC designs at increasingly higher levels of abstraction, permitting engineers to design significantly more complex ICs in less time. The ability to design more complex and capable circuits, together with advances in manufacturing processes, has resulted in an approximate doubling of chip speed and complexity every two years. However, as ICs have become more complex and as device manufacturers have increasingly sought ways to introduce products to market more rapidly, critical limitations have become increasingly apparent in the IC design-to-production process flow.

Today, IC design and manufacturing is, to a large extent, a serial process that crosses organizational, functional and often geographical boundaries. In general, a design has to be complete before prototypes can be built; prototypes have to be built before they can be tested; and prototypes have to be production-ready before production test software can be debugged and refined. Production test software can take significant time to debug and refine, so the need to wait until a physical part has been produced to perform that process delays an IC’s introduction to the market. Even then, test failures can raise the question of whether the IC itself is flawed, or the test has an error. In addition, an IC’s design may be so sophisticated that some or all of its functionality cannot effectively be tested. Designs that are discovered to be un-testable when produced require another iteration of the

3

IC process flow. These challenges are further exacerbated within semiconductor manufacturers by traditional organizational boundaries where design responsibilities end at pre-silicon verification and ownership is transferred to test engineering to create suitable test programs to uncover faults that may occur in production and by the increased level of outsourcing which physically separates the design and test functions. Additionally, the process and technology used to develop and debug production test programs has often been inefficient and inadequate.

The equipment used in the engineering validation test stage has often been unable to effectively verify and characterize increasingly complex ICs. To perform specialized tests on prototypes, engineers turned to ATE machines to verify and characterize prototypes. However, ATE machines are designed for volume production testing and in many cases lack the flexibility or versatility to efficiently test whether, and within what limits, a given part works, or efficiently analyze why it fails to work.

Production testing is a principal element in the cost structure of semiconductors. Purchasers of production testers now examine more carefully the total cost of ownership of ATE comprising of the initial purchase price of the tester, as well as the tester’s reliability, flexibility, size, power and air conditioning requirements, ability to upgrade, maintenance costs and spare parts.

As assembly and packaging have become increasingly expensive compared with the cost of the semiconductor die, so that their costs may exceed the cost of the die itself, semiconductor manufacturers continue to shift performance testing increasingly toward wafer probe. By subjecting devices to performance testing earlier, defective die are detected and eliminated before assembly and packaging costs are incurred. This trend has imposed new demands on ATE. Wafer probe testing, where production testing may now occur, requires that the device under test be located in close physical proximity to the measuring circuits of the tester in order to minimize potential signal distortions that can negatively impact testing yields. Smaller testers can more easily be placed in close physical proximity to the circuits. In addition, wafer probe test typically occurs in a clean room where potential contaminants must be continually removed and temperatures kept constant. These special maintenance requirements make clean rooms expensive to operate. Smaller testers occupy less floor space and therefore assist in reducing clean room costs. In addition, smaller testers that consume less power generally have reduced air conditioning requirements.

There are two dominant process technologies used to develop the ICs used in ATE: emitter-coupled logic, or ECL, and complementary metal oxide semiconductor, or CMOS. Although CMOS technology allows higher functionality per chip and requires less power to operate, ATE based exclusively on CMOS technology has been limited by the inability of CMOS to meet the timing and measurement demands of semiconductor testing. Historically, although the speed of CMOS was acceptable, its timing stability was not. This problem results from the tendency of CMOS circuits to experience timing drift as a function of temperature and voltage variation during tests. To fully benefit from the economic and other advantages of CMOS technology, the challenge has been to control this drift characteristic in order to produce semiconductors for ATE that meet the performance requirements of semiconductor testing.

These technical, economic and market trends have created a significant need for an integrated design to production test flow that includes Built in Self Test, or BIST, circuitry, photo emission based optical diagnostic tools, specialized engineering validation test products and high performance, cost effective ATE. Additionally, the market is requiring solutions that enable engineers to develop and debug production test software and ATE interface equipment, or fixtures, in parallel with the design and validation of IC prototypes to increase the process parallelism and improve device time to market.

The Credence Solution and Strategy

We provide high performance IC engineering solutions that address the engineering, debug and validation requirements of increasingly complex devices. Our engineering validation test systems test logic devices, mixed-signal devices that combine both analog and digital functionality, and memory devices. Our engineering

4

validation test systems can also be used to test selected functions of highly integrated, system-on-a-chip, or SoC, devices. By keeping pace with the industry’s advances in speed and pin count requirements, our solutions enable customers to reduce the time required for verification, characterization and failure analysis. This generally results in lower cost of design, reduced time-to-market and increased competitiveness for the companies designing today’s increasingly complex ICs. Our validation systems give engineers a more flexible and cost-effective way to verify and characterize prototype ICs and to perform failure analysis. Each validation system integrates the functions of a variety of individual test instruments into a single system consisting of both hardware and software that offers increased verification and characterization performance with significant cost savings. Our engineering validation test technology allows our systems to send and receive data from an IC at the same speeds the circuit will experience in actual use. As a result, design and test engineers can better identify failures, assess areas of concern, run rapid diagnostic sequences to pinpoint the causes of failure and identify changes needed to correct design errors or weaknesses. With our acquisition of Optonics, we now add unique debug and diagnostic capabilities to our engineering solutions to provide advanced silicon debug, characterization and device failure analysis. Incorporating innovative time resolved emission technology for the backside timing measurement of a wide range of devices from complex multi-layer metal devices in flip-chip packages, to more traditional devices with conventional wire bond and tape automated bonding packaging technologies, this technology helps semiconductor manufacturers bring products to market faster with fewer mask re-designs and at a lower cost. Additionally, our engineering solutions accelerate failure analysis problem resolution with integrated test and diagnostic systems and integrated feedback to the major EDA manufacturers. Our solutions provide IC manufacturers shorter design cycles and faster failure resolution, improving profit opportunities and minimizing failure impact.

We have developed proprietary CMOS stabilization methods that minimize the drift characteristic of CMOS and enable us to produce ATE production test systems that are smaller and require less power than those based on ECL technology. These testers are intended to provide a lower total cost of ownership than many competing products currently available while meeting the performance demands of today’s ATE market. CMOS technology allows the circuits used in our testers to be reduced, or scaled down in size, as IC process technology improves. This scalability feature enables us to develop and manufacture smaller, higher performance circuits for use in our testers at what we believe to be a lower cost, and with a potentially shorter development cycle, than traditional process technologies.

We believe our software solutions enable test engineers to develop, refine and debug production test software early in the IC design and production process, even before a prototype of the IC is produced. By allowing production test programs to be developed and debugged while the IC is being designed and validated, our software can significantly reduce the time required to introduce ICs to market.

Our objective is to be the leading supplier of design through production test solutions. This includes high performance IC engineering validation test systems, compelling silicon debug and diagnostic systems, cost-effective ATE for production testing of ICs used in high volume applications, and software solutions and other innovations to decrease the cycle time from circuit design to high volume manufacturing. Our business strategy incorporates the following key elements:

5

Products

We currently offer a wide variety of products that test digital logic, analog, mixed-signal, SoC, static random access memory, or SRAM, non-volatile or Flash memory and radio frequency wireless ICs. Digital logic semiconductors produce discrete on and off logical sequences that control functions, store data, retrieve data and

6

move and manipulate data at high rates of speed. Analog semiconductors control external functions such as sound, graphics, and motor controls by producing continuous varying voltage or current signals. When these analog functions are combined onto a digital IC, the resulting device is considered a mixed-signal device and as the levels of integration increase, the circuit is termed an SoC device. For memory devices, dynamic random access memory, or DRAM, loses data without power while non-volatile memory, or NVM, semiconductors retain their data when the power is turned off. RF wireless IC’s are the devices that receive, transmit and convert radio frequency signals typically used in cellular telephones and other communications devices.

Our CMOS-based ATE products—the SC, Quartet and Octet series—are designed to test high speed devices used in applications such as networking and personal computing as well as multimedia, digital television, high-definition television and personal communications. Our memory product line, the Kalos Series, tests non-volatile memory, or NVM, devices, including ROM, EPROM, EEPROM and Flash memories, which are used in high volume applications in the consumer, automotive and telecommunications markets.

During fiscal 2003, we introduced Verity, an integrated test and debug platform for the engineering and failure analysis area, and the Personal Kalos 2 and Kalos 2, our next generation NVM test systems. Also during fiscal 2003 we acquired the principal assets of SZ Testsystems AG, SZ Testsystems GmbH and SZ Testsysteme Japan Limited, or, collectively, SZ, and Optonics, Inc., or Optonics. The SZ ATE products, which are produced in Amerang, Germany, are focused on the advanced analog, power automotive and communications markets. Optonics, based in Mountain View, California, is a major supplier of integrated solutions for emission-based optical diagnostics and failure analysis.

During fiscal 2002, we introduced five new products, or modifications to existing products. The Octet series high performance configurable SoC test platform retains compatibility with the earlier generation Quartet but provides twice the pin count with 1024 channels and four times the performance with 800Mb/sec data rates. The Octet is targeted toward high performance SoC devices. The ASL 3000 extends our ASL product line providing digital capability on the analog-focused product line. The ASL 3000 is targeted toward cost-sensitive mixed signal applications. To address the high performance, low cost RF IC market, we introduced the ASL 3000RF, which incorporates our proprietary Modulated Vector Network Analyzer, or MVNA technology. In the engineering validation market, we introduced the Gemini MS product that combines digital performance with new analog measurement technologies. Adding to our design to test portfolio, we introduced a new version of our Test Developer product with improved cyclization and software algorithms.

During fiscal 2001 we acquired the principal assets of Rich Rabkin & Associates, Inc., or Rabkin, and IMS. Rabkin specializes in providing interface solutions and test head positioning devices for the semiconductor test market through its patented solution for high parallel memory testing. Rabkin was integrated into our Mobile Products Group to offer test solutions that we believe increase manufacturing efficiencies and provide faster time to market for our customers. IMS designs, manufactures, markets and services high-performance engineering validation test systems. These systems are used to test, at the prototype stage, complex digital, mixed-signal and memory devices. In addition, IMS develops, markets and supports a line of virtual test software that we believe enables design and test engineers to develop and debug production test software prior to fabricating the prototype of the actual device. During fiscal 2001, we merged our wholly owned subsidiary, Fluence, into IMS. During fiscal 2002, we merged IMS into the Company.

7

The following table sets forth our current product offerings, their features and examples of typical devices tested by each product. Included in some of the basic features are the anticipated cycle speed in megahertz, timing accuracy in either picoseconds (ps) or nanoseconds (ns), the number and characteristics of the pins and the density, in megabits(Mb), of the device that can be tested:

8

9

Digital Products

SC. In fiscal 1997, we expanded the SC series by introducing and shipping the SC 312, which runs at a higher speed (100 MHz) and has improved accuracy over its predecessor, the SC 212. The SC Micro is a cost-reduced version of the SC 312. This system offers our customers a full capability test system at a price currently below $2,000 per digital pin channel. This per channel price has previously been available only in test systems with reduced functionality-requiring users to compromise the quality of their device testing. The SC Micro retains the customer’s test quality while lowering its test costs. The purchase price of these testers typically ranges from $200,000 to $500,000 depending upon configuration.

IMS Vanguard. The IMS Vanguard, our flagship engineering validation test product introduced by IMS in 1999, can send and receive data from ICs under test at up to 1 Gbs and accounted for the majority of logic family sales in 2002 and 2003. The logic engineering validation test system family includes the Vanguard 500, 330 and most recently introduced 550. The IMS Vanguard systems sell for between $0.7 million and $2.3 million depending on configuration.

SoC and Mixed-Signal Products

Octet. Octet is our latest generation, high performance SoC configurable test platform. Introduced in July 2002 and first shipped in October 2002. Octet targets high performance SoC chips used in chipsets, graphics, audio, video, mass storage and wireless baseband markets. Featuring up to 1024 digital pins and a selection of high performance analog instruments, the Octet is a production ready, high performance tester and meets the market requirements for low cost of test. Prices range from $1.0 million to $2.5 million depending on configuration.

Quartet. Quartet is our high performance mixed-signal product series. The Quartet was introduced in 1998 and started shipping in early fiscal 1999. Quartet builds on the Duo series by addressing the needs of device manufacturers serving the consumer mixed-signal, or CMS, marketplace. CMS devices combine the power of digital processors with CD quality audio, broadcast video and wireless communications onto a single, cost-sensitive SoC. The Quartet, the first of the Quartet series, addresses all four of these requirements in an integrated, ready for volume production package. With 200 MHz digital, 20 bit audio and 300 MHz video, Quartet is designed to meet the demands of the most complex SoC devices. With typical system prices between $0.5 million and $1.5 million depending on configuration, the Quartet provides a low cost of test required by the CMS market.

ASL 3000. Introduced in fiscal 2002, the ASL 3000 is an extension of the ASL product line featuring an increased number of mixed signal instruments, expansion to 64 pins of digital capability, and DSP based mixed signal test. The ASL 3000 is capable of testing more complex devices and more devices in parallel and targets a wide range of ICs used in personal communications. The purchase price of the ASL 3000 ranges from $150,000 to $350,000 depending on configuration.

SZ Falcon. The SZ Falcon is a high-performance analog and mixed-signal test system that offers unique analog, DSP and digital capabilities for automotive, smart power, and consumer devices. SZ Falcon delivers high throughput with a 200 MHz digital sequencer per channel architecture, and reduces test costs through its high-speed computer/tester interface, and parallel, multi-site, and concurrent test capabilities. The SZ Falcon offers an innovative tester-per-pin technology for analog and digital applications, as well as special automotive pins offering a voltage swing up to a 30 V. The SZ Falcon also features Giglink, a new high-speed serial bus system, and AWT, a new analog wave tool.

SZ Piranha. The SZ Piranha is an analog and mixed-signal test system that provides a cost-effective solution for high volume devices with low and medium pin counts. The SZ Piranha uses the same hardware and software technology as the SZ Falcon in a smaller housing without a test head. With frequencies up to 50 MHz digital and up to 64 pins, the SZ Piranha also features multi-site and parallel test capabilities to lower test costs. The purchase price of the SZ Piranha ranges from $250,000 to $550,000.

10

IMS Gemini MS. Our mixed-signal engineering validation test systems are used by customers to verify the designs of complex ICs containing both digital and analog functionality. These mixed-signal ICs are used in applications such as cellular phones, internet appliance, set top boxes and cable modems. The IMS Gemini MS is also used to test selected functions of highly-integrated, or SoC, designs. Depending on configuration, the system can send and receive data ICs under test at up to 330 MHz. The IMS Gemini MS sells for between $0.7 million and $1.5 million depending on configuration.

IMS Electra. The Electra system can send and receive data from ICs under test at up to 200 MHz. Our Electra series includes the Electra, which can test mixed-signal ICs with up to 224 pins, and the Electra MX, which can test mixed-signal ICs with up to 576 pins. Our Electra series systems sell for between $0.3 million and $2.1 million.

Memory Products

Kalos. Introduced in November 1997, the Kalos is a highly integrated, parallel system designed to test flash memory. Running at 50 MHz, it provides multi-site testing and is designed to lower the customer’s cost of test. The Kalos features a unique tester-on-a-card architecture, which places all test functions for each site on a single card and thus reduces floor space and power consumption while increasing performance. The typical purchase price of the Kalos ranges from $0.4 million to $1.2 million depending on configuration.

Kalos (xp). Introduced in fiscal 1999, the Kalos (xp) is based upon the Kalos tester. The Kalos (xp) features a wider, 96 pin test site enabling testing of high pin count NVM and flash memory core microcontroller devices. Kalos (xp) provides up to eight site-in-parallel test capabilities in a small footprint tester package.

Kalos xw. Introduced in fiscal 2000, the Kalos _XW is based upon the Kalos tester and features 32 test sites, twice as many test sites as the standard Kalos system.

Personal Kalos. Personal Kalos is a desktop engineering version of the high-throughput Kalos tester. The typical price for a Personal Kalos ranges from $50,000 to $120,000 depending on configuration.

Kalos 2. Personal Kalos 2 and Kalos 2 were introduced in fiscal year 2003 and represent the next generation non-volatile memory testers. With industry leading speed and innovative tester on a chip (ToC) architecture, the Kalos 2 products provide the highest level of parallel test capabilities. Coupled with minimal footprint and complete engineering to production test coverage, and Kalos 2 delivers the lowest overall cost of test for NVM devices.

IMS Orion. The IMS Orion is used by our customers to verify the designs of the most common types of memory integrated circuits, including complex SRAMs and DRAMs. The IMS Orion will send and receive data from integrated circuits under test at speeds up to 200 MHz/400 Mbs. Depending on configuration, these memory validation systems sell for between $400,000 and $600,000.

Analog Test Products

The acquisition of TMT in fiscal 2000 extended the market that we serve to include analog dominant ICs that are made up of traditional analog function blocks such as amplifiers, regulators, switches and converters. The ASL product line tests these traditional devices either as individual ICs or as larger function ICs such as battery power management devices in portable electronics devices.

ASL 1000. The ASL 1000 was introduced in fiscal 1996. This system is highly configurable and targeted at testing the traditional analog building block ICs. As the traditional analog or linear device manufactures move to more efficient manufacturing, the multi-site test capability of the ASL 1000 has proven to be very effective at reducing their cost of test. The purchase price of the ASL 1000 ranges from $90,000 to $250,000 depending on configuration.

11

RF Wireless Test Products

Our RF wireless test products provide tools to IC manufacturers for use in characterization and production test of high performance, cost sensitive RF devices.

ASL 3000RF. Introduced in early 2002 and first shipped in May 2002, the ASL 3000RF extends the ASL 3000 product line by incorporating proprietary MVNA technology to test RF devices. The ASL 3000RF is targeted at cost effective testing of RF front-end devices that are typically manufactured using Gallium Arsenide, or GaAs, Bi-polar or Bi-CMOS technology. The devices, Power Amplifiers, or PAs, Low Noise Amplifiers, or LNAs, Synthesizers, Mixers and Switches and integrated combinations of these, or Base band chips, are used in both digital and analog cell phones. Providing capability to test devices compliant with Bluetooth and 802.11 standards, the ASL 3000RF delivers high performance, high throughput and leading cost of test economics. Prices range from $400,00 to $750,000 depending on configuration.

Emission based optical probers

EmiScope-I. An industry-leading solution for backside timing measurement of flip-chip packaged and complex multi-metal layer devices, the EmiScope-I provides interactive tools to perform transistor level timing measurements in the engineering, debug and failure analysis environments. Using innovative time-resolved emission technology, the system enables semiconductor manufacturers to bring products to market faster, at a lower cost, and accelerate failure analysis problem resolution. Prices range from $1,000,000 to $1,500,000.

EmiScope-I-GP. The EmiScope-I-GP extends time-resolved emission capability to devices packaged with wire bond and tape automated bonding technologies. Featuring a long working distance objective to accommodate the needs of traditional packaging, the system enables probing in a variety of load board and package configurations. Prices range from $1,000,000 to $1,400,000.

EmiScope-II. A next-generation system for transistor-level backside analysis of complex IC designs with both flip-chip and wire bond packaging technologies. Featuring a new Solid Immersioin Lens (SIL), EmiScope-II provides an industry-leading sub-0.25 micron image resolution and enhanced data acquisition rate to enable analysis of device performance at the critical node level. The system’s high-speed acquisition and data processing capabilities enable semiconductor manufacturers to quickly perform design debug, failure analysis and characterization, improving time-to-market and lowering device development costs. Prices range from $1,200,000 to $2,000,000.

Software Products

Our software products for IC manufacturers and test and assembly contractors help create detailed tests to ensure product quality and shorten time-to-market.

TestDeveloper. This product simplifies the complex SoC test program development task for the semiconductor industry by taking waveform data from simulator-specific representations in the design environment, analyzing this data and then transforming the data into specific tester environments to be used in either device verification or production test. TestDeveloper connects design to test by interfacing to commonly used design simulators, and by offering numerous TesterBridge modules available for a variety of ATE models.

VirtualTest Software. To address the need for shorter test development times and lower cost, this product accelerates the development and debug of a test program, creates a model of the test environment, develops and tests fixtures and documents the entire test process. VirtualTest Software simulates the ATE environment enabling test engineers to develop and debug test programs in parallel with the design, prototype manufacturing and engineering validation test processes. With VirtualTest Software, test development work can begin before the device design is completed.

12

MSBIST. The mixed-signal built-in self-test product line generates on-chip testing of analog-to-digital converters, digital-to-analog converters and high precision jitter measurements for advanced devices by inserting proprietary test techniques into the design before it is manufactured.

Customers, Markets and Applications

We target digital logic, analog, mixed-signal, dynamic random access memory, non-volatile memory device, RF and SoC manufacturers that serve a broad range of growing end-user market segments. Our customers design, manufacture and test semiconductors in high volume for use in applications such as automobiles, appliances, personal computers, personal communications products, networking products, digital televisions, wireless LAN and multimedia hardware.

In addition to marketing our products to major semiconductor manufacturers, we have developed relationships with numerous assembly and test services companies. Semiconductor manufacturers and fabless semiconductor companies utilize these subcontractors as a means of lowering their fixed production costs, thus minimizing the effects of cyclicality inherent in the semiconductor industry. As a result, these assembly and test services companies are an increasingly important segment of the ATE market.

One customer, Spirox Corporation (a distributor in Taiwan), accounted for 19%, 20% and 13% of the Company’s net sales in fiscal 2003, 2002 and 2001, respectively. STMicroelectronics, headquartered in Europe, accounted for 10% of our net sales in fiscal 2003. Intel, headquartered in the USA, accounted for 20% of the Company’s net sales in fiscal 2002. Tom Franz, one of our Directors, is a Corporate Vice President of Intel. STMicroelectronics and Philips Semiconductors, headquartered in Europe accounted for approximately 13% and 11%, respectively, of our net sales in fiscal 2001.

We believe that our success depends in large part upon the success of our major customers. The loss of, or any reduction in, orders by a significant customer (including the potential for reductions in orders by assembly and test services companies which that customer may utilize), including reductions due to market, economic or competitive conditions in the semiconductor industry or in other industries that manufacture products utilizing semiconductors has materially adversely affected, and may continue to materially adversely affect our business, financial condition or results of operations. Our ability to increase sales in the future will depend in part upon our ability to obtain orders from new customers as well as upon the financial condition and success of our customers and the general global economy. There can be no assurance that our sales will not decrease in the future or that we will be able to retain existing customers or to attract new ones.

For information on our geographic data and major customers, see Note 4 to the Consolidated Financial Statements included elsewhere herein. Our international sales are primarily denominated in United States dollars. We anticipate that our international business will continue to account for a significant portion of net sales in the foreseeable future. See “Risk Factors—Our international business exposes us to additional risks.”

We schedule production of our systems based upon order backlog and order forecast. We include in our backlog only those customer orders for systems (including upgrades) for which we have accepted purchase orders and assigned shipment dates in approximately the following six months. Substantially all of our orders are subject to cancellation or rescheduling by the customer with limited or no penalties. Our backlog at any particular date may not necessarily be representative of actual sales for any succeeding period due to orders received for systems to be shipped in the same quarter, possible changes in system delivery schedules, cancellation of orders and potential delays in system shipments. As of October 31, 2003, our order backlog for systems, exclusive of orders for software, spare parts, service and support, was approximately $52.5 million plus an additional $9.4 million of deferred revenue under Staff Accounting Bulletin 101, or SAB 101, as compared with $51.2 and $9.4 million, respectively, as of October 31, 2002. During fiscal years 2001 through 2003, we experienced order cancellations and customer-requested shipment delays in connection with the cyclical downturn in the semiconductor industry. We believe it is probable that order cancellations and customer-requested shipment delays will continue to occur in the future.

13

Sales, Service and Support

We currently market and sell our products in the United States principally through our direct sales organization, with direct sales employees and representatives in over 14 locations. Outside the United States, we utilize both direct sales employees and a broad network of distributors, with direct sales employees and distributors in over 18 countries. Shipments through distributors represented approximately 28%, 35%, and 44% of net sales during fiscal years 2003, 2002, and 2001, respectively.

Our distributors and we have sales and support centers located in the United States, Europe, Israel, and throughout Asia from which both direct Credence personnel and independent sales and service representatives sell and support our products. We believe that field support is critical to our customers. Support encompasses many of the components of the total cost of ownership for test equipment. We seek to develop long-term relationships with major customers through extensive support consisting of teams of professional sales, applications, training and service personnel. These personnel are located in close physical proximity to key customer sites in order to provide the required support in a timely fashion. The sales process includes consultations with customers to help them purchase the most cost-effective equipment for their needs, to help develop custom test programs to optimize production throughput, to assist in long-term self-sufficiency through training of customer test engineering personnel and to provide the service capacity and preventive maintenance to reduce downtime for customers’ systems. Customer support includes field personnel and in-house applications personnel who work closely with design engineering groups to modify existing equipment to meet the latest performance requirements.

In fiscal 2003 we purchased Credence Capital Corporation, or CCC. The assets of CCC consist primarily of a portfolio of leases of our equipment and associated lease related liabilities. We presently operate CCC as a wholly-owned subsidiary to provide leasing and other financing solutions to our customers.

In fiscal 2002 we combined our separate Japan operations under our joint venture with Innotech Corporation. Both companies originally formed this joint venture in 1997 to engage in the customization and manufacture of ATE products for sale in Japan. In March 1996, we established a service and support subsidiary in Korea. We also have a relationship with Itek, Inc., a distributor of our products in Korea.

Our standard policy is to warrant our new systems against defects in design, materials and workmanship for one year for parts and labor. We offer customers additional support after the warranty period in the form of maintenance contracts for specified time periods. Such contracts include various options such as board replacement, priority response, planned preventive maintenance, scheduled one-on-one training, daily on-site support and monthly system and performance analysis.

Research and Development

The engineering validation test, emission-based optical diagnostics, failure analysis and ATE markets are subject to rapid technological change and new product introductions. Our ability to be competitive in this market will depend in significant part upon our ability to successfully develop and introduce new products, enhancements and related software tools on a timely and cost-effective basis. This will enable customers to integrate such products into their operations as they begin volume manufacturing of the next generation of semiconductors.

Historically we have pursued a technology acquisition strategy to complement our internal research and development efforts. This strategy has included the acquisitions of businesses, product lines, instruments and technology. Recent acquisitions include:

14

Our ASL product lines originally came from the TMT acquisition in fiscal 2000. Since then this product line has evolved to include the ASL3000MS which is a mixed signal version that utilizes technology from Credence. The ASL3000RF product is the technical integration of the original TMT product, the RF instrumentation acquired in the MI acquisition (also acquired in fiscal 2000), and digital and mixed signal technology that was developed by us.

The IMS product group is currently sharing technology development with the Quartet/Octet product family. The ASL product group is currently co-developing technology with the SZ product group. And there are many other examples of technology sharing within the Company. We believe it is essential for our product groups to continue to share developed technology. This allows us to accelerate our development cycles and minimize our investment in research and development.

The CMOS stabilization methods developed by us as well as the methods acquired from Tektronix in the early 1990’s provides a different solution to the tendency of CMOS to experience timing drift as a function of temperature and voltage variation. The first proprietary solution uses a timing phase detection circuit combined with a voltage control mechanism to compensate for thermal, voltage and process drift. The second uses a unique combination of counters and heating circuits to provide stability through thermal means. These methods allow our CMOS-based ICs to achieve the timing repeatability necessary to meet the performance requirements of ATE and to realize the economic and other advantages of CMOS technology over ECL technology. CMOS circuits use less space than those based on ECL as the circuits require less power and can be more closely packed together. In addition to these acquired stabilization methods, we have also developed and continue to develop new and/or improved stabilization techniques for our tester products.

During the past two fiscal years, we developed the Octet family of products, targeted at the high performance, high volume production SoC market. Incorporating greater digital capability and testing at increased data rates, the Octet is our flagship production test product. We presently intend to focus our research and development efforts on the Octet product line to ensure that our products have the ability to efficiently test state-of-the-art customer devices which combine analog, high speed digital logic, and memory on a single IC.

Our ongoing research and development efforts also include focusing on increased cycle speed, accuracy and pin counts of our testers. In addition, we are working on a software development program that is intended to provide for upward compatibility through our products. We will also continue to focus efforts on providing software solutions that allow more rapid, cost-effective development of ATE test programs that reduce time-to-market of customer integrated circuit designs. We currently intend to continue to invest significant resources in the development of new products and enhancements for the foreseeable future.

Research and development expenses were $73.5 million in fiscal 2003, $85.4 million in fiscal 2002 and $86.4 million in fiscal 2001 (excluding charges for in-process research and development, or IPR&D).

15

Proprietary Rights

We currently hold 141 United States patents, which expire over time through March 2022. In addition, we currently have 62 foreign patents, which expire over time through April 2021. Two of our United States patents, acquired from ASIX and Tektronix, underlying our proprietary CMOS stabilization methods expire in February 2007 and December 2007, respectively. From time to time we grant licenses under our patents and technology and receive licenses under patents and technology of others.

In 1993, we granted a cross license to Tektronix with respect to patents obtained in the acquisition of the STS Division of Textronix, and certain other intellectual property rights, the Tektronix Rights, including a patent covering one of our proprietary CMOS stabilization technologies, that were assigned to us by Tektronix in 1993. Tektronix has a worldwide, perpetual, irrevocable, non-exclusive, royalty free, fully-paid, sublicensable and transferable license to the Tektronix Rights. Tektronix may not grant rights under the Tektronix Rights to make, use, sell or otherwise distribute ATE for testing ICs to any entity other than a Tektronix joint venture affiliate and to a successor-in-interest to Tektronix. Tektronix may not grant or assign such rights to any other party that is a Credence competitor. In addition, Tektronix may not knowingly sell components incorporating the Tektronix Rights to any other party. We and Tektronix have granted to each other a worldwide, perpetual, irrevocable, non-exclusive, royalty free, fully-paid, sublicensable and transferable license to all improvements, enhancements, modifications or derivative works created before August 1996, or the Improvements, of intellectual property that was licensed or assigned pursuant to a Technology Agreement dated December 31, 1990, as amended on August 12, 1993, including the Tektronix Rights, to make, use and sell ATE for testing ICs. Tektronix’s license to the improvements is subject to the same restrictions as its license to the Tektronix Rights.

We attempt to protect our intellectual property rights through patents, copyrights, trademarks and maintenance of trade secrets and other measures. There can be no assurance that others will not independently develop equivalent intellectual property or that we can meaningfully protect our intellectual property. There can be no assurance that any patent we own will not be invalidated, circumvented or challenged, that the rights granted thereunder will provide competitive advantages to us or that any of our pending patent applications will be issued. Furthermore, there can be no assurance that others will not develop similar products, duplicate our products or design around the patents owned by us. In addition, litigation has been and may continue to be necessary to enforce our patents and other intellectual property rights, to protect our trade secrets, to determine the validity and scope of the proprietary rights of others, or to defend against claims of infringement or invalidity. In addition, from time to time we encounter disputes over rights and obligations concerning intellectual property. We cannot assume that we will prevail in any such intellectual property disputes. For additional information with respect to our intellectual property, review the information set forth under “Risk Factors—If the protection of proprietary rights is inadequate, our business could be harmed” and “—Our business may be harmed if we are found to infringe proprietary rights of others.”

Manufacturing and Suppliers

Our manufacturing objective is to produce engineering validation test systems and ATE that conform to our customers’ requirements at the lowest commercially practical manufacturing cost. We rely on outside vendors to manufacture certain components and subassemblies including several custom ICs. We seek to manage our inventory levels through agreements with both suppliers and subcontractors that provide just-in-time delivery of these components and subassemblies. We assemble these components and subassemblies to create finished testers in the configuration specified by our customers. In general, we use standard components and prefabricated parts available from numerous suppliers. However, some components and subassemblies necessary for the manufacture of our testers are obtained from a sole supplier or a limited group of suppliers and we are in the process of qualifying a second source for some of those components. There can be no assurance that such alternative source will be qualified or available. Our reliance on a sole or a limited group of suppliers and on outside subcontractors involves certain risks, including a potential inability to obtain an adequate supply of required components, and reduced control over pricing and timely delivery of components. See “Risk Factors—There are limitations on our ability to find the supplies and services necessary to run our business.”

16

Competition

The ATE industry is intensely competitive. We face substantial competition throughout the world, primarily from ATE manufacturers located in the United States, Europe and Japan, as well as from some of our customers. Our competitors in the digital semiconductor testing market include:

In the mixed-signal and analog semiconductor testing market our competitors include:

In the non-volatile memory testing market our competitors include: