QUICKLOGIC CORPORATION - 10-K Annual Report

EXPLANATORY NOTE

This Annual Report on Form 10-K contains forward-looking statements within the meaning of the Private Securities Litigation Reform Act of 1995, that involve risks and uncertainties, as well as assumptions that, if they do not fully materialize or prove incorrect, could cause the business and results of operations of QuickLogic Corporation (the “Company”, “we”, “us” or “our”) to differ materially from those expressed or implied by such forward-looking statements. Such forward-looking statements include, without limitation, any projections of earnings, revenue or financial items, any statements of the plans, strategies and objectives of management for future operations, any statements concerning proposed new products, any statements regarding future economic conditions or performance, any statements relating to our projected capital expenditures, any statements of belief and any statements of assumptions underlying the foregoing.

The risks, uncertainties and assumptions referred to above that could cause our results to differ materially from the results expressed or implied by such forward-looking statements include, but are not limited to, those discussed under the heading “Risk Factors” in Item 7 hereto and the risks, uncertainties and assumptions discussed from time to time in our other public filings and public announcements. All forward-looking statements included in this document are based on information available to us as of the date hereof, and we assume no obligation to update these forward-looking statements.

PART I

ITEM 1. BUSINESS

Overview

QuickLogic Corporation, founded in 1988 and reincorporated in Delaware in 1999, operates in a single industry segment where it designs and sells field programmable gate arrays, or FPGAs, Embedded Standard Products, or ESPs, associated design software, and programming hardware. Our FPGA and ESP devices are standard products that can be programmed to perform desired logic functions. In 1991, we introduced our first line of FPGAs based upon our ViaLink™ technology. We believe that the underlying attributes of our ViaLink technology, including low power consumption, high reliability, design security and design efficiency enable us to deliver differentiated silicon solutions to our customers.

QuickLogic pioneered a new class of semiconductors, ESPs, to address the design community’s demand for an alternative to existing options. First introduced in September 1998, ESPs combine standard functions with programmable logic in a single package. Competitively, ESPs can offer significant power, performance, time-to-market, cost, and design security benefits when compared to traditional FPGAs; lower cost of ownership, time-to-market and increased system flexibility benefits when compared to the use of application specific integrated circuits, or ASICs; and increased system flexibility, product differentiation and design security benefits when compared to application specific standard products, or ASSPs. We believe that developing products around our ViaLink technology allows us to provide products that address the design flexibility, system power, performance, intellectual property security and price points demanded by our target markets.

Our most recent product offerings include our Eclipse™ II and QuickPCI® II product families and additions to our QuickMIPS product family. We architected and designed Eclipse II to provide a low-power solution requiring medium to small amounts of programmable logic. Eclipse II devices are the lowest-power FPGA products available on the market today. These devices offer low power consumption during all phases of operation—power-up, stand-by and dynamic operation.

Our ESP and FPGA products target complex, high-performance embedded systems in rapidly changing markets where manufacturers seek to add functionality, enhance system performance, improve time-to-market and/or establish competitive barriers through the integration of unique system logic. Examples include:

· battery operated or “powered by wire” computing and consumer peripherals where time-to-market, power dissipation and system performance are critical;

· portable medical applications (defibrillators and patient monitoring equipment) which demand very low power and high reliability;

· gaming applications which value the intellectual property (IP) security of our products; and

· military and aeronautic applications which value the instant on, design security and high reliability of our products.

The power advantage, high performance and small form factor of our new Eclipse II and QuickPCI II products are ideal for power-sensitive embedded applications that need to efficiently integrate graphics, networking and/or storage capabilities. The Eclipse II and QuickPCI II products are being designed into applications for markets and customers that are new to us, including:

· display applications incorporating digital video interface, the industry standard communication protocol used in flat panel televisions and projectors;

· personal digital assistants, or PDAs, where our devices provide an intelligent connection between a processor’s local bus and an 802.11 Wi-Fi module; and

· portable media players, where our devices allow a processor to access a micro hard disk drive.

Our products provide a low-power solution while supporting the high bandwidth required for these applications.

In addition, the low power consumption, high performance and small form factor of our new devices allows us to engage with other semiconductor companies, who can expand their served market by promoting the use of our devices in low-power embedded systems. One of our strategies to increase product demand is to partner with other semiconductor companies to develop additional intellectual property, reference platforms and system software to provide application solutions to our customers. We are targeting processor manufacturers such as Renesas Technology Corp. and companies that supply graphics, networking or storage components for embedded systems. The depth of these relationships varies depending on the partner and the dynamics of the end market being targeted, but is typically a co-marketing program that incorporates engineering collaboration, such as reference designs, joint account calls and promotional activities.

We provide our customers with development tools by licensing our QuickWorks® and QuickTools™ design software and selling our programming hardware.

Our headquarters are located at 1277 Orleans Drive, Sunnyvale, California 94089. We can be reached at (408) 990-4000, and our website address is www.quicklogic.com. Our common stock trades on the Nasdaq National Market under the symbol “QUIK”.

Our fiscal year ends on the Sunday closest to December 31. The fiscal years 2004, 2003 and 2002 ended on January 2, 2005, December 28, 2003 and December 29, 2002, respectively. Our 2004 fiscal year was 53 weeks long, and our third fiscal quarter of 2004 was 14 weeks long. Our 2003 and 2002 fiscal years were 52 weeks long. For presentation purposes, the financial information has been presented as ending on the last day of the nearest calendar month.

Product Technology

The key components of our ESP and FPGA product families are our ViaLink programmable metal-to-metal technology, our user-programmable platform and the associated software tools used for system design. Our ViaLink technology allows us to create devices smaller than competitors’ comparable products, thereby minimizing silicon area and cost. In addition, our ViaLink technology has lower electrical resistance and capacitance than other programmable technologies and, consequently, supports higher signal-speed and low power consumption. The one-time programmable nature of our ViaLink technology also provides our customers with superior intellectual property security, since it is practically impossible to clone or reverse engineer logic that is programmed using our ViaLink technology. Our ViaLink-based products are “instant on” and operate immediately when power is restored to a system, unlike products from our larger SRAM-based competitors that require a configuration period when power is restored to a system. Our user-programmable platform and design software facilitates full utilization of a device’s logic cells, clocks and input/output pins. Our architecture maximizes interconnects at every routing wire intersection, which allows more paths between logic cells. As a consequence, system designers are able to use QuickLogic devices with smaller gate counts to implement their designs than if they had used competing FPGAs. The abundance of interconnect resources also provides a dense connection between the ASSP and the FPGA portions of Embedded Standard Products, and enables us to develop ESPs that support bandwidth intensive applications such as 64-bit 66 MHz PCI.

Industry Background

Competitive pressures are forcing system manufacturers to bring new systems to market with improved functionality in shorter design cycles using less engineering resources. Silicon suppliers are responding to these market forces with different classes of highly integrated logic semiconductors, which are used in complex electronic systems to coordinate the functions of other semiconductors, such as microprocessors or memory. There are three types of advanced logic semiconductors:

· ASICs—ASICs are custom devices designed to meet the needs of one specific application for one end customer. Structured ASICs, a sub-category of ASICs, provide a limited amount of customization to broaden the applicability of a device for additional applications;

· ASSPs—ASSPs are fixed-function devices designed to address a relatively narrow set of applications. These components typically integrate a number of common peripherals. The functionality of these devices is fixed prior to wafer fabrication; and

· Programmable logic devices, or PLDs—PLDs are general-purpose devices, which can be used by a variety of electronic systems manufacturers, and are customized after purchase for a specific application. Field programmable gate arrays, or FPGAs, are a subset of this category, and are typically used to implement complex system functions.

Historically, systems manufacturers have relied heavily on ASICs to implement the advanced logic required for their products. ASICs provide high performance due to customized circuit design and can provide low unit cost when very large quantities are purchased. However, because ASICs are design-specific devices, they require long development and manufacturing cycles, which can extend or delay product introductions and are functional only for a very limited number of products. In addition, because of the expense associated with the design of ASICs, they are cost effective only if they can be manufactured in high volumes. Finally, once ASICs are manufactured, their functionality cannot typically be changed to respond to evolving market demands.

ASSPs have become widely utilized, as industry standards have developed to address increasing system complexity and the need for communication between systems and system components. These standards include:

· Peripheral Component Interconnect, or PCI, mini-PCI and CardBus, which are standards developed to provide a high-performance, reliable and cost-effective method of connecting high-speed devices within a system;

· Ethernet, a widely used local area network, or LAN, transport standard that controls the interconnection between systems;

· Wireless LAN (also referred to as IEEE 802.11x or WLAN), which transfers information wirelessly between two or more discrete systems; and

· Secure Digital Input/Output, or SDIO, which allows the secure exchange of data, enabling usage restrictions to satisfy copyright holders.

Compared to ASICs, ASSPs offer the systems designer shorter development time, proven functionality, lower risk and reduced development cost. Since the devices are offered broadly to the market, it is challenging for a systems supplier to solely leverage these devices to differentiate their offering from competitors. Additionally, since these devices are relatively generic when compared to ASICs, it is highly likely that a systems supplier will need to supplement the ASSP with additional components to meet their unique system requirements. Much like ASICs, these devices cannot be modified by the system supplier to support changing system requirements or to address new markets.

Programmable logic devices are often used by system manufacturers to add logic features to their systems, to adapt to rapidly changing industry standards, to increase system performance by performing logic functions in programmable logic instead of a microprocessor, or to supply a programmable connection between several ASSPs. Programmable logic has a fundamental advantage over an ASIC in that programmable logic enables faster time to market with shorter design cycles. In addition, PLDs are standard products sold to many customers for use in many applications with off-the-shelf availability. Since ASICs are custom components architected and manufactured to a customer specification, ASICs have a relatively long time-to-market, high technical risk and large development cost for the systems supplier. Because PLDs are programmable, they provide systems manufacturers with the flexibility to customize and thereby differentiate their systems or expand their served market, unlike ASSPs. PLDs also enable systems manufacturers to change the logic functionality of their systems after product introduction without the expense and time of redesigning an ASIC. However, PLDs are generally more expensive than ASSPs and ASICs of equivalent functionality because they require more silicon area and typically offer lower performance than fixed function devices, such as ASSPs and ASICs.

Industry Future: A True System-on-a-Chip?

Over the past few years, semiconductor manufacturers have migrated to smaller process geometries. These smaller process geometries enable more logic elements to be incorporated in a single chip using less silicon area. Components known as system-on-a-chip, or SoC, are available from a broad range of suppliers and integrate a combination of logic, memory and a microprocessor on a single chip. Advantages of the single-chip approach to systems manufacturers include:

· simplified system development;

· reduced time-to-market;

· elimination of delays associated with the transfer of data between chips;

· smaller physical size;

· lower power dissipation;

· greater reliability; and

· lower cost.

However, the expense associated with bringing a SoC to market has risen to the point where significant decisions regarding the appropriate level of integration have to be made in order to achieve an attractive return on investment. Factors include profit margin, breadth and size of markets addressed and the time to market. The competitive pressures of time-to-market, incorporation of new industry standards, product costs, system performance and development expenses are causing many companies to use multiple intelligent components on a printed circuit board to supplement an SoC or instead of an SoC.

QuickLogic’s Solutions

Our products are based on our patented ViaLink technology and user-programmable platform, and associated QuickWorks and QuickTools design software. We have leveraged our unique ViaLink technology to develop products with the lowest power consumption available in an FPGA product, high performance, design security, small form factor and price points demanded by our target markets. Specifically, our products are capable of delivering the system-level functionality of ASSPs and the flexibility and rapid time-to-market of FPGAs in a single device. We believe our ESPs offer the following specific advantages:

· Lower Power Consumption. Our ViaLink technology results in low power products compared to FPGA devices that use SRAM technology to implement programmable logic. Our products have low power consumption during power-up, quiescent and dynamic modes of operation. In addition, fixed function elements embedded in our ESPs are consistently more power efficient than implementations using SRAM-based FPGA technology. Furthermore, by integrating the functionality of multiple chips into one piece of silicon, the power consumed through I/Os driving off-chip through a printed circuit board, or PCB, is typically reduced by a significant amount;

· Shorter Development Time. With a multiple chip design, systems designers must solve complex routing and timing issues between devices. A single chip ESP provides an “out-of-the-box” solution to the timing issues between devices and simplifies software simulation, leading to shorter development cycles and the utilization of fewer resources;

· Design Security. The FPGA portion of our ESPs provides more security for our customers’ intellectual property than SRAM-based FPGAs;

· Increased Performance for a Power Budget. Our low-power Eclipse II and QuickPCI II products are architected to provide high performance at very low power, making them compelling for low-power embedded systems supporting relatively large bandwidth;

· Lower Cost of Ownership. We allow customers to bring products to market quickly and to preserve their investment in system software across multiple designs; and

· Increased Reliability. Since ViaLink-based products do not rely on a SRAM-cell to define and maintain its functionality, the device’s continued operation is consistently more robust in harsh environments than SRAM-based FPGA products.

Our Eclipse and QuickRAM devices combine programmable logic with dedicated memory blocks. These ViaLink-based products offer high performance at low power, security of intellectual property and competitive pricing when compared to alternative FPGA solutions. Our newest FPGA family, Eclipse II, was announced in 2003 and began limited production shipments in 2004. Our Eclipse II family of FPGAs consists of medium to low density FPGAs that have the lowest power consumption in the FPGA industry.

Designs using Eclipse II achieve significantly longer system battery life than designs based on rival FPGA architectures, due to ultra-low power consumption during power-up, quiescent, and dynamic states. Quiescent power consumption of the Eclipse II family of devices is 20 to 400 times lower than other FPGAs of similar density.

Some ESPs contain a programmable logic array, SRAM memory blocks, and dedicated functions such as PCI interface blocks. These products combine the low power, security of intellectual property and competitive pricing of our other ViaLink-based products, with the proven performance and short time to market provided by incorporating additional standard features. For instance, many of today’s embedded electronic systems wish to provide connectivity using peripheral component interconnect, or PCI, in order to leverage low-cost display, networking and storage peripherals originally developed for the personal computer market. Implementing PCI on a semiconductor product requires multiple pins and increases costs, and as a result the majority of embedded processor suppliers do not integrate PCI with their full line of microprocessors. Our QuickPCI II devices can provide a proven, cost-effective, low-power connection between the local bus of the processor and the display, networking or storage component. This family is supported with a range of comprehensive software and hardware development kits that allows the developer to focus on adding value to the end product without the requirement of first becoming an expert on an industry-standard system bus.

We also feature a QuickMIPS family of “programmable system-on-a-chip” ESP devices that blend an embedded processor subsystem, common peripherals (Ethernet MACs, PCI, UARTs, etc.) and programmable logic on a single piece of silicon. During 2003, we announced new QuickMIPS products and started limited production shipments during 2004. All QuickMIPS devices include a 32-bit RISC processor and tightly coupled memory subsystem, standard peripherals and programmable logic. On-chip PCI and Ethernet interfaces simplify the connection to a broad range of standard or emerging networking standards. The on-chip programmable logic can be used to implement proprietary algorithms such as data compression or encryption, thereby offloading the microprocessor and improving system performance while reducing power consumption. We offer our QuickMIPS customers development platforms and the ability to work with a variety of operating systems. As a result, designers can utilize proven hardware and software modules, greatly improving their time-to-market and reducing development risk.

The QuickLogic Strategy

Our objective is to be the indispensable provider of intelligent, programmable interconnect solutions, primarily for low-power embedded systems. We believe that our ESPs—products that integrate standard functions and programmable logic—provide our customers with low power consumption, IP security and flexibility at cost-effective prices while meeting system performance requirements. We believe these devices enable systems manufacturers to improve time-to-market and add features or performance to their embedded applications. To achieve our objective, we have adopted the following strategies:

Extend Technology Leadership

Our ViaLink technology, FPGA architecture, ASSP design capabilities, user-programmable platform and proprietary software design tools allow us to provide our customers with a unique solution to their design requirements. We intend to continue to invest in the development of these technologies and to utilize such developments in future innovations of our products. We also intend to focus engineering resources on developing system-level ESP solutions.

Provide Complete System Solutions

We recognize that today’s embedded system manufacturers are requiring silicon suppliers to deliver more than simply components and we have structured our organization and business initiatives to meet this challenge by:

· Partnering with Component Suppliers: The low power consumption, small form factor and high intellectual property security of our Eclipse II and QuickPCI II devices are compelling for customers and for other component suppliers, who can use QuickLogic products in reference designs or application notes to expand their served markets. We are developing and intend to develop relationships with tier-one suppliers of processor-based ASSPs and networking components such as Wireless LAN chipsets, display and storage components. The depth of these relationships varies depending on the partner and the dynamics of the end market being targeted, but is typically a co-marketing program that incorporates engineering collaboration, such as reference designs, joint account calls and promotional activities.

· Providing Design Services: These services extend our customers’ technical capabilities and shorten their time to market by supplementing their design teams with our experts in programmable logic design and embedded systems.

· Developing “Beyond the Silicon” Products: These value-added services for system manufacturers include power-aware tools that enable customers to minimize power consumption during the early stages of application design; predefined system functions delivered as intellectual property, or IP, cores; software drivers; reference designs; unique intellectual property optimized for use in QuickLogic’s programmable devices; and technical support.

Strategic Suppliers

As a part of our ESP strategy, we have formed strategic relationships with MIPS Technologies, Tower Semiconductor Ltd., Amkor Technology, Inc. and other companies to expand the range of technology that we embed in our products. These alliances are an essential element of our ESP strategy and a source of competitive strength going forward. By leveraging the expertise of our partners in intellectual property development, wafer fabrication and packaging, we can devote our efforts to the development of targeted, well-defined products.

Create Innovative, Industry-Leading Customer Services

We continue to develop and implement innovative ways to serve and communicate with our customers. For example, our WebASIC service allows customers to use our development software to design a circuit, transmit design information over the Internet and receive a QuickLogic ESP or FPGA device programmed with their design within one business day in North America and Europe or within two business days in Asia. In addition, our ProChannel web-based system allows our distributors to receive quotations, place orders for our products and view their order status over the Internet. This system complements the Electronic Data Interchange systems that we have used for the past several years with our largest customers.

Additionally, MyDesign.com, our secure design-support portal individualized for each of our customers, is an innovative way to serve and communicate with customers. It provides us with the ability to exchange information and advance system designs using our ESP and FPGA products.

Customers and Markets

The following is a representative list by industry of our current customers and the markets in which they do business:

Industry	Customer	Application
High-Performance Computing	IBM	RAID controller
	Unisys	Servers
Instrumentation and Test	ASML	Semiconductor manufacturing equipment
	Honeywell	Aircraft navigation and flight controls
	Medtronic	Medical electronics
	National Instruments	PC-based instrumentation boards
	Teradyne	Semiconductor test equipment
	Yokogawa	Semiconductor test equipment
Data Communications and Telecommunications	Agere	Wireless access systems
	Alcatel	Fiber optic transmission equipment
	Emulex	Storage Area Network equipment
	Motorola	Cellular base stations
	Nortel	Telecom switching equipment
Video, Audio and Graphics Imaging	Konami	Gaming platforms
	Loronix	Video imaging equipment
	Samsung	Flat panel display controllers
	Sony	Industrial video cameras
Military & Aerospace Systems	BAE Systems	Military flight controls
	DY-4	VME-based computer systems
	General Dynamics	Military communications equipment
	L-3 Communications	Aircraft data recorders
	MBDA	Munitions
	Northrop Grumman	Air traffic control systems

In addition, a Chinese systems manufacturer, purchasing our products through a distributor, accounted for 3%, 14% and 3% of revenue in 2004, 2003 and 2002, respectively. This customer used our products in a high-performance computing application.

A significant portion of our revenue comes from distributors and from sales to customers located outside of the United States. Please see Note 13 to our Consolidated Financial Statements.

In the past, there has not been a predictable seasonal pattern to our business.

Sales and Technical Support

We sell our products through a network of sales managers, independent sales representatives and point-of-sale distributors in North America, Europe and Asia. In addition to our corporate headquarters in Sunnyvale, California, we have regional sales operations in California, Minnesota, Texas, Massachusetts, New Hampshire and Maryland. We also have international sales operations in Canada, India, England, Germany, China, Japan, Hong Kong and Taiwan. Our sales personnel and independent sales representatives are responsible for sales and applications support for a given region of responsibility, generally focusing on major strategic accounts. Our customers typically order our products through our

distributors. Distributors also create demand for our devices, generally focusing on customers who are not directly served by our sales managers.

Currently, we have two distributors in North America, and a network of 14 distributors throughout Europe and Asia to support our international business. These distributors work with our regional sales managers in discovering new opportunities and providing technical support and other value-added services.

We provide systems manufacturers with comprehensive technical support, which we believe is critical to remaining competitive in the markets we serve. Our factory-based field and distributor applications support organizations provide pre-sales and on-site technical support to customers. Our design services organization extends our customers’ technical capabilities by supplementing their design teams with our experts in programmable logic design and embedded systems.

Backlog

We do not believe that backlog as of any particular date is indicative of future results. A majority of our quarterly shipments are typically booked during the quarter. Our sales are made primarily pursuant to standard purchase orders issued by OEM and distributor customers. Under our standard terms and conditions, a significant portion of our backlog is subject to cancellation or reschedule by these customers. Our distributor backlog is also subject to price adjustments upon the resale of the related inventory; as a result the total value of our backlog is not indicative of the related revenue. We believe that generally only a small portion of our backlog, excluding end-of-life programs, is non-cancelable and that the dollar amount associated with the non-cancelable portion is not significant.

Competition

The semiconductor industry is intensely competitive and is characterized by constant technological change, rapid rates of product obsolescence and price erosion. A number of companies offer products that compete with one or more of our products. Our existing competitors include: suppliers of conventional standard products, such as PLX Technology; suppliers of CPLDs including Lattice Semiconductor and Altera; suppliers of FPGAs, particularly Xilinx and Actel; and suppliers of embedded processors, such as Integrated Device Technology and Freescale Semiconductor. Xilinx and Altera dominate the programmable logic market and have substantially greater revenue, market presence and financial resources, than Actel, Lattice or us. Xilinx dominates the FPGA segment of the market while Altera dominates the CPLD segment of the market. As we introduce additional ESPs, we will also face competition from standard product manufacturers who are already servicing or who may decide to enter the markets addressed by these ESP devices. In addition, we expect significant competition in the future from major domestic and international semiconductor suppliers and from suppliers of products based on new or emerging technologies.

We believe that important competitive factors in our market are power consumption, performance, price, length of development cycle, installed base of development systems, adaptability of products to specific applications, ease of use and functionality of development system software, reliability, design services, technical service and support, wafer fabrication capacity and sources of raw materials, market presence, financial strength and intellectual property protection.

Research and Development

Our future success will depend to a large extent on our ability to rapidly develop and introduce new products and enhancements to our existing products that meet emerging industry standards and satisfy changing customer requirements. We have made and expect to continue to make substantial investments in

research and development and to participate in the development of products incorporating new and existing industry standards.

As of December 31, 2004, our research and development staff consisted of 57 employees working primarily in three locations: Canada, India and California.

· Our process engineering group develops our proprietary ViaLink wafer manufacturing process, oversees product manufacturing and process development with our third-party foundries, and is involved in ongoing process improvements to increase yields and optimize device characteristics.

· Our FPGA design engineering group develops high-performance programmable systems and analog circuits targeted for low-power embedded systems that can be used stand-alone or combined with standard functions to form ESPs.

· Our ASSP design engineering group develops or integrates standard functions that are combined with a programmable system to produce ESPs.

· Our FPGA software group develops the design libraries, interface routines and place and route software that allows our customers to use third-party design environments to develop designs using our products for their programmable systems and subsystems.

· Our embedded systems group develops the software required to program and use our MIPS-based products.

Manufacturing

We have close relationships with third-party manufacturers for our wafer fabrication, package assembly, testing and programming requirements to help ensure stability in the supply of our products and to allow us to focus our internal efforts on product design and sales.

We currently outsource our wafer manufacturing to Cypress Semiconductor Corporation, or Cypress, Taiwan Semiconductor Manufacturing Company, or TSMC, Samsung Semiconductor, Inc. and Tower. Cypress manufactures our pASIC^®1 and pASIC2 product families using a three-layer metal, 0.65 micron complementary metal oxide semiconductor, or CMOS, process on six-inch wafers. Our Cypress agreement provides for capacity availability through December 2005. TSMC manufactures our pASIC3, QuickRAM and certain QuickPCI products using a four-layer metal, 0.35 micron CMOS process. TSMC also manufactures our Eclipse and other ESP products using a five-layer metal, 0.25 micron process on eight-inch wafers. Samsung manufactures our ASSP products. We purchase products from TSMC and Samsung on a purchase order basis.

Tower manufactures our Eclipse II and certain QuickPCI II and QuickMIPS devices using a six-layer metal, 0.18 micron CMOS process incorporating our ViaLink technology. During 2000, we entered into a Share Purchase Agreement, a Foundry Agreement and other related agreements, as amended, with Tower under which we invested $21.3 million in Tower as part of Tower’s efforts to build and equip a new wafer fabrication facility. Tower supplies us with a guaranteed portion of the new fabrication facility’s available wafer capacity at competitive pricing. Our Tower agreement provides for guaranteed capacity availability through at least 2010.

Outsourcing of wafer manufacturing enables us to take advantage of these suppliers’ high-volume economies of scale. We may establish additional foundry relationships as such arrangements become economically useful or technically necessary.

We outsource our product packaging, testing and programming primarily to Amkor Technology, Inc. and Advanced Semiconductor Engineering, Inc., or ASE.

Employees

As of December 31, 2004, we had a total of 154 employees worldwide. We believe that our future success will depend in part on our continued ability to attract, hire and retain qualified personnel. None of our employees are represented by a labor union, and we believe our employee relations are favorable.

Intellectual Property

Our future success and competitive position depend upon our ability to obtain and maintain the proprietary technology used in our principal products. We hold 95 U.S. patents and have 4 pending applications for additional U.S. patents containing claims covering various aspects of programmable integrated circuits, programmable interconnect structures and programmable metal devices. In Europe and Asia, we have been granted a total of 3 patents and have a total of 6 patent applications pending. Our issued patents expire between 2010 and 2021. We have also registered seven trademarks with the U.S. Patent and Trademark Office.

From time to time, we receive letters alleging patent infringement or inviting us to take a license to other parties’ patents. We evaluate these requests on a case-by-case basis. Offers such as these may lead to litigation if we reject the opportunity to obtain the license or reject the other party’s demands.

Executive Officers and Directors

The following table sets forth certain information concerning our current executive officers and directors as of February 28, 2005:

Name	Age		Position
E. Thomas Hart		63	Chairman, President and Chief Executive Officer
Carl M. Mills		50	Vice President, Finance and Chief Financial Officer
Timothy Saxe		49	Vice President, Engineering
Jeffrey D. Sexton		43	Vice President, Worldwide Sales and Marketing
Reynold W. Simpson		56	Senior Vice President, Operations
Donald P. Beadle		69	Director
Michael J. Callahan		69	Director
Arturo Krueger		65	Director
Gary H. Tauss		50	Director

E. Thomas Hart has served as our President, Chief Executive Officer and a member of our Board of Directors since June 1994, and as our Chairman since April 2001. Prior to joining QuickLogic, Mr. Hart was Vice President and General Manager of the Advanced Networks Division at National Semiconductor Corporation, a semiconductor manufacturing company, where he worked from September 1992 to June 1994. Prior to joining National Semiconductor, Mr. Hart was a private consultant from February 1986 to September 1992 with Hart Weston International, a technology-based management consulting firm. Prior experience includes senior level management responsibilities in semiconductor operations, engineering, sales and marketing with several companies including Motorola, Inc., an electronics provider, and National Semiconductor. Mr. Hart holds a B.S.E.E. from the University of Washington.

Carl M. Mills has served as our Vice President, Finance and Chief Financial Officer since August 2002. From November 2000 to July 2002, Mr. Mills was Vice President of Finance and Chief Financial Officer of AltoWeb, Inc., a software company. From November 1987 to September 2000, Mr. Mills held several positions, most recently Vice President of Finance and Chief Financial Officer, at WaferScale Integration, Inc., a producer of peripheral integrated circuits. Mr. Mills holds a B.S. degree and an M.B.A. degree from Santa Clara University.

Timothy Saxe joined QuickLogic in May 2001 and has served as our Vice President, Engineering since November 2001. From November 2000 to February 2001, Mr. Saxe was Vice President of FLASH Engineering at Actel Corporation, a semiconductor manufacturing company. Mr. Saxe joined GateField Corporation, a design verification tools and services company formerly known as Zycad, in June 1983 and was a founder of their semiconductor manufacturing division in 1993. Mr. Saxe became GateField’s Chief Executive Officer in February 1999 and served in that capacity until GateField was acquired by Actel in November 2000. Mr. Saxe holds a B.S.E.E. degree from North Carolina State University, and an M.S.E.E. and a Ph.D. in electrical engineering from Stanford University.

Jeffrey D. Sexton has served as our Vice President, Worldwide Sales and Marketing since January 2005 and as our Vice President, Worldwide Sales since August 2001. Between January 1995 and August 2001, he held several positions at National Semiconductor Corporation including Director of Distribution, Regional Sales Manager, Cisco Systems Global Account Manager and OEM Sales Engineer. Mr. Sexton holds a B.S.E.E. degree from Wright State University in Dayton, OH.

Reynold W. Simpson has served as our Senior Vice President, Operations since January 2005. Mr. Simpson joined QuickLogic in August 1997 and became our Senior Vice President and Chief Operating Officer in October 2000. From February 1996 to July 1997, Mr. Simpson was Vice President of Manufacturing at GateField Corporation, a design verification tools and services company formerly known as Zycad. From February 1989 to February 1996 Mr. Simpson held various positions at LSI Logic Corporation, a semiconductor manufacturing company, including Operations Manager and Quality Director. Mr. Simpson holds a Mechanical Engineering Certificate from the Coatbridge Polytechnic Institute in Scotland, a degree in Technical Horology (mechanical engineering) from the Barmulloch Polytechnic Institute in Scotland and studied for a degree in electronic engineering at the Kingsway Polytechnic Institute in Scotland.

Donald P. Beadle has served as a member of our Board of Directors since July 1997. Since June 1994, Mr. Beadle has been President of Beadle Associates, a consulting firm. From October 1994 to December 1996, Mr. Beadle was a consultant for Asian business development at National Semiconductor Corporation. At National Semiconductor, he was Managing Director, Southeast Asia from 1993 until June 1994, Vice President of Worldwide Marketing and Sales, International Business Group from 1987 until 1993, and Managing Director, Europe from 1982 to 1986. Mr. Beadle was employed by National Semiconductor in executive sales and marketing positions for 34 years until June 1994, at which time he was Executive Vice President, Worldwide Sales and Marketing. Mr. Beadle serves on the Board of ASAT Holdings Limited, which files reports pursuant to the Securities and Exchange Act of 1934, as amended (the “Exchange Act”), and is a provider of semiconductor assembly and testing services. Mr. Beadle received his technical education at the University of Connecticut and the Bridgeport Institute of Engineering.

Michael J. Callahan has served as a member of our Board of Directors since July 1997. Since January 2004, Mr. Callahan has been the Chairman of Teknovus, Inc., a privately held company specializing in communications chipsets for subscriber access networks. From March 1990 through his semi-retirement in September 2000, Mr. Callahan served as Chairman of the Board, President and Chief Executive Officer of WaferScale Integration, Inc., a producer of peripheral integrated circuits. From 1987 to March 1990, Mr. Callahan was President of Monolithic Memories, Inc., a semiconductor manufacturing company. During this period Monolithic Memories became a subsidiary of Advanced Micro Devices, Inc., a semiconductor manufacturing company, where Mr. Callahan was Senior Vice President of Programmable Products. From 1978 to 1987, Mr. Callahan was employed by Monolithic Memories in various positions including Vice President of Operations and Chief Operating Officer. Prior to joining Monolithic Memories, he worked at Motorola Semiconductor for 16 years where he was Director of Research and Development as well as Director of Linear Operations. Mr. Callahan also serves on the Board of Virtual Silicon Technology, Inc., a supplier of semiconductor intellectual property (SIP) to

Delaware	77-0188504
(State or other jurisdiction of incorporation or organization)	(I.R.S. Employer Identification Number)
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Registrant’s telephone number, including area code: (408) 990-4000
Securities registered pursuant to Section 12(b) of the Act: None
Securities registered pursuant to Section 12(g) of the Act: Common Stock, $0.001 par value
Rights to Purchase Series A Junior Participating Preferred Stock
(Title of Class)