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UNITED STATES
SECURITIES AND EXCHANGE COMMISSION

Washington, D.C. 20549


FORM 10-K

(Mark One)

x                              ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE
SECURITIES EXCHANGE ACT OF 1934 FOR THE FISCAL YEAR ENDED
JANUARY 1, 2005

or

o                                 TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE
SECURITIES EXCHANGE ACT OF 1934

FOR THE TRANSITION PERIOD FROM                   TO                  

Commission file number: 000-18032


LATTICE SEMICONDUCTOR CORPORATION

(Exact name of Registrant as specified in its Charter)

Delaware

 

93-0835214

(State of Incorporation)

 

(I.R.S. Employer Identification Number)

5555 NE Moore Court Hillsboro, Oregon

 

97124-6421

(Address of principal executive offices)

 

(Zip Code))

 

Registrant’s telephone number, including area code: (503) 268-8000

Securities registered pursuant to Section 12(b) of the Act: None

Securities registered pursuant to Section 12(g) of the Act:

 

Title of Class

 

 

Common Stock, $.01 par value

 

 

Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. Yes x No o

Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of the registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K. x

Indicate by check mark whether the Registrant is an accelerated filer (as defined in Rule 12b-2 of the Act). Yes x No o

As of July 3, 2004 (the last business day of the Registrant’s second quarter of fiscal 2004), the aggregate market value of the shares of voting stock (Common Stock) of the Registrant held by non-affiliates was approximately $452.5 million based on the last sales price of the Registrant’s Common Stock on the Nasdaq National Market on such date. Shares of Common Stock held by each officer and director and by each person who owns 5% or more of the outstanding Common Stock have been excluded in that such persons may be deemed affiliates. This determination of affiliate status is not necessarily a conclusive determination for other purposes.

As of March 11, 2005, 113,611,860 shares of the Registrant’s common stock were outstanding.

DOCUMENTS INCORPORATED BY REFERENCE

Portions of the definitive proxy statement of the Registrant to be filed pursuant to Regulation 14A for the 2005 Annual Meeting of Stockholders to be held on May 3, 2005 are incorporated by reference in Part III hereof.

 




 

LATTICE SEMICONDUCTOR CORPORATION
FORM 10-K
ANNUAL REPORT

TABLE OF CONTENTS

ITEM OF FORM 10-K

 

 

 

Page

PART I

 

 

 

 

Item 1.

 

- Business

 

2

Item 2.

 

- Properties

 

12

Item 3.

 

- Legal Proceedings

 

12

Item 4.

 

- Submission of Matters to a Vote of Security Holders

 

13

PART II

 

 

 

 

Item 5.

 

- Market for the Registrant’s Common Stock, Related Stockholder Matters, and Issuer Purchases of Equity Securities

 

14

Item 6.

 

- Selected Financial Data

 

15

Item 7.

 

- Management’s Discussion and Analysis of Financial Condition and Results of Operations

 

16

Item 7(a)

 

- Quantitative and Qualitative Disclosures About Market Risk

 

35

Item 8.

 

- Financial Statements and Supplementary Data

 

36

Item 9.

 

- Changes in and Disagreements with Accountants On Accounting and Financial Disclosure

 

64

Item 9A.

 

- Controls and Procedures

 

64

Item 9B.

 

- Other Information

 

65

PART III

 

 

 

 

Item 10.

 

- Directors and Executive Officers of the Registrant

 

66

Item 11.

 

- Executive Compensation

 

66

Item 12.

 

- Security Ownership of Certain Beneficial Owners and Management and Related Stockholder Matters

 

66

Item 13.

 

- Certain Relationships and Related Transactions

 

67

Item 14.

 

- Principal Accountant Fees and Services

 

67

PART IV

 

 

 

 

Item 15.

 

- Exhibits and Financial Statement Schedules

 

68

Signatures

 

71

Financial Statement Schedule

 

S-1

 

 

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Forward-Looking Statements

This Annual Report on Form 10-K contains forward-looking statements within the meaning of Section 27A of the Securities Act of 1933, as amended, and Section 21E of the Exchange Act. Any statements about our expectations, beliefs, plans, objectives, assumptions or future events or performance are not historical facts and may be forward-looking. We use words or phrases such as “anticipates,” “believes,” “estimates,” “expects,” “intends,” “plans,” “projects,” “may,” “will,” “should,” “continue,” “ongoing,” “future,” “potential” and similar words or phrases to identify forward-looking statements.

Forward-looking statements involve estimates, assumptions, risks and uncertainties that could cause actual results to differ materially from those expressed in them. Among the key factors that could cause our actual results to differ materially from the forward-looking statements are delay in product or technology development, change in economic conditions of the various markets we serve, lack of market acceptance or demand for our new products, dependencies on silicon wafer suppliers and semiconductor assemblers, the impact of competitive products and pricing, opportunities or acquisitions that we pursue, the availability and terms of financing, and the other risks that are described herein and that are otherwise described from time to time in our filings with the Securities and Exchange Commission, including but not limited to the items discussed in “Factors Affecting Future Results” set forth in “Management’s Discussion and Analysis of Financial Condition and Results of Operations” in Item 7 of this report. You should not unduly rely on forward-looking statements because our actual results could differ materially from those expressed in any forward-looking statement made by us. Further, any forward-looking statement applies only as of the date on which it is made. We are not required to update any forward-looking statement or statements to reflect events or circumstances after the date on which such statement is made or to reflect the occurrence of unanticipated events.

Item 1. Business.

Lattice Semiconductor Corporation designs, develops and markets high performance programmable logic products and related software. Programmable logic products are widely-used semiconductor components that can be configured by end customers as specific logic circuits, and thus enable shorter design cycle times and reduced development costs. Our end customers are primarily original equipment manufacturers in the communications, computing, consumer, industrial, automotive, medical and military end markets.

Lattice was incorporated in Oregon in 1983 and reincorporated in Delaware in 1985. Our principal offices are located at 5555 N.E. Moore Court, Hillsboro, Oregon 97124, our telephone number is (503) 268-8000 and our website can be accessed at www.latticesemi.com. Information contained or referenced on our website is not incorporated by reference in and does not form a part of this Annual Report on Form 10-K.

We report based on a 52 or 53 week year ending on the Saturday closest to December 31. For ease of presentation, we have adopted the convention of using March 31, June 30, September 30 and December 31 as period end dates for all financial statement information. Our fiscal 2004 and 2002 were 52-week years. Our 2003 fiscal year was a 53-week year.

Programmable Logic Market Background

Three principal types of digital integrated circuits are used in most electronic systems: microprocessors, memory and logic. Microprocessors are used for control and computing tasks, memory is used to store programming instructions and data, and logic is employed to manage the interchange and manipulation of digital signals within a system. Logic contains interconnected groupings of simple logical “and” and logical “or” functions, commonly described as “gates.” Typically, complex combinations of individual gates are required to implement the specialized logic functions required for systems

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applications. While system designers use a relatively small variety of standard products to meet their microprocessor and memory needs, they require a wide variety of logic products in order to achieve end product functionality and differentiation.

Logic circuits are found in a wide range of today’s digital electronic equipment including communications, computing, consumer, industrial, automotive, medical, and military systems. According to Gartner1, logic accounted for approximately 37% of the estimated $220 billion worldwide semiconductor market in 2004. The logic market encompasses general purpose logic semiconductor products, which include programmable logic devices, and application-specific semiconductor devices, which includes ASICs (devices marketed to a single user) and ASSPs (devices marketed to multiple users).

Manufacturers of electronic equipment are challenged to bring differentiated products to market quickly. These competitive pressures often preclude the use of custom-designed ASICs, which generally entail significant design risks, non-recurring costs and time delays. Standard logic products, an alternative to custom-designed ASICs, limit a manufacturer’s flexibility to adequately customize an end system. Programmable logic addresses this inherent dilemma. Programmable logic is a standard semiconductor product, purchased by systems manufacturers in a “blank” state, that can be custom configured into virtually unlimited combinations of specific logic functions by programming the device with electrical signals. Programmable logic gives system designers the ability to quickly create custom logic functions to provide product differentiation without sacrificing rapid time to market.

According to Gartner1, the programmable logic market was approximately $3.1 billion in 2004. Within this market, there are two main segments, programmable logic devices (“PLDs”) and field programmable gate arrays (“FPGAs”), each representing a distinct silicon architectural approach. Our company believes that, in 2004, PLD was a $0.6 billion market while FPGA was a $2.5 billion market. Products based on the two alternative programmable logic architectures are generally optimal for different types of logic functions, although many logic functions can be implemented using either architecture. PLDs are characterized by a regular building block structure of wide-input logic cells, called macrocells, and use a centralized logic interconnect scheme. FPGAs are characterized by a narrow-input logic cell and use a distributed interconnect scheme. FPGAs may also contain dedicated blocks of fixed circuits such as memory, high-speed input/output interfaces or processors. Although PLDs and FPGAs are typically suited for use in distinct types of logic applications, we believe that a substantial portion of programmable logic customers utilize both PLD and FPGA products.

Lattice Products

We strive to offer innovative and differentiated programmable solutions based on our proprietary technology and intellectual property.


(1)          Semiconductor Forecast Worldwide—Forecast Database,” Richard Gordon, Gartner, Feb 15, 2005

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FPGA Products

In 2002, we entered the FPGA market as a result of our acquisition of the FPGA business of Agere and the introduction of our internally developed ispXP™ product families. During 2004, approximately 19% of our revenue was derived from FPGA products, as compared to 18% in 2003 and 12% in 2002. In the future, we plan to introduce new families of innovative, high performance and higher density FPGAs. The key features of our newest FPGA families currently in production are described in the table below:

FPGA Family

 

 

 

Process
Technology (nm)

 

Operating
Voltage

 

Logic
(K LUTs)

 

Logic
(K Gates)

 

Max
RAM (kB)

 

I/O Pins

 

LatticeEC™/ECP™

 

 

130

 

 

1.2

 

1.5-32.8

 

50-1,800

 

 

666

 

 

67-496

 

ORCA® 4 FPSC

 

 

160

 

 

1.5

 

5.0-16.2

 

200-3,400

 

 

148

 

 

204-498

 

IspXP

 

 

180

 

 

3.3/2.5/1.8

 

0.5-15.4

 

25-1,250

 

 

512

 

 

141-496

 

 

The Lattice EC/ECP families, introduced in 2004, are our newest FPGA products available in volume production. These families were designed to provide customers the lowest total solution cost and support emerging requirements in high volume applications. Additionally, these families provide several unique, performance enhancing features not currently available in competitive low-cost FPGA families. These features include built-in double data rate (“DDR”) memory support, a flexible high-performance DSP block and support for industry standard, low cost, SPI-flash boot memories.

Our ORCA 4 family of field programmable system chips (“FPSCs”) combines generic FPGAs with embedded intellectual property cores on a single programmable chip, offering customers the ability to quickly implement complex system-level designs in a flexible manner. Currently, we offer eight FPSC devices, the ORT82G5, ORT42G5, ORT8850L, ORT8850H, ORLI10G, ORSO82G5, ORSO42G5 and ORSPI4, based on the ORCA 4 FPGA platform. These devices incorporate high-speed interface protocols, offering up to 3.7 Gbs SERDES, and other application-specific circuit blocks that allow customers to develop high performance designs to implement 10 Gigabit Ethernet and SONET applications within advanced communications systems.

Our ispXP families feature extended programmability (“XP™”) technology and represent our first generation of non-volatile FPGA products. XP technology provides customers with several benefits compared to traditional volatile FPGAs, based on SRAM technology, which currently make up the majority of the FPGA market. These benefits include enhanced security, instant-on logic functionality and elimination of external programming devices.

We also offer an additional product family, the ispGDX®, that targets a unique aspect of the programmable logic market. This family extends in-system programmability to the circuit board level using an innovative digital cross-point switch architecture. Offered with propagation delays as low as 3.0 nanoseconds, ispGDX products are targeted toward digital signal interconnect and interface applications.

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PLD Products

During 2004, approximately 81% of our revenue was derived from PLD products, as compared to 82% in 2003 and 88% in 2002. At present, we offer the industry’s broadest line of PLDs based on our numerous families of ispLSI®, ispMACH™ and GAL® products. In the future, we plan to continue to introduce new families of innovative PLD products, as well as improve the performance and reduce the manufacturing cost of our existing product families based on market needs. We believe that our multiple families of leadership PLD products provide us with a competitive advantage in this market. The key features of our newest PLD families are described in the table below:

PLD Family

 

 

 

Process
Technology (nm)

 

Operating
Voltage

 

Maximum
Speed
(MHz)

 

Minimum
Prop Delay
(Nanoseconds)

 

Logic
(Macrocells)

 

I/O Pins

 

ispMACH 4000V/B/C

 

 

180

 

 

3.3/2.5/1.8

 

 

400

 

 

 

2.5

 

 

 

32-512

 

 

30-208

 

ispMACH 4000Z

 

 

180

 

 

1.8

 

 

267

 

 

 

3.5

 

 

 

32-256

 

 

32-128

 

 

In addition to high performance, the ispMACH 4000Z family features an architecture optimized to ensure ultra-low power consumption. Devices within this new family, targeted toward handheld and portable equipment, typically operate using 10-15 microamps of current while in standby mode.

We also offer the industry’s broadest line of low-density simple PLDs (“SPLD”), based on our 18 families of GAL products offered in over 200 speed, power, package and temperature range combinations. These devices range in complexity from approximately 200 to 1,000 logic gates and are typically assembled in 20-, 24-and 28-pin standard dual in-line packages and in 20-and 28-pin standard plastic leaded chip carrier packages. We offer the standard 16V8, 20V8 and 22V10 architectures in a variety of speed grades, with propagation delays as low as 3.5 nanoseconds, the highest performance in the industry.

In addition, we have recently introduced the ispPAC®-CLK and ispPAC-PWR families of programmable mixed signal devices. These devices, featuring a combination of programmable logic and programmable analog, allow system designers to quickly and easily implement a wide variety of power and clock management functions within a single integrated circuit. ispPAC products can replace numerous discrete components while providing customers with additional design flexibility and time to market benefits. We believe these devices provide an opportunity to extend our proprietary technology to an untapped potential market.

Software Development Tools

Our products are supported by the ispLEVER® 4.2 software development tool suite and PAC-Designer™ software. Supporting the PC, UNIX and LINUX platforms, ispLEVER software allows our customers to enter, verify and synthesize a design, perform logic simulation and timing analysis, assign input/output pins, designate critical paths, debug, execute automatic timing-driven place and route tasks, and download logic and input/output configurations to one of our devices. Seamlessly integrated with third-party electronic design automation environments, ispLEVER software provides a front-to-back design flow that leverages a customer’s prior investment in tools offered by Cadence, Mentor Graphics, Synopsys and Synplicity. In the future, we plan to continue to enhance and expand the capability of our software development tool suite.

Product Development

We place substantial emphasis on new product development and believe that continued investment in this area is required to maintain and improve our competitive position. Our product development activities emphasize new proprietary products, enhancement of existing products and process technologies and

5




improvement of software development tools. Product development activities occur in Hillsboro, Oregon; San Jose, California; Broomfield, Colorado; Naperville, Illinois; Bethlehem, Pennsylvania; Austin, Texas; Salt Lake City, Utah; Shanghai, China; and Chippenham, England.

Research and development expenses were $91.0 million in 2004, $87.1 million in 2003 and $85.8 million in 2002. We expect to continue to make significant future investments in research and development.

Operations

We do not manufacture our own silicon wafers. We maintain strategic relationships with large semiconductor foundries to source our finished silicon wafers. This strategy allows us to focus our internal resources on product, process and market development, and eliminates the fixed cost of owning and operating manufacturing facilities. We are also able to take advantage of the ongoing advanced process technology development efforts of semiconductor foundries. In addition, all of our assembly operations and most of our test operations are performed by outside suppliers. We perform certain test operations and reliability and quality assurance processes internally. We have achieved and maintained ISO 9001 quality certification since 1993, which is an indication of our high internal operational standards.

Wafer Fabrication

We source silicon wafers from our foundry partners, Fujitsu Limited (“Fujitsu”) in Japan, Seiko Epson in Japan, United Microelectronics Corporation (“UMC”) in Taiwan and Chartered Semiconductor Manufacturing, Ltd. (“Chartered Semiconductor”) in Singapore, pursuant to agreements with each company and their respective affiliates. We negotiate wafer volumes, prices and other terms with our foundry partners and their respective affiliates on a periodic basis.

Assembly

After wafer fabrication and initial testing, we ship wafers to independent subcontractors for assembly. During assembly, wafers are separated into individual die and encapsulated in plastic or ceramic packages. Presently, we have qualified long-term assembly partners in China, Japan, Malaysia, the Philippines, South Korea, and Taiwan. We negotiate assembly prices, volumes, and other terms with our assembly partners and their respective affiliates on a periodic basis.

Testing

We electrically test the die on each wafer prior to shipment for assembly. Following assembly, prior to customer shipment, each product undergoes final testing and quality assurance procedures. Final testing on certain products is performed by independent contractors in China, Malaysia, the Philippines, South Korea and Taiwan, and at our Oregon facility.

Marketing, Sales and Customers

We sell our products directly to end customers through a network of independent manufacturers’ representatives and indirectly through a network of independent distributors. We also employ a direct sales management and field applications engineering organization to support our end customers and indirect sales resources. Our end customers are primarily original equipment manufacturers in the communications, computing, consumer, industrial, automotive, medical and military end markets.

As of December 2004, we used 20 manufacturers’ representatives and two distributors, Arrow Electronics, Inc. and Avnet Inc., in North America. We have also established export sales channels in over 25 foreign countries through a network of over 25 sales representatives and distributors. The majority of our sales are made through distributors.

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We protect each of our North American distributors and some of our foreign distributors against reductions in published prices, and expect to continue this policy in the foreseeable future. We also allow returns from these distributors of unsold products under certain conditions. For these reasons, we do not recognize revenue until products are resold by these distributors to an end customer.

We provide technical and marketing support to our end customers with engineering staff based at our headquarters, product development centers and selected field sales offices. We maintain numerous domestic and international field sales offices in major metropolitan areas.

Export sales as a percentage of our total revenue were 71% in 2004, 68% in 2003 and 60% in 2002. Export sales to Japan were approximately 14% of revenue in 2004, 11% of revenue in 2003 and 8% of revenue in 2002, while export sales to China were 13% of revenue in 2004, slightly less than 10% in 2003, and approximately 6% in 2002. Both export and domestic sales are denominated in U.S. dollars, with the exception of sales to Japan, which are denominated in yen. If our export sales decline significantly there would be a material adverse impact on our business and results of operations.

Our products are sold to a large and diverse group of customers. No individual end customer accounted for more than 10% of total revenue in 2004, 2003 or 2002.

Backlog

Our backlog of scheduled and released orders as of December 31, 2004 was approximately $25.5 million as compared to approximately $45.1 million as of December 31, 2003. This backlog consists of direct customer and distributor orders scheduled for delivery within the next 90 days. Distributor orders accounted for the majority of the backlog in both periods. Direct customer orders may be changed, rescheduled or cancelled under certain circumstances without penalty prior to shipment. Additionally, distributor orders generally may be changed, rescheduled or cancelled without penalty prior to shipment. Furthermore, certain of our distributor shipments are subject to rights of return and price adjustment. Revenue associated with these distributor shipments are not recognized until the product is resold to an end customer. Typically, the majority of our revenue results from orders placed and filled within the same period. Such orders are referred to as “turns orders.” By definition, turns orders are not captured in a backlog measurement made at the beginning of a period. We do not anticipate a significant change in this business pattern. For all these reasons, backlog as of any particular date should not be used as a predictor of revenue for any future period.

Competition

The semiconductor industry is intensely competitive and characterized by rapid rates of technological change, product obsolescence and price erosion. Our current and potential competitors include a broad range of semiconductor companies from emerging companies to large, established companies, many of which have greater financial, technical, manufacturing, marketing and sales resources than we do.

The principal competitive factors in the programmable logic market include product features, price, customer support, and sales, marketing and distribution strength. The availability of competitive software development tools is also critical. In addition to product features such as density, speed, power consumption, reprogrammability, design flexibility and reliability, competition occurs on the basis of price and market acceptance of specific products and technology. We intend to continue to address these competitive factors by working to continually introduce product enhancements and new products, by seeking to establish our products as industry standards in their respective markets, and by working to reduce the manufacturing cost of our products.

We compete directly with Actel Corporation, Altera Corporation and Xilinx Inc., all of whom offer competing products. We also indirectly compete with other semiconductor companies who provide logic

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solutions that are not user programmable. Although to date we have not experienced direct competition from companies located outside the United States, such companies may become a more significant competitive factor in the future. Competition may also increase if other semiconductor companies seek to expand into our market. Any such increases in competition could have a material adverse effect on our operating results.

Patents

We seek to protect our products and technologies primarily through patents, trade secrecy measures, copyrights, mask work protection, trademark registrations, licensing restrictions, confidentiality agreements and other approaches designed to protect proprietary information. There can be no assurance that others may not independently develop competitive technology not covered by our intellectual property rights or that measures we take to protect our technology will be effective.

We hold numerous domestic, European and Asian patents and have patent applications pending in the United States, Asia and Europe. Our current patents will expire at various times between 2005 and 2023. There can be no assurance that pending patent applications or other applications that may be filed will result in issued patents, or that any issued patents will survive challenges to their validity. Although we believe that our patents have value, there can be no assurance that our patents, or any additional patents that may be issued in the future, will provide meaningful protection from competition. We believe that our success will depend primarily upon the technical expertise, experience, creativity and the sales and marketing abilities of our personnel.

Patent and other proprietary rights infringement claims are common in our industry. There can be no assurance that, with respect to any claim made against us, we could obtain a license on terms or under conditions that would not harm our business.

Licenses and Agreements

Advanced Micro Devices

In 1999, as part of our acquisition of Vantis Corporation, a wholly-owned subsidiary of Advanced Micro Devices, Inc. (“AMD”), we entered into an agreement with AMD pursuant to which we have cross-licensed Vantis patents with AMD patents, having an effective filing date on or before June 15, 1999, related to programmable logic products. This cross-license was made on a worldwide, non-exclusive and royalty-free basis. Additionally, as part of our acquisition of Vantis, we acquired certain third-party license rights held by Vantis prior to the acquisition. Included are rights to use certain Xilinx patents to manufacture, market and sell products.

Agere Systems

In 2002, as part of our acquisition of the FPGA business of Agere, we entered into an intellectual property agreement with Agere and Agere Systems Guardian Corporation. Pursuant to this agreement, these Agere companies assigned or licensed to us certain FPGA and FPSC patents, trademarks, software and other intellectual property rights and technology, and we licensed back rights in these same assets. These cross-licenses were made on a worldwide and royalty-free basis.

Altera

In 2001, we entered into a comprehensive, royalty-free patent cross-license agreement and a multi-year patent peace agreement with Altera.

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Fujitsu

On September 10, 2004, we entered into an Advance Payment and Purchase Agreement (the “Fujitsu Agreement”) with Fujitsu Limited (“Fujitsu”), pursuant to which we will advance $125.0 million to Fujitsu in support of the development and construction of a new 300mm wafer fabrication facility in Mie, Japan. The initial two payments of $25.0 million each were made in October 2004 and January 2005, with the remaining payments to be made in two stages upon the achievement of certain milestones. We currently anticipate that the advance payment will be paid in full by the second quarter of 2006.

Our $125.0 million advance will be credited against the purchase price of 300 mm wafers from the new wafer fabrication facility. The Fujitsu Agreement will continue until the full amount of the advance payment has been returned to us in the form of wafers or other repayment, subject to the right of either party to terminate the agreement upon the occurrence of certain events. We may request a refund of the unused amount of the advance payment if we have not used all of our wafer credits by December 31, 2007. The repayment obligation of Fujitsu is unsecured.

Seiko Epson/Epson Electronics America

Epson Electronics America (“EEA”), an affiliated U.S. distributor of Seiko Epson, has agreed to provide us with manufactured wafers in quantities based on six-month rolling forecasts. Prices for the wafers obtained from EEA are reviewed and adjusted periodically. Wafers for our products are manufactured in Japan at Seiko Epson’s wafer fabr