Back to GetFilings.com
1
- --------------------------------------------------------------------------------
- --------------------------------------------------------------------------------
UNITED STATES
SECURITIES AND EXCHANGE COMMISSION
WASHINGTON, D.C. 20549
------------------------
FORM 10-K
------------------------
(MARK ONE)
[X] ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE
SECURITIES EXCHANGE ACT OF 1934
FOR THE FISCAL YEAR ENDED DECEMBER 30, 2000
OR
[ ] TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE
SECURITIES EXCHANGE ACT OF 1934
FOR THE TRANSITION PERIOD FROM ____________ TO ____________ .
COMMISSION FILE NUMBER 1-10606
------------------------
CADENCE DESIGN SYSTEMS, INC.
(EXACT NAME OF REGISTRANT AS SPECIFIED IN ITS CHARTER)
DELAWARE 77-0148231
(STATE OR OTHER JURISDICTION OF (I.R.S. EMPLOYER
INCORPORATION OR ORGANIZATION) IDENTIFICATION NO.)
2655 SEELY AVENUE, BUILDING 5, SAN JOSE, CALIFORNIA 95134
(ADDRESS OF PRINCIPAL EXECUTIVE OFFICES, INCLUDING ZIP CODE)
(408) 943-1234
(REGISTRANT'S TELEPHONE NUMBER, INCLUDING AREA CODE)
SECURITIES REGISTERED PURSUANT TO SECTION 12(B) OF THE ACT:
COMMON STOCK, $.01 PAR VALUE PER SHARE NEW YORK STOCK EXCHANGE
(TITLE OF EACH CLASS) (NAMES OF EACH EXCHANGE ON WHICH REGISTERED)
SECURITIES REGISTERED PURSUANT TO SECTION 12(g) OF THE ACT:
NONE
Indicate by check mark whether the Registrant (1) has filed all reports
required to be filed by Section 13 or 15(d) of the Securities Exchange Act of
1934 during the preceding 12 months (or for such shorter period that the
Registrant was required to file such reports), and (2) has been subject to such
filing requirements for the past 90 days. Yes [X] No [ ]
Indicate by check mark if disclosure of delinquent filers pursuant to Item
405 of Regulation S-K is not contained herein, and will not be contained, to the
best of the Registrant's knowledge, in definitive proxy or information
statements incorporated by reference in Part III of this Form 10-K or any
amendment to this Form 10-K. [ ]
Aggregate market value of the voting stock held on March 3, 2001 by
non-affiliates of the registrant: $6,081,210,144
Number of shares of common stock outstanding at March 3, 2001: 244,716,706
DOCUMENTS INCORPORATED BY REFERENCE
Portions of the definitive proxy statement for the 2001 Annual Meeting to
be held on May 16, 2001, are incorporated by reference into Part III hereof.
- --------------------------------------------------------------------------------
- --------------------------------------------------------------------------------
2
CADENCE DESIGN SYSTEMS, INC.
2000 FORM 10-K ANNUAL REPORT
TABLE OF CONTENTS
PART I
PAGE
----
Item 1. Business.................................................... 3
Item 2. Properties.................................................. 21
Item 3. Legal Proceedings........................................... 21
Item 4. Submission of Matters to a Vote of Security Holders......... 24
PART II
Item 5. Market for the Registrant's Common Equity and Related 26
Stockholder Matters.........................................
Item 6. Selected Financial Data..................................... 27
Item 7. Management's Discussion and Analysis of Financial Condition 28
and Results of Operations...................................
Item 7A. Quantitative and Qualitative Disclosures About Market 45
Risk........................................................
Item 8. Financial Statements and Supplementary Data................. 46
Item 9. Changes and Disagreements with Accountants on Accounting and 46
Financial Disclosure........................................
PART III
Item 10. Directors and Executive Officers of the Registrant.......... 47
Item 11. Executive Compensation...................................... 47
Item 12. Security Ownership of Certain Beneficial Owners and 47
Management..................................................
Item 13. Certain Relationships and Related Transactions.............. 47
PART IV
Item 14. Exhibits, Financial Statements, Schedules, and Reports on 48
Form 8-K....................................................
Signatures.................................................. 93
2
3
PART I.
ITEM 1. BUSINESS
Certain statements contained in this Annual Report on Form 10-K, including,
without limitation, statements containing the words "believes," "anticipate,"
"estimates," "expects," "intends," and words of similar import, constitute
forward-looking statements within the meaning of the Private Securities
Litigation Reform Act of 1995. Actual results could vary materially from those
expressed in these statements. Readers are referred to "Marketing and Sales,"
"Research and Development," "Competition," "Proprietary Technology,"
"Manufacturing," and "Factors That May Affect Future Results" sections contained
in this Annual Report on Form 10-K, which identify important risk factors that
could cause actual results to differ from those contained in the forward-looking
statements.
OVERVIEW
Cadence Design Systems, Inc., provides comprehensive software and other
technology and offers design and methodology services for the product
development requirements of the world's leading electronics companies. Cadence
licenses its leading-edge electronic design automation, or EDA, software and
hardware technology and provides a range of services to companies throughout the
world to help optimize their product development processes. Cadence is a
supplier of end-to-end products and services which are used by companies to
design and develop complex chips and electronic systems, including
semiconductors, computer systems and peripherals, telecommunications and
networking equipment, mobile and wireless devices, automotive electronics,
consumer products, and other advanced electronics.
Cadence was formed as a Delaware corporation as a result of the merger of
SDA Systems, Inc. into ECAD, Inc. in May 1988. Cadence's headquarters are
located at 2655 Seely Avenue, Building 5, San Jose, California 95134. Its
telephone number at that location is (408) 943-1234.
FACTORS DRIVING ELECTRONIC DESIGN AUTOMATION INDUSTRY
The worldwide electronics industry has experienced expansion driven
primarily by the communications (networking and wireless) markets. The rise in
Internet and cell phone use pressures electronics suppliers to provide equipment
that meets the ever-increasing demand for bandwidth. The advent of technologies
such as third generation cellular, wireless networking, and optical networking
are converging the Internet and the cell phone. The next step, pervasive
connection of consumer electronic devices, appears closer to becoming reality.
On the electronics production side, ever-decreasing silicon manufacturing
process geometries coupled with the move to 300mm wafer production is driving
integrated circuit, or IC, costs, volumes, and increasingly higher complexities.
These market and technology forces pose major challenges for the global
electronics design community, and consequently create significant opportunities
and challenges for EDA tools and services providers.
The electronics industry is faced with increasing complexity of electronic
devices. Design teams face two major challenges in deep submicron design and
system-on-chip, or SOC, design.
Deep submicron design refers to the design of integrated circuits that will
have feature sizes smaller than 1/2 micron. IC feature sizes for wires,
transistors, and contacts decrease with each advance in the semiconductor
manufacturing process. Each successive move to a smaller feature size (e.g.,
decreasing from .25 microns to .18 microns and smaller) requires introducing new
capabilities throughout the entire design and manufacturing flow to account for
new physical effects that emerge from the decrease in size. Deep submicron
design represents a major challenge for the entire semiconductor industry.
SOC design refers to implementing an entire electronics sub-system on a
single IC. Smaller feature sizes make it more economical to put additional
circuitry on a single die. The chips fabricated with these dies include one or
more processors (microprocessors and digital signal processors), a
high-performance bus, numerous memory devices and peripherals, custom digital
logic, custom analog logic, and millions of lines of software code. Such devices
offer huge benefits in terms of price, performance, power, and size. However,
they
3
4
are extremely difficult to design, and it is even more difficult to ensure that
they exhibit the correct behavior under all circumstances, a process known as
functional verification.
These trends pose significant new challenges for electronic design teams.
Deep submicron design requires designers to take into account many physical
effects they previously ignored. SOC design requires new approaches to managing
complexity and its related risks. The industry addresses these challenges in a
number of ways, including utilizing new EDA tools, and upgrading design
methodologies.
ELECTRONIC DESIGN
The electronic design process involves describing the behavioral,
architectural, functional, and structural attributes of an IC or electronic
system. The process is one of successive refinement where the design team adds a
level of detail to the design and verifies the results of the addition before
proceeding to add each next level of detail. Design teams begin with very
abstract behavioral models of their system and end with a physical description
of millions of transistors and their interconnections. Semiconductor foundries
use the physical description to create the masks and test programs needed to
manufacture the ICs. EDA tools aid the design team in capturing its design
intent, creating the next level of detail, and verifying the results. Problems
are often found at one level that can only be resolved by revising a previous
level of description. These iterations introduce delay and risk into the design
process.
System Level Design
Decisions made during system level design, including behavioral,
algorithmic, and architectural definition, determine a substantial majority of
an electronic system's final performance and cost. The behavioral definition
specifies which functions the system needs to perform. The algorithmic
definition is a mathematical model that describes any signal processing
necessary to condition video and audio data streams. The architectural
definition specifies the high-level structure of the design's implementation.
This includes hardware/software partitioning, a process which specifies whether
each behavioral and algorithmic function is to be implemented in hardware or
software.
Many companies are adopting a platform-based design approach to address the
complexity of SOC design. Platform-based design defines a robust, flexible
platform of pre-verified virtual components including processors, memories, and
peripherals tuned for a particular application or set of applications (e.g.,
digital video or cellular communications). Once established, design teams create
a new SOC rapidly using mostly existing virtual components and complete the
design without requiring much new circuitry or new software. This approach can
reduce time-to-market and risk dramatically, but also poses a series of new
methodology and automation challenges.
Functional Verification
The first step in digital hardware design is to create a detailed
functional specification using a hardware description language, or HDL,
generally using VERILOG(R) or VHDL(R). The functional specification does not
include physical attributes such as timing, power, and size. Both Verilog and
VHDL specify functionality at various levels of abstraction, from behavioral
(most abstract) to gate-level (most detailed). Many design teams begin with a
behavior specification, as it can be written and functionally verified quickly.
Afterwards, these teams manually rewrite the specification at the
register-transfer-level, or RTL, of abstraction, which specifies the
functionality between each of the individual storage elements, also known as
registers, within the design. Many design teams skip the behavioral design and
verification phase and begin with RTL.
To verify their designs, teams create elaborate testbenches. Testbenches
are tests that simulate the inputs a design will likely experience in its actual
application. Testbenches often include environmental models (e.g., channel
distortion effects for wireless designs), processor models running
representative software, models for other hardware in the system, and checks
that determine whether or not the design exhibits the appropriate behavior.
Teams perform functional verification by simulating their design and its
testbench, thus identifying logical errors to be corrected. Design teams can
proceed to implement the design using automated digital or custom design
techniques after extensive, error-free RTL functional verification. Any
undetected functional
4
5
error potentially requires a very expensive design change that requires
discarding any silicon manufactured to date and manufacturing new silicon with
the change. Since even the fastest software-based simulation runs many orders of
magnitude slower than the eventual silicon implementation, design teams
increasingly employ specialized hardware to increase the process speed by up to
a few orders of magnitude.
Automated Digital IC Design
Most design teams use an automated digital methodology for the majority of
their digital hardware design. Although designers write the RTL and specify the
design's physical constraints, they use tools to automatically create the
detailed implementation. Digital design flows let teams gain better
time-to-market than full-custom design, but sacrifices silicon performance,
power, and size.
The first step in a automated digital methodology (i.e., mostly automated)
is the use of a logic synthesis tool to create a gate-level version of the
design. At the gate level, the functionality between registers is elaborated to
logic gates, or standard cells. At this point the design is a network of
interconnected standard cells and hard cores, or previously implemented logic.
Both the standard cells and the cores are based on a specific manufacturing
process technology for a specific foundry. Design teams verify that the
gate-level description is functionally equivalent to the original RTL
specification to identify any potential problems that occurred during this logic
synthesis.
The next step in automated digital design is the design layout. Designers
determine where the major blocks of circuitry should be located on the physical
die to provide the lowest cost chips meeting the requisite performance
requirements. They use this floorplan to guide an automated placement and
routing tool to determine the precise location for every cell, and then connect
the cells. This step is commonly referred to as place-and-route. Since the
precise physical implementation is unknown prior to layout, it is impossible to
accurately predict the IC's physical characteristics before this stage. Rough
estimates are available at the gate level, but with deep submicron physical
effects, these estimates are not sufficiently accurate to ensure the design will
work properly in silicon. At the level of approximately 0.18 micron, logic
synthesis tools must take placement and routing into account and place-and-route
tools must be able to re-optimize the logic to converge on the design's
performance requirements.
Physical verification and analysis is the final step before release of a
design to manufacturing. Physical verification ensures that the design abides by
all of the detailed rules and parameters that the foundry specifies for its
manufacturing process. Violating a single foundry rule can result in silicon
that does not work. Physical analysis is a set of capabilities, such as
cross-talk analysis, that guard against new physical effects that are important
to consider in deep submicron design.
Custom IC (Analog and Mixed-Signal) Design
In general, it is possible to achieve considerably higher-performance,
lower-cost digital circuits by designing them directly at the layout level. This
approach is known as custom design because designers can craft every cell by
hand and every interconnection between cells. For a design with millions of
cells, this process is extremely time-consuming and risks of error are
significant. Automated custom physical design techniques considerably speed the
process by automating many common layout tasks and by making intelligent,
incremental implementation decisions the designer can accept or reject. Design
teams generally use this custom design approach for designs that are very
performance and cost-sensitive, such as microprocessors, memories, and
field-programmable gate arrays. Even in these cases, teams often use automated
digital techniques where possible.
Analog design is a form of custom design for analog circuits which requires
specialized tools and techniques. Analog designers use a "bottom-up" approach
rather than the "top-down" approach automated digital designers use. They
handcraft each analog component based on very detailed, process-specific
analysis, then repeat the process when they combine the components into an
analog circuit. Unlike digital designs, in which signals are clearly either on
or off beyond a specified threshold, the exact value of a signal is almost
always critical in analog design. Analog circuits are extremely sensitive to any
variation in the surrounding circuitry and environment (e.g., heat, power, and
electromagnetic effects). Despite these problems, design
5
6
teams are combining more and more analog and digital circuitry on the same
design, known as mixed-signal design, to take advantage of the performance,
cost, reliability, size, and power advantages inherent in mixed signal designs.
Printed Circuit Board Design and IC Packaging
Electronic systems invariably consist of one or more printed circuit
boards, or PCBs. In addition to their mechanical role, PCBs interconnect and
provide power to individual ICs. As IC performance and complexity increase,
designing the board that interconnects the ICs becomes increasingly difficult.
The challenge starts with the IC package itself. As IC input/output densities
and speeds increase, IC packages become an integral part of system-level
performance. High-speed package design is no longer just a mechanical task, but
involves precise layout, modeling, and analysis. Likewise, high-speed PCB design
involves more than layout. It requires analysis to ensure each signal reaches
its destination on time and to identify potential signal integrity problems.
CADENCE ELECTRONIC DESIGN AUTOMATION TOOLS
Cadence offers the most comprehensive set of EDA tools in its industry.
Cadence tools improve designer productivity and design quality throughout the
electronic design process.
System-level Design Tools
Cadence system-level design tools help design teams optimize their designs
and provide a smooth path to detailed hardware design. The CADENCE(R) Virtual
Component Co-design, or VCC, toolset lets designers capture and verify system
behavior independent of the hardware and software implementation. Designers can
then map the behavior to a variety of architectural implementations and analyze
the results of each. Using this rapid exploration, teams can optimize their
overall system level design including critical hardware/software partitioning.
VCC is also an ideal environment for platform-based design. For those portions
of the behavior that are algorithmic in nature, Cadence's SPW(R) toolset
provides a specialized environment for capturing and analyzing floating-point
and fixed-point algorithms. It also serves as an excellent system-level
testbench environment, especially for communications and multimedia
applications.
Functional Verification Tools
Design teams need a range of simulation and hardware-based acceleration
tools to verify the functionality of their designs. Cadence offers the
industry's most complete set of simulators and emulators for behavioral,
register-transfer-level, and gate-level functional verification. The Cadence
lineup of digital simulators includes the NC-VERILOG(R) simulator for the
VERILOG language, NC-VHDL for the VHDL language, and NC-Sim that simultaneously
supports both languages. These simulators provide designers with the simulation
performance and capacity they need to verify the functionality of today's most
complex designs.
For teams that require hardware-accelerated verification, the Cadence
Quickturn division offers the industry's most mature solutions. MERCURYPLUS(TM)
and COBALT(TM) provide FPGA-based emulation and custom processor-based
acceleration, respectively. Cadence also offers specialized kits that provide a
complete verification environment for popular applications such as 3G wireless
communication and Gigabit Ethernet networking. Most recently, Cadence introduced
the Quickturn Rapid Prototyping System, or RPS, for rapidly prototyping
platform-based designs. Each of these systems enable design teams to identify
hardware and software problems that they would otherwise not find until the
design is implemented in silicon.
Automated Digital IC Design Tools
Our unified synthesis, placement-and-routing system, or SP&R, provides a
complete implementation path from RTL through final layout for the most advanced
designs. The SP&R system consists of Physically Knowledgeable Synthesis, or PKS,
physical synthesis for front-end logic design and SILICON ENSEMBLE(R) PKS,
optimization-place-and-route for back-end physical design. PKS provides
simultaneous logic synthesis, placement, and global routing. SILICON ENSEMBLE
PKS provides a complete place-and-route environment, including the ability to
re-optimize a design's logic to meet new physical constraints. These tools
6
7
have common timing, optimization, placement, and routing engines to ensure
single-pass accuracy as the design progresses from RTL to final layout. Cadence
recently introduced power optimization, test synthesis, and datapath compilation
capabilities for automated digital design. For leading-edge physical
verification, Cadence offers the ASSURA(TM) physical verification toolset
created specifically for deep submicron designs.
Cadence also offers traditional logic synthesis with its BUILDGATES(R)
software, SILICON ENSEMBLE place-and-route software, and DRACULA(R) physical
verification tools that are highly effective for designs to about 0.25 micron.
Custom and Analog Design Tools
Cadence is the leader in custom design, analog design, and mixed-signal
design. Cadence's VIRTUOSO(R) Custom Designer, or CD, toolset is based on its
flagship VIRTUOSO custom layout tool. The VIRTUOSO CD toolset is a highly
integrated custom design environment that includes layout editing, placement,
routing, and physical verification. By automating many aspects of custom design,
designers become more productive than those using previous generation custom
layout tools. The VIRTUOSO CD toolset includes Cadence ASSURA physical
verification, which offers automated, interactive physical and batch IC layout
verification, extraction, and layout enhancements for manufacturing. The ASSURA
tools utilize patented hierarchical processing techniques to significantly
reduce verification cycle times and provide effective debugging capabilities.
Cadence also offers a complete line of analog and mixed-signal design
tools. Cadence Analog Design Environment is the industry's only complete
front-to-back analog design automation solution for full-custom analog and
digital, mixed-signal, and radio frequency, or RF, IC design. Within that
environment, designers can choose SPECTRE(R) Circuit Simulator solutions. The
SPECTRE Circuit Simulator utilizes state-of-the-art direct method circuit
simulation to provide increased speed, accuracy, and capacity over SPICE
simulators. The SPECTRE RF simulator is the first RF simulator with the speed
and capacity to handle full-chip, transistor-level circuit simulation of RF
designs with 5,000+ devices on desktop workstations. Design teams can use the
Cadence Accelerated Transistor-Level Simulator, or ATS, for full chip,
transistor-level simulation of either pure digital or mixed analog and digital
designs.
For years analog/mixed-signal design teams have been seeking to move to a
top-down approach. The Cadence AMS designer enables them to do so. It is a
mixed-signal environment and analog/mixed-signal simulator, the latter of which
is based on Cadence's popular NC-Sim and SPECTRE simulators.
Printed Circuit Board Design Tools
Cadence offers a range of tools to address the wide variety of PCB designs.
The OrCAD product line delivers personal productivity for individual engineers.
OrCAD products include capture, layout, and board-level simulation capabilities.
For teams creating state-of-the-art designs, Cadence offers software under the
ALLEGRO(R), SPECCTRA(R), and SPECCTRAQUEST(TM) brands. The ALLEGRO program is a
correct-by-design system for physical design and analysis of printed circuit
boards, multi-chip modules, hybrids, and Multiwire(TM) board designs. The
SPECCTRA product line provides placement editing, automatic shape-based routing
and a route editor. SPECCTRAQUEST software provides advanced system design and
analysis capabilities. Using SPECCTRAQUEST software, designers can explore and
make choices between timing, signal integrity, crosstalk, power delivery and
EMI, to optimize electrical performance and reliability before manufacturing.
The Cadence Advanced Packaging Ensemble provides package layout and analysis so
design teams can ensure quality interconnects between IC dies.
Third-Party Tool Support
Cadence supports the integration of third-party and in-house proprietary
tools through its ALANZA(TM) services. The ALANZA engineers work with customers,
foundries, application-specific integrated circuit, or ASIC, vendors, and other
EDA companies to ensure that Cadence tools work well in any design environment.
To date, more than 125 companies have integrated their tools with Cadence
software.
7
8
ELECTRONIC DESIGN AUTOMATION SERVICES
To complement its tools, Cadence provides a range of EDA services that keep
electronic design teams as productive as possible. These include educational
services, support services, design services, and methodology services. The
company's educational services include Internet, classroom, and custom courses
that teach everything from how to use the most recent tool features to the
latest design techniques. Support services include product maintenance and
updates, and telephone and Internet-based technical support. Cadence also offers
custom support services, which may include one or more of its standard support
services plus account technical management, application and educational
services, and metrics reporting. Maintenance and support agreements are offered
to customers either as part of our product license agreement or under a separate
maintenance agreement.
Design Services (Tality)
On July 17, 2000, Cadence announced its plan to separate its electronics
design services group into a new company named Tality Corporation, or Tality.
Tality's separation from Cadence was substantially completed on October 4, 2000,
and accordingly the electronic design services business now operates as a
majority-owned subsidiary of Cadence. Tality filed a registration statement with
the Securities and Exchange Commission for Tality's initial public offering, or
IPO. On October 9, 2000, Cadence announced the postponement of Tality's IPO due
to unfavorable market conditions. Therefore, the financial statements and
financial information in this Annual Report on Form 10-K do not give effect to
the IPO.
Tality is a leading global provider of engineering services for the design
of complex electronic systems and integrated circuits. Tality focuses its
offerings primarily on the growing communications market. Targeted segments of
this market include wireline and wireless communications infrastructure,
high-speed data access equipment and consumer communication products. Tality
provides engineering services that extend from product concept through
manufacturing to help communications companies realize their product visions.
- Concept
Tality assists clients in refining a product concept and mapping
technology options.
- Specification
Tality maps its clients' product concept into technology, partitions it
into software and hardware, and defines how each component will operate.
- Implementation
Tality physically implements specifications into advanced integrated
circuits, complex printed circuit boards and complete systems.
- Prototype
Tality works with third-party manufacturers to develop and deliver
product prototypes for testing to identify and resolve remaining design
issues.
- Manufacturing support
Tality assists clients through the process of moving to volume
manufacturing.
Tality has over 1,000 engineers located at 14 design sites in the United
States, Canada, the United Kingdom, and India. Since the beginning of 1998,
Tality has completed over 500 design projects. Its clients include both leading
and emerging electronic systems companies and integrated circuit manufacturers.
Tality's design solutions enable customers to address the pressures of
increasing business and technological complexity, growing competition, resource
constraints and the need to decrease time-to-market. Its engineering team has
expertise in targeted segments of the communications market. Tality also has
experience in systems design, embedded software and firmware design, printed
circuit board and chip-level design and full systems integration. In addition,
through its internal research and development efforts and its design projects,
Tality has accumulated a growing portfolio of intellectual property that it may
offer customers as part of its
8
9
electronics design services. To every design engagement, Tality brings an
established design infrastructure comprised of the design automation tools,
computing infrastructure and laboratory environments necessary for the
development of clients' products. Tality also assists customers by providing
project management services to address the growing complexities of the design
phase of product development and offers assistance in the management of clients'
supply chains through the application of its in-depth knowledge of and
experience in technical and business management processes.
Methodology Services
Cadence's methodology services group offers a variety of services to help
customers address electronic design challenges. It leverages Cadence's
cumulative experience and knowledge of industry best practices to improve design
productivity.
MARKETING AND SALES
Cadence generally uses a direct sales force consisting of sales people and
applications engineers to license its products and market its consulting and
design services to prospective customers. Applications engineers provide
technical pre-sales as well as post-sales support for software products. The
Cadence Methodology Services group provides on-site capabilities to help
customers improve productivity with Cadence and other EDA products. Tality
offers complete design services to its customers. Due to the complexity of EDA
products and the electronic design process in general, the sales cycle is
generally long (three to six months or more). During the sales cycle, the
Cadence direct sales force generally provides technical presentations, product
demonstrations, and on-site customer evaluations of Cadence software. Cadence
also uses traditional marketing approaches to promote its products and services,
including advertising, direct mail, telemarketing, trade shows, public
relations, and the Internet.
Cadence markets and supports its products and services internationally
(except in Japan) through its subsidiaries and various distributors. Cadence
markets its consulting and design services in Japan through a wholly-owned
subsidiary. Since the reorganization of Cadence's distribution channel in Japan
in 1997, Cadence has licensed its products through Innotech Corporation, in
which Cadence is an approximately 15% stockholder as of December 30, 2000.
A summary of Cadence's net revenue and long-lived assets by geographic area
is set forth in the "Segment Reporting" note to the Consolidated Financial
Statements, which information is incorporated herein by reference. Prices for
international customers are quoted in a local currency from an international
price list. The list is prepared based on the U.S. dollar price list but
reflects the higher cost of doing business outside the United States.
International customers are invoiced in the local currency or U.S. dollars using
current exchange rates.
Cadence expects that revenue from its international operations will
continue to account for a significant portion of its total revenue.
Exposure to foreign currency transaction risk can arise when transactions
are conducted in a currency different from the functional currency of a Cadence
subsidiary. Cadence uses foreign currency forward exchange contracts and
purchases foreign currency put options to help protect against currency exchange
risks. Although Cadence attempts to reduce the impact of foreign currency
fluctuations, significant exchange rate movements may hurt Cadence's results of
operations as expressed in U.S. dollars. Exchange rate gains and losses on the
translation into U.S. dollars of amounts denominated in foreign currencies are
included as a separate component of stockholders' equity and reflected losses of
$4.7 million in 2000, $2.5 million in 1999, and $1.4 million in 1998.
On January 1, 1999, 11 member countries of the European Union adopted the
euro as their common legal currency and established fixed conversion rates
between their sovereign currencies and the euro. Transactions can be made in
either the sovereign currencies or the euro until January 1, 2002, when the euro
must be used exclusively. Currently, only electronic transactions may be
conducted using the euro. Cadence is in the process of upgrading its internal
systems and believes that its financial institution vendors are capable of
handling the
9
10
euro conversion and Cadence is in the process of examining current marketing and
pricing policies and strategies that may be affected by conversion to the euro.
The cost of this effort is not expected to materially harm Cadence's results of
operations or financial condition. However, Cadence cannot assure you that all
issues related to the euro conversion have been identified and that any
additional issues would not materially harm Cadence's results of operations or
financial condition. For example, the conversion to the euro may have
competitive implications on Cadence's pricing and marketing strategies and
Cadence may be at risk to the extent its principal European suppliers and
customers are unable to deal effectively with the impact of the euro conversion.
Cadence has not yet completed its evaluation of the impact of the euro
conversion on its functional currency designations.
Cadence's international operations may also be subject to other risks,
including:
- The adoption and expansion of government trade restrictions;
- Limitations on repatriation of earnings;
- Reduced protection of intellectual property rights in some countries;
- Recessions in foreign economies;
- Longer receivables collection periods and greater difficulty in
collecting accounts receivable;
- Difficulties in managing foreign operations;
- Political and economic instability;
- Unexpected changes in regulatory requirements;
- Tariffs and other trade barriers; and
- U.S. government licensing requirements for export, as licenses can be
difficult to obtain.
RESEARCH AND DEVELOPMENT
Cadence's investment in research and development was $292.4 million in
2000, $244.9 million in 1999, and $224.5 million in 1998, prior to capitalizing
software development costs of $28.4 million, $25.7 million, and $21.7 million,
respectively. See "Notes to Consolidated Financial Statements" for a more
complete description of Cadence's capitalization of certain software development
costs.
The primary areas of research include SOC design, the design of silicon
devices in the deep submicron range, high-speed board design,
architectural-level design, high-performance logic verification technology, and
hardware/software co-design. The industries in which Cadence competes experience
rapid technology developments, changes in industry standards, changes in
customer requirements, and frequent new product introductions and improvements.
If Cadence is unable to respond quickly and successfully to these developments
and changes, Cadence may lose its competitive position and its products or
technologies may become non-competitive or obsolete, in which case, revenues
would be materially and adversely affected. In order to compete successfully,
Cadence must develop or acquire new products and improve its existing products
and processes on a schedule that keeps pace with technological developments in
its industries. Cadence must also be able to support a range of changing
computer software, hardware platforms, and customer preferences. There is no
guarantee that Cadence will be successful in this respect.
Cadence's advanced research and development group, Cadence Laboratories, is
committed to new technological development. This group is chartered with
identifying and developing prototype technologies in emerging design areas that
will offer substantially improved alternatives to current EDA solutions.
COMPETITION
The electronic design automation product market and the commercial
electronic design and methodology services industries are highly competitive. If
Cadence is unable to compete successfully in these industries, it could
seriously harm Cadence's business, operating results, and financial condition.
To compete in these
10
11
industries, Cadence must identify and develop innovative and cost-competitive
EDA products and market them in a timely manner. It must also gain industry
acceptance for its design and methodology services and offer better strategic
concepts, technical solutions, prices and response time, or a combination of
these benefits, than those of other design companies and the internal design
departments of electronics manufacturers. Cadence cannot assure you that it will
be able to compete successfully in these industries. Factors that could affect
Cadence's ability to succeed include:
- The development of competitive EDA products and design and methodology
services could result in a shift of customer preferences away from
Cadence's products and services and significantly decrease revenue;
- The electronics design and methodology services industries are relatively
new and electronics design companies and manufacturers are only beginning
to purchase these services from outside vendors;
- The pace of technology change demands continuous technological
development to meet the requirements of next-generation design
challenges; and
- There are a significant number of current and potential competitors in
the EDA industry and the cost of entry is low.
In the EDA products industry, Cadence currently competes with three large
companies, Avant! Corporation, Mentor Graphics Corporation, and Synopsys, Inc.,
and numerous smaller companies. Cadence also competes with manufacturers of
electronic devices that have developed or have the capability to internally
develop their own EDA products. In the electronics design and methodology
services industries, Cadence competes with numerous electronic design and
consulting companies as well as with the internal design capabilities of
electronics manufacturers. Many manufacturers of electronic devices may be
reluctant to purchase services from independent vendors such as Cadence because
they wish to promote their own internal design departments. Electronics
companies and management consulting firms continue to enter the electronics
design and methodology services industries.
PROPRIETARY TECHNOLOGY
Cadence's success depends, in part, upon its proprietary technology. Many
Cadence products include software or other intellectual property licensed from
third parties. Cadence generally relies on patents, copyrights, trademarks, and
trade secret laws to establish and protect its proprietary rights in technology
and products. Despite precautions Cadence may take to protect its intellectual
property, Cadence cannot assure you that third parties will not try to
challenge, invalidate or circumvent these patents. Cadence also cannot assure
you that the rights granted under its patents will provide it with any
competitive advantages, patents will be issued on any of its pending
applications, or future patents will be sufficiently broad to protect Cadence's
technology. Furthermore, the laws of foreign countries may not protect Cadence's
proprietary rights in those countries to the same extent as U.S. law protects
these rights in the U.S. Cadence may have to seek new or renew existing licenses
for this software and other intellectual property in the future. The Cadence
design services business also requires it to license the software or other
intellectual property of third parties. Cadence's failure to obtain for its use
software or other intellectual property licenses or other intellectual property
rights on favorable terms, or the need to engage in litigation over these
licenses or rights, could seriously harm Cadence's business, operating results,
and financial condition.
Cadence cannot assure you that its reliance on licenses from or to third
parties, or patent, copyright, trademark, and trade secret protection, will be
enough to be successful and profitable in the industries in which Cadence
competes. There are numerous patents in the EDA industry and new patents are
being issued at a rapid rate. It is not always economically practicable to
determine in advance whether a product or any of its components infringes the
patent rights of others. As a result, Cadence may be forced to respond to or
prosecute intellectual property infringement claims to protect its rights or
defend a customer's rights. These claims, regardless of merit, could consume
valuable management time, result in costly litigation, or cause product shipment
delays, all of which could seriously harm Cadence's business, operating results,
and financial condition. In settling these claims, Cadence may be required to
enter into royalty or licensing agreements with
11
12
the third parties claiming infringement. These royalty or licensing agreements,
if available, may not have terms acceptable to Cadence. Being forced to enter
into a license agreement with unfavorable terms could seriously harm Cadence's
business, operating results, and financial condition.
MANUFACTURING
Cadence software production operations consist of configuring the proper
version of a product, outsourcing the recording of the product on magnetic tape
or CD-ROM, and producing customer-unique access keys allowing customers to use
licensed products. User manuals and other documentation are generally available
on CD-ROM, but are occasionally supplied in hard copy format. Software and
documentation are also made available to selected customers by electronic
distribution over the Internet.
Cadence performs final assembly and test of its emulation products in San
Jose, California. Subcontractors manufacture all major subassemblies, including
all individual printed circuit boards and custom integrated circuits, and supply
them to Cadence for qualification and testing prior to their incorporation into
the assembled product.
Cadence has generally been able to obtain adequate manufacturing supplies
in a timely manner from existing sources or, where necessary, from alternative
sources of supply. However, a reduction or interruption in supply or a
significant increase in the price of one or more components would adversely
affect Cadence's business, operating results, and financial condition and could
damage customer relationships.
EMPLOYEES
As of February 28, 2001, Cadence employed approximately 5,650 persons, with
approximately 3,250 in sales, services, marketing, support and manufacturing
activities, 1,600 in product development and 800 in management, administration
and finance. None of Cadence's employees is represented by a labor union, and
Cadence has experienced no work stoppages. Cadence believes that its employee
relations are good.
FACTORS THAT MAY AFFECT FUTURE RESULTS
The following risk factors and other information included in this Annual
Report on Form 10-K should be carefully considered. The risks and uncertainties
described below are not the only ones Cadence faces. Additional risks and
uncertainties not currently known to Cadence or that Cadence currently deems
immaterial also may impair Cadence's business operations. If any of the
following risks actually occurs, Cadence's business, operating results, and
financial condition could be materially harmed. The risk factors affecting
Tality Corporation which is, and immediately after its initial public offering
will remain, a subsidiary of Cadence, are described in detail in the
Registration Statement on Form S-1 filed by Tality Corporation with the
Securities and Exchange Commission on July 17, 2000, as amended. Unless
specifically noted, references to Cadence in the discussion below are references
to Cadence and its subsidiaries, including Tality Corporation and its
subsidiaries.
CADENCE IS SUBJECT TO THE CYCLICAL NATURE OF THE INTEGRATED CIRCUIT INDUSTRY AND
THE ELECTRONICS SYSTEMS INDUSTRY,
AND THE CURRENT DOWNTURN OR ANY FUTURE DOWNTURNS MAY REDUCE OUR REVENUE
Purchases of our products and services are highly dependent upon the
commencement of new design projects by integrated circuit manufacturers and
electronics systems companies. The integrated circuit industry is highly
cyclical and is characterized by constant and rapid technological change, rapid
product obsolescence and price erosion, evolving standards, short product life
cycles, and wide fluctuations in product supply and demand. The integrated
circuit and electronics systems industries have experienced significant
downturns, often connected with, or in anticipation of, maturing product cycles
of both these companies' and their customers' products and a decline in general
economic conditions. These downturns have been characterized by diminished
product demand, production over capacity, high inventory levels and accelerated
erosion of average selling prices. During these downturns, the number of new
design projects may decrease. Certain integrated circuit manufacturers and
electronics systems companies have recently announced a
12
13
slowdown of demand and production. The current slowdown and any future downturns
may reduce our revenue and harm our results of operations.
CADENCE HAS REORGANIZED ITS DESIGN SERVICES GROUP AS A SEPARATE COMPANY, WHICH
MAY IMPACT ITS FINANCIAL
RESULTS
Since 1995, Cadence has operated an internal electronics design services
group. On July 17, 2000, Cadence announced its plan to separate its design
services group into a separate company focused on providing design solutions and
proprietary technology to electronics product companies and integrated circuit
manufacturers, and announced the planned initial public offering of the separate
company. The separation was substantially completed on October 4, 2000. On
October 9, 2000, Cadence announced that it had postponed Tality's initial public
offering due to unfavorable market conditions. Upon completion of the planned
initial public offering of Tality, Cadence expects that it will hold
approximately 80% of the voting power of Tality. While Cadence does not
currently plan to distribute to Cadence stockholders its equity interests in
Tality Corporation or Tality's subsidiaries, it will have the right at any time
to sell some or all of these equity interests. Cadence has agreed with the
underwriters not to transfer its equity interests in Tality Corporation and
limited partnership units in Tality, LP for 180 days after the date of the
initial public offering of Tality Corporation, except with the prior written
consent of Goldman, Sachs & Co. After the expiration of this 180-day period,
Cadence will no longer be restricted from transferring any of its common stock
of Tality Corporation or limited partnership units in Tality, LP to the public
or its stockholders. Cadence currently expects that the principal factors that
it would consider in determining whether and when to exchange, convert, sell or
distribute to its stockholders any of its shares or partnership units include:
- The relative market prices of Tality's common stock and Cadence's common
stock;
- The ability of an affiliate of Tality to make sales under Rule 144 of the
Securities Act of 1933 or under an effective registration statement
covering Cadence's shares of Tality's common stock;
- The absence of any court order or other regulation prohibiting or
restricting such sales; and
- Other conditions affecting Tality's business or Cadence's other
businesses.
CADENCE HAS AGREED TO GRANT CERTAIN RIGHTS AND PROVIDE CERTAIN SERVICES TO
TALITY ON TERMS THAT ARE MORE
FAVORABLE TO TALITY THAN TERMS THAT WOULD BE OFFERED TO AN UNRELATED PARTY
In connection with the separation of Tality, Cadence entered into a number
of agreements governing its business relationships with Tality and Cadence's
provision of certain services to Tality, including provision of certain
facilities, and accounting, finance, legal, human resources, and other
administrative services, on terms that are more favorable to Tality than terms
that would be offered to an unrelated entity. As a result, Cadence is obligated
to provide certain services to Tality for the periods defined in the various
agreements, some of which have long or unspecified terms, which may impact our
financial results.
CADENCE HAS HISTORICALLY SUFFERED LOSSES IN ITS ELECTRONICS DESIGN AND
METHODOLOGY SERVICES BUSINESS
The market for electronics design and methodology services is relatively
new and rapidly evolving. Cadence's expenses of the design services business
increased substantially in connection with the completion of Tality's separation
from Cadence and its expenses may continue to increase as it seeks to expand its
business. The rate of growth of Tality's revenue over prior periods may not
continue or increase at all, and its separation and expansion may prove more
expensive than Cadence anticipates. If Tality fails to increase its revenue to
offset its expenses, Tality will continue to experience losses. Cadence's or
Tality's failure to succeed in these services businesses may seriously harm
Cadence's business, operating results, and financial condition.
13
14
THE SUCCESS OF CADENCE'S ELECTRONIC DESIGN AND METHODOLOGY SERVICES BUSINESSES
DEPEND ON MANY FACTORS THAT ARE BEYOND ITS CONTROL
In order to be successful with its electronics design and methodology
services, Cadence must overcome several factors that are beyond its control,
including the following:
- Cadence's cost of services personnel is high and reduces gross
margin. Gross margin represents the difference between the amount of
revenue from the sale of services and Cadence's cost of providing those
services. Cadence must pay high salaries to attract and retain
professional services personnel. This results in a lower gross margin
than the gross margin in Cadence's software business. In addition, the
high cost of training new services personnel or not fully utilizing these
personnel can significantly lower gross margin.
- A substantial portion of these services contracts are fixed-price
contracts. This means that the customer pays a fixed price that has been
agreed upon ahead of time, no matter how much time or how many resources
Cadence must devote to perform the contract. If Cadence's cost in
performing the services consistently and significantly exceeds the amount
the customer has agreed to pay, it could seriously harm Cadence's
business, operating results, and financial condition.
CADENCE'S FAILURE TO RESPOND QUICKLY TO TECHNOLOGICAL DEVELOPMENTS COULD MAKE
ITS PRODUCTS UNCOMPETITIVE AND OBSOLETE
The industries in which Cadence competes experience rapid technology
developments, changes in industry standards, changes in customer requirements
and frequent new product introductions and improvements. Currently, the
electronic chip design industry is experiencing several revolutionary trends:
- The size of features such as wires, transistors, and contacts on chips is
shrinking due to advances in semiconductor manufacturing processes.
Process feature sizes refer to the width of the transistors and the width
and spacing of the interconnect on the chip. Feature size is normally
identified by the headline transistor length, which is shrinking from
0.35 microns to 0.18 microns and smaller. This is commonly referred to in
the semiconductor industry as the migration to deep submicron and it
represents a major challenge for all levels of the semiconductor industry
from chip design and design automation to design of manufacturing
equipment and the manufacturing process itself. Shrinkage of transistor
length to such infinitesimal proportions (for reference, the diameter of
the period at the end of this sentence is approximately 400 microns) is
challenging fundamental laws of physics and chemistry.
- The ability to design very large chips, in particular integration of
entire electronic systems onto a single chip instead of a circuit board
(a process that is referred to in the industry as "SOC"), increases the
complexity of managing a design that at the lowest level is represented
by billions of shapes on the fabrication mask. In addition, systems
typically incorporate microprocessors and digital signal processors that
are programmed with software, requiring simultaneous design of the
silicon chip and the related embedded software on the chip.
If Cadence is unable to respond quickly and successfully to these
developments and changes, Cadence may lose its competitive position and its
products or technologies may become uncompetitive or obsolete. In order to
compete successfully, Cadence must develop or acquire new products and improve
its existing products and processes on a schedule that keeps pace with
technological developments in its industries. Cadence must also be able to
support a range of changing computer software, hardware platforms and customer
preferences. There is no guarantee that Cadence will be successful in this
regard.
CADENCE'S FAILURE TO OBTAIN SOFTWARE OR OTHER INTELLECTUAL PROPERTY LICENSES OR
ADEQUATELY PROTECT ITS PROPRIETARY RIGHTS COULD SERIOUSLY HARM ITS BUSINESS
Cadence's success depends, in part, upon its proprietary technology. Many
of Cadence's products include software or other intellectual property licensed
from third parties, and Cadence may have to seek new or renew existing licenses
for this software and other intellectual property in the future. Cadence's
design services
14
15
business also requires it to license software or other intellectual
property of third parties. Cadence's failure to obtain for its use software or
other intellectual property licenses or other intellectual property rights on
favorable terms, or the need to engage in litigation over these licenses or
rights, could seriously harm Cadence's business, operating results, and
financial condition.
Also, Cadence generally relies on patents, copyrights, trademarks and trade
secret laws to establish and protect its proprietary rights in technology and
products. Despite precautions Cadence may take to protect its intellectual
property, Cadence cannot assure you that third parties will not try to
challenge, invalidate, or circumvent these patents. Cadence also cannot assure
you that the rights granted under its patents will provide it with any
competitive advantages, patents will be issued on any of its pending
applications, or future patents will be sufficiently broad to protect Cadence's
technology. Furthermore, the laws of foreign countries may not protect Cadence's
proprietary rights in those countries to the same extent as U.S. law protects
these rights in the U.S.
Cadence cannot assure you that its reliance on licenses from or to third
parties, or that patent, copyright, trademark, and trade secret protections,
will be enough to be successful and profitable in the industries in which
Cadence competes.
INTELLECTUAL PROPERTY INFRINGEMENT BY OR AGAINST CADENCE COULD SERIOUSLY HARM
ITS BUSINESS
There are numerous patents in the EDA industry and new patents are being
issued at a rapid rate. It is not always economically practicable to determine
in advance whether a product or any of its components infringes the patent
rights of others. As a result, from time to time, Cadence may be forced to
respond to or prosecute intellectual property infringement claims to protect its
rights or defend a customer's rights. These claims, regardless of merit, could
consume valuable management time, result in costly litigation, or cause product
shipment delays, all of which could seriously harm Cadence's business, operating
results, and financial condition. In settling these claims, Cadence may be
required to enter into royalty or licensing agreements with the third parties
claiming infringement. These royalty or licensing agreements, if available, may
not have terms acceptable to Cadence. Being forced to enter into a license
agreement with unfavorable terms could seriously harm Cadence's business,
operating results, and financial condition. Any potential intellectual property
litigation could force us to do one or more of the following:
- Pay damages to the party claiming infringement;
- Stop licensing, or providing services that use, the challenged
intellectual property;
- Obtain a license from the owner of the infringed intellectual property to
sell or use the relevant technology, which license may not be available
on reasonable terms, or at all; or
- Redesign the challenged technology, which could be time-consuming and
costly.
If we were forced to take any of these actions, our business and results of
operations may be harmed.
CADENCE OBTAINS KEY COMPONENTS FOR ITS HARDWARE PRODUCTS FROM A LIMITED NUMBER
OF SUPPLIERS
Cadence depends on several suppliers for certain key components and board
assemblies used in its hardware-based verification products. Cadence's inability
to develop alternative sources or to obtain sufficient quantities of these
components or board assemblies could result in delays or reductions in product
shipments. In particular, Cadence currently relies on Taiwan Semiconductor
Manufacturing Corporation for the supply of key integrated circuits and on IBM
for the hardware components for both Cadence's COBALT(TM) product and
MERCURYPLUS(TM). Other disruptions in supply may also occur. If there were such
a reduction or interruption, Cadence's results of operations would be seriously
harmed. Even if Cadence can eventually obtain these components from alternative
sources, a significant delay in Cadence's ability to deliver products would
result.
15
16
FLUCTUATIONS IN QUARTERLY RESULTS OF OPERATIONS COULD HURT CADENCE'S BUSINESS
AND THE MARKET PRICE OF ITS STOCK
Cadence has experienced, and may continue to experience, varied quarterly
operating results. Various factors affect Cadence's quarterly operating results
and some of them are not within Cadence's control, including the mix of products
and services sold, the mix of licenses used to sell products and the timing of
significant orders for its software products and services by customers.
Quarterly operating results are affected by the mix of products and services
sold because there are significant differences in margins from the sale of
hardware and software products and services. For example, based on a three-year
average in 1999, Cadence had realized gross margins on software product sales of
approximately 87% but realized gross margins of approximately 64% on hardware
product sales and 30% on its performance of services. In 2000, realized gross
margins decreased to approximately 78% for software products, remained flat at
64% for hardware products and increased to approximately 31% for services. In
addition, Cadence's quarterly operating results are affected by the mix of
licenses entered into in connection with the sale of software products. Cadence
has three basic licensing models: perpetual, fixed-term, and subscription.
Perpetual and fixed-term licenses recognize a larger portion of the revenue at
the beginning of the license period and subscription licenses recognize revenue
ratably over each quarter of the term of the license. As Cadence customers
purchase more software products pursuant to subscription agreements, future
operating results may be lower than that of comparable quarters in which
perpetual and fixed-term licenses were in greater use for software product
transactions. Finally, Cadence's quarterly operating results are affected by the
timing of significant orders for its software products because a significant
number of contracts for software products are in excess of $5 million. The
failure to close a contract for the sale of one or more orders of Cadence's
software products could seriously harm its quarterly operating results.
Sales of Cadence's hardware products depend, in significant part, upon the
decision of the prospective customer to commence a project for the design and
development of complex computer chips and systems. These projects often require
significant commitments of time and capital. Cadence's hardware sales may be
delayed if customers delay commencement of projects. Lengthy hardware sales
cycles subject Cadence to a number of significant risks over which Cadence has
little or no control, including insufficient, excess or obsolescent inventory,
variations in inventory valuation and fluctuations in quarterly operating
results.
In addition, Cadence bases its expense budgets partially on its
expectations of future revenue. However, it is difficult to predict revenue
levels or growth. Revenue levels that are below Cadence's expectations could
seriously hurt Cadence's business, operating results, and financial condition.
If revenue or operating results fall short of the levels expected by public
market analysts and investors, the trading price of Cadence common stock could
decline dramatically. Also, because of the timing of large orders and its
customers' buying patterns, Cadence may not learn of revenue shortfalls,
earnings shortfalls or other failures to meet market expectations until late in
a fiscal quarter, which could cause even more immediate and serious harm to the
trading price of Cadence common stock.
Cadence believes that quarter-to-quarter comparisons of the results of
operations of its services business segments may not be meaningful. Therefore,
stockholders should not view Cadence's historical results of operations as
reliable indicators of its future performance. In addition, many of our services
engagements are terminable with little or no advance notice and without penalty.
Since a significant portion of our costs is fixed, we may not be able to reduce
our costs in a timely manner in connection with the unanticipated revenue loss
when one or more projects is terminated.
THE LENGTHY SALES CYCLE OF CADENCE'S PRODUCTS AND SERVICES MAKES THE TIMING OF
ITS REVENUE DIFFICULT TO PREDICT AND MAY CAUSE ITS OPERATING RESULTS TO
FLUCTUATE UNEXPECTEDLY
Cadence has a lengthy sales cycle that generally extends at least three to
six months. The length of our sales cycle may cause our revenue and operating
results to vary unexpectedly from quarter to quarter. The complexity and expense
associated with our business generally requires a lengthy customer education and
approval process. Consequently, we may incur substantial expenses and devote
significant management effort and expense to develop potential relationships
that do not result in agreements or revenue and may prevent us from pursuing
other opportunities.
16
17
In addition, sales of our products and services may be delayed if customers
delay approval or commencement of projects because of:
- Customers' budgetary constraints and internal acceptance review
procedures;
- The timing of customers' budget cycles; and
- The timing of customers' competitive evaluation processes.
If customers experience delays in their approval or project commencement
activities, we may not learn of, and therefore be able to communicate to the
public, revenue or earnings shortfalls until late in a fiscal quarter.
CADENCE EXPECTS TO ACQUIRE OTHER COMPANIES AND MAY NOT SUCCESSFULLY INTEGRATE
THEM OR THE COMPANIES IT HAS RECENTLY ACQUIRED
Cadence has acquired other businesses before and is likely to do so again.
While Cadence expects to analyze carefully all potential transactions before
committing to them, Cadence cannot assure you that any transaction that is
completed will result in long-term benefits to Cadence or its stockholders, or
that Cadence's management will be able to manage the acquired businesses
effectively. In addition, growth through acquisition involves a number of risks.
If any of the following events occurs after Cadence acquires another business,
it could seriously harm Cadence's business, operating results, and financial
condition:
- Difficulties in combining previously separate businesses into a single
unit;
- The substantial diversion of management's attention from day-to-day
business when negotiating these transactions and then integrating an
acquired business;
- The discovery after the acquisition has been completed of liabilities
assumed from the acquired business;
- The failure to realize anticipated benefits such as cost savings and
revenue enhancements;
- The failure to retain key personnel of the acquired business;
- Difficulties related to assimilating the products of an acquired business
in, for example, distribution, engineering, and customer support areas;
- Unanticipated costs;
- Adverse effects on existing relationships with suppliers and customers;
and
- Failure to understand and compete effectively in markets in which we have
limited previous experience.
CADENCE'S INTERNATIONAL OPERATIONS MAY SERIOUSLY HARM ITS FINANCIAL CONDITION
BECAUSE OF SEVERAL WEAK FOREIGN ECONOMIES AND THE EFFECT OF FOREIGN
EXCHANGE RATE FLUCTUATIONS
Cadence has significant operations outside the United States. Cadence's
revenue from international operations as a percentage of total revenue was
approximately 44% for fiscal 2000 and 52% for fiscal 1999. Cadence also
transacts business in various foreign currencies. Recent economic uncertainty
and the volatility of foreign currencies in certain parts of the Asia-Pacific
region, has had, and may continue to have, a seriously harmful effect on
Cadence's revenue and operating results.
Fluctuations in the rate of exchange between the U.S. dollar and the
currencies of countries other than the U.S. in which Cadence conducts business
could seriously harm its business, operating results, and financial condition.
For example, if there is an increase in the rate at which a foreign currency
exchanges into U.S. dollars, it will take more of the foreign currency to equal
a specified amount of U.S. dollars than before the rate increase. If Cadence
prices its products and services in the foreign currency, it will receive less
in U.S. dollars than it did before the rate increase went into effect. If
Cadence prices its products and services in U.S. dollars, an increase in the
exchange rate will result in an increase in the price for Cadence's products and
services compared to those products of its competitors that are priced in local
currency. This could result in
17
18
Cadence's prices being uncompetitive in markets where business is transacted in
the local currency. Cadence's international operations may also be subject to
other risks, including:
- The adoption and expansion of government trade restrictions;
- Volatile foreign exchange rates and currency conversion risks;
- Limitations on repatriation of earnings;
- Reduced protection of intellectual property rights in some countries;
- Recessions in foreign economies;
- Longer receivables collection periods and greater difficulty in
collecting accounts receivable;
- Difficulties in managing foreign operations;
- Political and economic instability;
- Unexpected changes in regulatory requirements;
- Tariffs and other trade barriers; and
- U.S. government licensing requirements for export which make licenses
difficult to obtain.
Cadence expects that revenue from its international operations will
continue to account for a significant portion of its total revenue.
Exposure to foreign currency transaction risk can arise when transactions
are conducted in a currency different from the functional currency of a Cadence
subsidiary. A subsidiary's functional currency is the currency in which it
primarily conducts its operations, including product pricing, expenses and
borrowings. Cadence uses foreign currency forward exchange contracts and
purchases foreign currency put options to help protect against currency exchange
risks. These forward contracts and put options allow Cadence to buy or sell
specific foreign currencies at specific prices on specific dates. Increases or
decreases in the value of Cadence's foreign currency transactions are partially
offset by gains and losses on these forward contracts and put options. Although
Cadence attempts to reduce the impact of foreign currency fluctuations,
significant exchange rate movements may hurt Cadence's results of operations as
expressed in U.S. dollars.
Foreign currency exchange risk occurs for some of Cadence's foreign
operations whose functional currency is the local currency. The primary effect
of foreign currency translation on Cadence's results of operations is a
reduction in revenue from a strengthening U.S. dollar, offset by a smaller
reduction in expenses. Exchange rate gains and losses on the translation into
U.S. dollars of amounts denominated in foreign currencies are included as a
separate component of stockholders' equity.
FAILURE TO OBTAIN EXPORT LICENSES COULD HARM CADENCE'S BUSINESS
Cadence must comply with U.S. Department of Commerce regulations in
shipping its software products and other technologies outside the U.S. Although
Cadence has not had any significant difficulty complying with these regulations
so far, any significant future difficulty in complying could harm Cadence's
business, operating results, and financial condition.
CADENCE'S INABILITY TO COMPETE IN ITS INDUSTRIES COULD SERIOUSLY HARM ITS
BUSINESS
The EDA market and the commercial electronics design and methodology
services industries are highly competitive. If Cadence is unable to compete
successfully in these industries, it could seriously harm Cadence's business,
operating results, and financial condition. To compete in these industries,
Cadence must identify and develop innovative and cost competitive electronic
design automation software products and market them in a timely manner. It must
also gain industry acceptance for its design and methodology services and offer
better strategic concepts, technical solutions, prices and response time, or a
combination of these factors, than those of other design companies and the
internal design departments of electronics manufactur-
18
19
ers. Cadence cannot assure you that it will be able to compete successfully in
these industries. Factors that could affect Cadence's ability to succeed
include:
- The development of competitive EDA products and design and methodology
services could result in a shift of customer preferences away from
Cadence's products and services and significantly decrease revenue;
- The electronics design and methodology services industries are relatively
new and electronics design companies and manufacturers are only beginning
to purchase these services from outside vendors;
- The pace of the technology change demands continuous technological
development to meet the requirements of next-generation design
challenges; and
- There are a significant number of current and potential competitors in
the EDA industry and the cost of entry is low.
In the EDA products industry, Cadence currently competes with three large
companies, Avant! Corporation, Mentor Graphics Corporation, and Synopsys, Inc.,
and numerous smaller companies. Cadence also competes with manufacturers of
electronic devices that have developed or have the capability to develop their
own EDA products. Many manufacturers of electronic devices may be reluctant to
purchase services from independent vendors such as Cadence because they wish to
promote their own internal design departments. In the electronics design and
methodology services industries, Cadence competes with numerous electronic
design and consulting companies as well as with the internal design capabilities
of electronics manufacturers. Other electronics companies and management
consulting firms continue to enter the electronic design and methodology
services industries.
CADENCE'S FAILURE TO ATTRACT, TRAIN, MOTIVATE, AND RETAIN KEY EMPLOYEES MAY HARM
ITS BUSINESS
Competition for highly skilled employees is very intense. Cadence's
business depends on the efforts and abilities of its senior management, its
research and development staff, and a number of other key management, sales,
support, technical, and services personnel. The high cost of training new
personnel, not fully utilizing these personnel, or losing trained personnel to
competing employers could reduce our gross margins and harm our business and
operating results. Competition for these personnel is intense, particularly in
geographic areas recognized as high technology centers such as the Silicon
Valley area, where our principal offices are located, and the other locations
where we maintain large facilities. To attract and retain individuals with the
requisite expertise, we may be required to grant large numbers of stock options
or other stock-based incentive awards, which may be dilutive to existing
stockholders. We may also be required to pay significant base salaries and cash
bonuses, which could harm our operating results. If we do not succeed in hiring
and retaining candidates with appropriate qualifications, we will not be able to
grow our business and our operating results will suffer. Cadence's failure to
attract, train, motivate, and retain key employees would impair its development
of new products, its ability to provide design and methodology services and the
management of its businesses. This would seriously harm Cadence's business,
operating results, and financial condition.
IF CADENCE BECOME SUBJECT TO UNFAIR HIRING CLAIMS, CADENCE COULD BE PREVENTED
FROM HIRING NEEDED PERSONNEL, INCUR LIABILITY FOR DAMAGES AND INCUR
SUBSTANTIAL COSTS IN DEFENDING ITSELF
Companies in Cadence's industry whose employees accept positions with
competitors frequently claim that these competitors have engaged in unfair
hiring practices or that the employment of these persons would involve the
disclosure or use of trade secrets. These claims could prevent us from hiring
personnel or cause us to incur liability for damages. Cadence could also incur
substantial costs in defending ourselves or its employees against these claims,
regardless of their merits. Defending ourselves from these claims could also
divert the attention of Cadence's management away from its operations.
ERRORS OR DEFECTS IN CADENCE DESIGNS COULD EXPOSE IT TO LIABILITY AND HARM OUR
REPUTATION
Cadence's customers use its products and services in designing and
developing products that involve a high degree of technological complexity, each
of which has its own specifications and is based on various
19
20
industry standards. Because of the complexity of the systems and products with
which Cadence works, some of its products and designs can be adequately tested
only when put to full use in the marketplace. As a result, its customers or
their end users may discover errors or defects in Cadence's software or the
systems Cadence designs, or the products or systems incorporating its design and
intellectual property may not operate as expected. Errors or defects could
result in:
- Loss of current customers and loss of or delay in revenue and loss of
market share;
- Failure to attract new customers or achieve market acceptance;
- Diversion of development resources to resolving the problem;
- Increased service costs; and
- Liability for damages.
WE RELY ON A CONTINUOUS POWER SUPPLY TO CONDUCT OUR OPERATIONS, AND CALIFORNIA'S
CURRENT ENERGY CRISIS COULD DISRUPT OUR OPERATIONS AND INCREASE OUR
EXPENSES.
California is in the midst of an energy crisis that could disrupt our
operations and increase our expenses. In the event of an acute power shortage,
that is, when power reserves for the State of California fall below 1.5%,
California has on some occasions implemented, and may in the future continue to
implement, rolling blackouts throughout California. We currently have backup
generators or alternate sources of power for critical operations in the event of
a blackout. If blackouts interrupt our power supply, however, we may be
temporarily unable to continue operations at our facilities. Any such
interruption in our ability to continue operations at our facilities could
damage our reputation, harm our ability to retain existing customers and to
obtain new customers, and could result in lost revenue, any of which could
substantially harm our business and results of operations. Our current insurance
does not provide coverage for any damages we or our customers may suffer as a
result of any interruption in our power supply.
ANTI-TAKEOVER DEFENSES IN CADENCE'S CHARTER, BY-LAWS, AND UNDER DELAWARE LAW
COULD PREVENT AN ACQUISITION OF CADENCE OR LIMIT THE PRICE THAT INVESTORS
MIGHT BE WILLING TO PAY FOR CADENCE COMMON STOCK
Provisions of the Delaware General Corporation Law that apply to Cadence
and its Certificate of Incorporation could make it difficult for another company
to acquire control of Cadence. For example:
- Section 203 of the Delaware General Corporation Law generally prohibits a
Delaware corporation from engaging in any business combination with a
person owning 15% or more of its voting stock, or who is affiliated with
the corporation and owned 15% or more of its voting stock at any time
within three years prior to the proposed business combination, for a
period of three years from the date the person became a 15% owner, unless
specified conditions are met.
- Cadence's Certificate of Incorporation allows Cadence's Board of
Directors to issue, at any time and without stockholder approval,
preferred stock with such terms as it may determine. No shares of
preferred stock are currently outstanding. However, the rights of holders
of any Cadence preferred stock that may be issued in the future may be
superior to the rights of holders of its common stock.
- Cadence has a rights plan, commonly known as a "poison pill," which would
make it difficult for someone to acquire Cadence without the approval of
Cadence's Board of Directors.
All or any one of these factors could limit the price that certain
investors would be willing to pay for shares of Cadence common stock and could
delay, prevent or allow Cadence's Board of Directors to resist an acquisition of
Cadence, even if the proposed transaction was favored by a majority of Cadence's
independent stockholders.
20
21
ITEM 2. PROPERTIES
Cadence's headquarters are located in San Jose, California, and Cadence
owns the related land and buildings. Additionally, Cadence owns buildings in
India and land and buildings in Scotland. The total square footage of Cadence's
owned buildings is approximately 984,000 square feet.
Cadence leases additional facilities for its sales offices in the U.S. and
various foreign countries, and its research and development and design services
facilities in California and other states and in foreign countries including
Scotland, India, Canada, England, and Japan.
Cadence believes that these facilities and the undeveloped land it owns
adjacent to its current headquarters are adequate for its current needs and that
suitable additional or substitute space will be available as needed to
accommodate any expansion of Cadence's operations.
ITEM 3. LEGAL PROCEEDINGS
From time to time Cadence is involved in various disputes and litigation
matters that arise in the ordinary course of business. These include disputes
and lawsuits related to intellectual property, mergers and acquisitions,
licensing, contract law, distribution arrangements, and employee relations
matters.
Cadence filed a complaint in the U.S. District Court for the Northern
District of California on December 6, 1995 against Avant! Corporation and
certain of its employees for misappropriation of trade secrets, copyright
infringement, conspiracy, and other illegal acts.
On January 16, 1996, Avant! filed various counterclaims against Cadence and
Joseph B. Costello, Cadence's former President and Chief Executive Officer, and
with leave of the court, on January 29, 1998, filed a second amended
counterclaim. The second amended counterclaim alleges, inter alia, that Cadence
and Mr. Costello had cooperated with the Santa Clara County, California,
District Attorney and initiated and pursued its complaint against Avant! for
anti-competitive reasons, engaged in wrongful activity in an attempt to
manipulate Avant!'s stock price, and utilized certain pricing policies and other
acts to unfairly compete against Avant! in the marketplace. The second amended
counterclaim also alleges that certain Cadence insiders engaged in illegal
insider trading with respect to Avant!'s stock. Cadence and Mr. Costello believe
that they have meritorious defenses to Avant!'s claims, and each intends to
defend such action vigorously. By an order dated July 13, 1996, the court
bifurcated Avant!'s counterclaim from Cadence's complaint and stayed the
counterclaim pending resolution of Cadence's complaint. The counterclaim remains
stayed.
In an order issued on December 19, 1997, as modified on January 26, 1998,
the District Court entered a preliminary injunction barring Avant! from any
further infringement of Cadence's copyrights in DESIGN FRAMEWORKII(R) software,
or selling, licensing or copying such product derived from DESIGN FRAMEWORK II,
including, but not limited to, Avant!'s ArcCell products. On December 7, 1998,
the District Court issued a further preliminary injunction, which enjoined
Avant! from selling its Aquarius product line. Cadence posted a $10 million bond
in connection with the issuance of the preliminary injunction. On July 30, 1999,
the U.S. Court of Appeals for the Ninth Circuit affirmed the preliminary
injunction.
By an order dated July 22, 1997, the District Court stayed most activity in
the case pending in that court and ordered Avant! to post a $5 million bond in
light of related criminal proceedings pending against Avant! and several of its
executives.
On September 7, 1999, the District Court ruled on the parties' Motions for
Summary Adjudication, and granted in part, and denied in part, each party's
motion regarding the scope of a June 6, 1994 Release Agreement between the
parties. The court held that Cadence's copyright infringement claim against
Avant! is not barred by the release and that Cadence may proceed on that claim.
The court also held that Cadence's trade secret claim based on Avant!'s use of
Cadence's DESIGN FRAMEWORK II source code is barred by the release. The Ninth
Circuit has agreed to hear both parties' appeal from the District Court's order.
The trial date has been vacated pending a decision on the appeal and the outcome
of the criminal case, for which the trial is scheduled to begin in April 2001.
21
22
In February 1998, Aptix Corporation and Meta Systems, Inc. filed a lawsuit
against Quickturn Design Systems, Inc. in the U.S. District Court for the
Northern District of California. In this lawsuit, entitled Aptix Corporation and
Meta Systems, Inc. v. Quickturn Design Systems, Civil Action No. C 98-00762 WHA,
Aptix and Meta Systems alleged that Quickturn infringed a U.S. patent owned by
Aptix and licensed to Meta. Quickturn filed a counterclaim requesting the
District Court to declare the Aptix patent invalid in view of the prior art and
unenforceable based on inequitable conduct during the prosecution of the patent.
In June 2000 the District Court entered judgment in favor of Quickturn,
dismissing the complaint and declaring the patent unenforceable. On September 8,
2000 the Court ordered Aptix to pay $4.2 million to Quickturn as reimbursement
to Quickturn of the attorneys' fees and costs it incurred in the litigation.
Aptix has appealed the District's Court's judgment and, in the meantime, has
agreed to post a $2 million bond to secure the judgment.
On January 7, 1999, in the suit captioned Mentor Graphics Corporation, et.
al. v. Lobo, et. al., Delaware Chancery Court, New Castle County, Civ. Action
No. 16843-NC ("Mentor v. Lobo"), an amended complaint was filed and served by
Mentor asserting claims against Cadence, Quickturn Design Systems, Inc. and its
Board of Directors for declaratory and injunctive relief for various alleged
breaches of fiduciary duty purportedly owned by Quickturn and its Board of
Directors to Quickturn's shareholders in connection with the merger between
Quickturn and Cadence. Mentor alleged that Cadence aided and abetted Quickturn
and its Board of Directors in those purported breaches. Mentor has not
prosecuted the matter since January 1999. In May 2000, Mentor advised the
Delaware Chancery Court of its objection to the settlement of a companion action
brought on behalf of certain Quickturn shareholders. Mentor further advised the
court that it would seek an award of attorneys' fees related to its prosecution
of the Mentor v. Lobo action. At the request of the court, on July 28, 2000,
Mentor filed its brief in support of its standing to seek such an award.
Cadence, Quickturn and the individual defendants have opposed Mentor's request.
A hearing on the matter was held on February 1, 2001. The court has taken the
matter under submission.
On April 30, 1999, Cadence and several of its officers and directors were
named as defendants in a lawsuit filed in the U.S. District Court for the
Northern District of California, entitled Spett v. Cadence Design Systems, et
al., civil action no. C 99-2082. The action was brought on behalf of a class of
stockholders who purchased Cadence common stock between November 4, 1998 and
April 20, 1999, and alleges violations of Sections 10(b) and 20(a) of the
Securities Exchange Act of 1934. The lawsuit arises out of Cadence's
announcement of its first quarter 1999 financial results. On September 18, 2000
the District Court granted Cadence's Motion to Dismiss Plaintiffs' Claims with
leave to amend. To date, no amended complaint has been filed. Should an amended
complaint be filed, Cadence and the individual defendants intend to continue
their vigorous defense of the allegations.
In early 1999, Cadence entered into negotiations with Intelect
Communications, Inc., and Intelect's wholly-owned subsidiary, DNA Enterprises,
Inc., with respect to a potential purchase of substantially all the assets of
DNA. The transaction was not consummated and, in July 1999, Intelect and DNA
filed suit against Cadence in a Texas state court alleging breach of contract,
fraud, negligent misrepresentation and breach of fiduciary duty, seeking
unspecified compensatory and punitive damages. Cadence has answered, denying
liability, and discovery has commenced. A trial date has been schedule for
October 2001. Cadence believes that it has defenses to and disputes the
allegations made by Intelect and DNA, including the allegation that a purchase
contract was entered into, and intends to defend the action vigorously.
On July 21, 1999, Mentor filed suit against Quickturn in the U.S. District
Court for the District of Delaware, alleging that Quickturn's MERCURY(TM)
hardware emulation systems infringe U.S. Patent Nos. 5,777,489 and 5,790,832
allegedly assigned to Mentor. At Quickturn's request, Cadence was added as a
party defendant. Mentor has since asserted that Quickturn's MERCURYPLUS(TM)
emulation systems also infringe U.S. Patent Nos. 5,777,489 and 5,790,832. The
complaint seeks a permanent injunction and unspecified damages. Cadence intends
to vigorously defend itself against these claims. On December 14, 1999, this
action was transferred to the U.S. District Court for the Northern District of
California, and renumbered Civil Action No. C 99-5464 SI.
22
23
On February 25, 2000, Cadence and several of its officers were named as
defendants in a lawsuit filed in the U.S. District Court for the Northern
District of California, entitled Maxick v. Cadence Design Systems, Inc., File
No. C 00 0658PJH. The action was brought on behalf of a class of shareholders of
OrCAD, Inc., and alleges violations of Section 14(d)(7) of the Securities
Exchange Act of 1934, as amended, and Rule 14d-10 thereunder. The lawsuit arises
out of Cadence's acquisition of OrCAD, which was completed in August 1999.
Cadence's Motion to Dismiss plaintiffs' claims was denied. Discovery is
continuing. The defendants believe the complaint is without merit and intend to
continue their vigorous defense of the allegations.
On March 24, 2000, Mentor and Meta and several founders of Meta filed suit
against Quickturn and Cadence and a former Quickturn employee in the U.S.
District Court for the Northern District of California, Civil Action No. C
00-01030 WHA. The suit alleges patent infringement of a U.S. Patent allegedly
assigned to Mentor, misappropriation of trade secrets and breach of confidence,
and seeks unspecified damages, injunctive relief and the assignment to Mentor of
a patent previously issued to Quickturn. Cadence intends to vigorously defend
itself against these claims, and has filed a counterclaim for declaratory
judgment of invalidity of several patents allegedly assigned to Mentor.
Following a motion by Cadence, the former Quickturn employee was dismissed as a
party to the action. Discovery in the action has subsequently been consolidated
with discovery in Civil Action No. C 99-5464, the Mentor v. Quickturn suit
transferred from Delaware.
In April 2000, Cadence filed suit against a former design services
customer, IMI Telecommunications, Inc., for breach of contract relating to IMI
Telecommunications' failure to make payments due and fulfill its obligations
under a services agreement. Damages claimed by Cadence are approximately $1
million. The defendant countersued, alleging breach of oral contract,
rescission, negligent misrepresentation and fraud by Cadence and claiming
damages exceeding $100 million and seeking punitive damages exceeding $500
million. Cadence filed a motion to dismiss the defendant's counterclaims, and a
hearing on this motion was held on October 2, 2000. A ruling has not yet been
issued. Cadence believes that it has defenses to and disputes the allegations
made by IMI Telecommunications and intends to defend the action vigorously.
On September 11, 2000, Mentor filed a complaint against Quickturn and
Cadence in the U.S. District Court for the Northern District of California (Case
No. C-00-03291) accusing Quickturn and Cadence of infringing U.S. Patent No.
5,574,388, purportedly owned by Mentor and seeking unspecified damages and
injunctive relief. Quickturn and Cadence believe the complaint filed by Mentor
is without substance and that the patent that is the subject of this suit in
invalid and not infringed. Cadence and Quickturn are vigorously defending the
claim. On November 3, 2000, Mentor filed a motion for preliminary injunction,
asking the Court to prohibit the sale of Quickturn's MERCURYPLUS emulation
systems prior to trial of this action. The hearing on that motion is scheduled
for March 30, 2001. The parties have agreed to consolidate this action with
Civil Action Nos. C 99-5464 and C 00-01030 WHA, described above, for purposes of
discovery and pre-trial motions. A trial date of October 7, 2002 has been set
for all three actions.
On November 2, 2000, Mentor and Meta filed a complaint for declaratory
judgment against Quickturn and Cadence in the U.S. District Court for the
District of Oregon (Case No. C-00-1489) seeking a ruling that Mentor's proposed
design verification approach (in which chip designers would use U.S.-based
computer terminals to operate SimExpress emulation systems located overseas)
will not infringe Quickturn's patents and will not violate the permanent
injunction entered by the Oregon District Court on July 7, 1999 in Civil Action
No. C-96-00342. On January 5, 2001, Quickturn and Cadence answered the
complaint. In their answer, Quickturn and Cadence denied Mentor and Meta's
contention, and asserted that Mentor and Meta's complaint lacks subject matter
jurisdiction and is barred by res judicata and collateral estoppel. Quickturn
and Cadence intend to vigorously contest this action.
On November 22, 2000, a former design services customer, Uniden
Corporation, filed an action for fraud, negligent misrepresentation and breach
of contract in the State Court of Texas against Cadence, and alleged those
causes of action as well as others against Intel Corporation and entities
related to Intel. Uniden seeks compensatory and punitive damages in an
unspecified amount. The suit was filed after Cadence demanded payment of
approximately $1 million for design services rendered to Uniden. Cadence since
has filed a counterclaim to recover the approximate $1 million owed for services
rendered. Intel has filed a motion for
23
24
forum non conviens requesting that the action be moved to California. Cadence
has joined in that motion. Cadence intends to vigorously defend the action
brought by Uniden.
Management believes that the ultimate resolution of the disputes and
litigation matters discussed above will not have a material adverse effect on
Cadence's business, operating results or financial condition. However, were an
unfavorable ruling to occur in any specific period, there exists the possibility
of a material adverse impact on the result of operations.
ITEM 4. SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS
None.
EXECUTIVE OFFICERS OF CADENCE
The executive officers of Cadence are as follows:
NAME AGE POSITIONS AND OFFICES
---- --- ---------------------
H. Raymond Bingham..................... 55 President, Chief Executive Officer, and Director
Ronald R. Barris....................... 58 Senior Vice President, Services
Kevin Bushby........................... 45 Senior Vice President, Worldwide Field Operations
R.L. Smith McKeithen................... 57 Senior Vice President, General Counsel, and
Secretary
William Porter......................... 46 Senior Vice President and Chief Financial Officer
Robert P. Wiederhold................... 41 President and Chief Executive Officer of Tality
Corporation
Robert A. Promm........................ 49 Vice President and Corporate Controller
Executive officers are appointed by the Board of Directors and serve at the
discretion of the Board.
H. RAYMOND BINGHAM has served as President and Chief Executive Officer of
Cadence since April 1999. Mr. Bingham has been a director of Cadence since
November 1997. From 1993 to April 1999, Mr. Bingham served as Executive Vice
President and Chief Financial Officer of Cadence. Prior to joining Cadence, Mr.
Bingham was Executive Vice President and Chief Financial Officer of Red Lion
Hotels and Inns, an owner operator of a chain of hotels, for eight years. Mr.
Bingham is a director of Legato Systems, Inc., Onyx Software Corporation,
TenFold Corporation, and KLA-Tencor Corporation.
RONALD R. BARRIS joined Cadence in December 1999 as Senior Vice President,
Strategy and became Senior Vice President, Services in August 2000. From 1993 to
1999 Mr. Barris served as a partner for Coopers & Lybrand in its high technology
practice and subsequently in PricewaterhouseCoopers as the managing partner of
its semiconductor practice. Mr. Barris previously worked at General Electric,
FMC, Union Metal and Alliance Automation.
KEVIN BUSHBY joined Cadence in 1995 as Vice President and General Manager,
European Operations and became Senior Vice President, Worldwide Field Operations
in 2000. From 1990 to 1995 Mr. Bushby held several positions with Unisys
Corporation, most recently as Vice President Sales and Marketing, Client Server
Systems Division. Prior to this Mr. Bushby held positions in Convergent
Technologies and Hewlett-Packard.
R.L. SMITH McKEITHEN joined Cadence in 1996 as Vice President, General
Counsel, and Secretary and became Senior Vice President, General Counsel, and
Secretary in 1998. From 1994 to 1996, he served as Vice President, General
Counsel, and Secretary of Strategic Mapping, Inc. From 1988 to 1994, he served
as Vice President, General Counsel, and Secretary of Silicon Graphics, Inc.
WILLIAM PORTER joined Cadence in 1994 as Vice President, Corporate
Controller, and Assistant Secretary and became Senior Vice President and Chief
Financial Officer in May 1999. From 1988 to 1994, Mr. Porter served as Technical
Accounting and Reporting Manager and most recently as Controller of Cupertino
Operations with Apple Computer, Inc., a personal computer company.
ROBERT P. WIEDERHOLD joined Cadence in 1996 as Vice President and General
Manager of the Deep Submicron Business Unit and became Senior Vice President of
Cadence Worldwide Design Services
24
25
Group in July 1998. In July 2000, Mr. Wiederhold became President and Chief
Executive Officer of Tality Corporation, a subsidiary of Cadence. From 1994 to
1996, he served as Executive Vice President, Chief Operating Officer, and
Director of High Level Design Systems, Inc. From 1985 to 1994, he held various
positions with Cadence Design Systems, Inc., most recently as Vice President,
Marketing for the Systems Division.
ROBERT A. PROMM joined Cadence in December 1999 as Vice President and
Corporate Controller. From November 1997 to December 1999, Mr. Promm served as
Vice President, Corporate Controller of Kaiser Foundation Health Plan, Inc.
Prior to November 1997, Mr. Promm held several positions with Apple Computer,
Inc., most recently as Vice President and Financial Controller.
25
26
PART II.
ITEM 5. MARKET FOR THE REGISTRANT'S COMMON EQUITY AND RELATED STOCKHOLDER
MATTERS
Cadence common stock is traded on the New York Stock Exchange under the
symbol CDN. Cadence has never declared or paid any cash dividends on its common
stock in the past, and does not plan to pay cash dividends in the foreseeable
future. As of March 6, 2001, Cadence had approximately 1,464 registered
stockholders and estimates that it had approximately 42,007 beneficial owners of
its common stock.
The following table sets forth the high and low sales price for Cadence
common stock for each calendar quarter in the two-year period ended December 30,
2000:
HIGH LOW
------ ------
2000:
First Quarter............................................... $24.00 $18.13
Second Quarter.............................................. $20.81 $13.50
Third Quarter............................................... $27.13 $19.50
Fourth Quarter.............................................. $28.69 $21.25
1999:
First Quarter............................................... $34.13 $21.63
Second Quarter.............................................. $26.63 $10.63
Third Quarter............................................... $16.75 $ 9.19
Fourth Quarter.............................................. $24.06 $13.31
26
27
ITEM 6. SELECTED FINANCIAL DATA
The following selected consolidated financial data should be read in
conjunction with the consolidated financial statements and the notes thereto and
the information contained herein in Item 7, "Management's Discussion and
Analysis of Financial Condition and Results of Operation." Historical results
are not necessarily indicative of future results.
FIVE FISCAL YEARS ENDED DECEMBER 30, 2000
------------------------------------------------------------
2000 1999 1998 1997 1996
---------- ---------- ---------- ---------- --------
(IN THOUSANDS, EXCEPT PER SHARE AMOUNTS)
Revenue............................... $1,279,550 $1,093,303 $1,320,180 $1,036,773 $888,642
Net income (loss)..................... $ 49,977 $ (14,075) $ 25,124 $ 165,122 $ 48,441
Net income (loss) per
share -- assuming dilution.......... $ 0.19 $ (0.06) $ 0.10 $ 0.68 $ 0.21
Total assets.......................... $1,477,321 $1,459,659 $1,481,916 $1,153,247 $875,754
Long-term obligations................. $ 3,298 $ 25,024 $ 136,380 $ 1,599 $ 20,292
Stockholders' equity.................. $ 909,465 $ 986,149 $ 947,830 $ 821,363 $552,083
27
28
ITEM 7. MANAGEMENT'S DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND RESULTS
OF OPERATIONS
The following discussion should be read in conjunction with the five-year
summary of selected financial data and the Consolidated Financial Statements and
notes thereto included elsewhere in this Annual Report on Form 10-K. All
references to years represent fiscal years unless otherwise noted. Except for
the historical information contained in this Annual Report on Form 10-K, the
following discussion contains forward-looking statements based on current
expectations that involve certain risks and uncertainties. Cadence's actual
results could differ materially from those discussed herein. Factors that could
cause actual results or performance to differ materially or contribute to such
differences include, but are not limited to, those discussed below in
"Disclosures about Market Risk", and "Liquidity and Capital Resources".
OVERVIEW
Cadence provides comprehensive software and other technology and offers
design and methodology services for the product development requirements of the
world's leading electronics companies. Cadence licenses its leading-edge
electronic design automation, or EDA, software and hardware technology and
provides a range of services to companies throughout the world to help its
customers optimize their product development processes. Cadence is a supplier of
end-to-end products and services, which are used by companies to design and
develop complex chips and electronic systems including semiconductors, computer
systems and peripherals, telecommunications and networking equipment, mobile and
wireless devices, automotive electronics, consumer products, and other advanced
electronics.
The worldwide electronics industry has experienced expansion driven
primarily by the communications (networking and wireless) markets. However, the
industry recently experienced a slowdown commencing in late 2000 and the
severity of which has increased in early 2001. The electronics industry
slowdown, especially in the semiconductor industry, may reduce our revenue and
harm our results of operations.
On July 17, 2000, Cadence announced its plan to separate its electronics
design services group into a new company named Tality Corporation, or Tality.
Tality's separation from Cadence was substantially completed on October 4, 2000,
and accordingly the electronic design services business now operates as a
majority-owned subsidiary of Cadence. Tality filed a registration statement with
the Securities and Exchange Commission for Tality's initial public offering, or
IPO. On October 9, 2000, Cadence announced the postponement of Tality's IPO due
to unfavorable market conditions. The financial statements and financial
information in this Annual Report on Form 10-K do not give effect to the IPO.
On December 29, 2000, Cadence entered into a definitive agreement to
acquire CadMOS Design Technology, Inc., a privately held design tools firm
headquartered in San Jose. CadMOS provides solutions to the noise problems
experienced in ultra-deep submicron, or UDSM, processes. Its noise-analysis
solutions are targeted at both digital and mixed signal designers working in
microprocessors, DRAMs, mixed-signal SOC, and ASICs. The acquisition was
completed on February 28, 2001, in which Cadence acquired all of the outstanding
stock of CadMOS and assumed all outstanding stock options. The acquisition will
be accounted for as a purchase.
In December 1999, Cadence acquired all of the outstanding stock of Diablo
Research Company LLC for cash and assumed all outstanding stock options of
Diablo. Diablo was a high-technology engineering services firm with expertise in
wireless communication, global positioning satellite solutions, and data
transfer and home automation markets. The total purchase price was $39.9 million
and the acquisition was accounted for as a purchase.
In August 1999, Cadence acquired OrCAD, Inc., a supplier of computer-aided
engineering and computer-aided design software and services for the printed
circuit board industry, for cash. Cadence acquired all of the outstanding stock
of OrCAD and assumed all outstanding stock options. The purchase price was
$131.4 million and the acquisition was accounted for as a purchase.
In May 1999, Cadence completed its merger with Quickturn Design Systems,
Inc. Quickturn designed, manufactured, sold, and supported hardware and software
products that verify the design of computer chips and electronic systems.
Cadence acquired all of the outstanding shares of Quickturn common stock in a
tax-
28
29
free, stock-for-stock transaction for approximately 24.6 million shares of
Cadence common stock. The acquisition was accounted for as a
pooling-of-interests. In addition, Cadence assumed all outstanding stock options
and warrants of Quickturn. All prior period consolidated financial statements
were restated as if the merger took place at the beginning of such periods, in
accordance with required pooling of interests accounting and disclosures.
In January 1999, Cadence acquired Design Acceleration, Inc., or DAI, a
supplier of design verification technology used in system-on-a-chip, or SOC,
design. Cadence acquired all of the outstanding stock of DAI for approximately
0.6 million shares of Cadence common stock and $2.9 million of cash. The total
purchase price was $25.7 million and the acquisition was accounted for as a
purchase.
In September 1998, Cadence acquired all of the outstanding stock of Ambit
Design Systems, Inc. for cash. Ambit was a leading developer of design
automation technology used in SOC design. The total purchase price was $255
million and the acquisition was accounted for as a purchase.
In September 1998, Cadence acquired the Bell Labs' Integrated Circuit
Design Automation Group of Lucent Technologies Inc., or BLDA, for cash. BLDA was
a design automation development organization that focused on the complex
verification challenges companies face when designing integrated circuits and
next-generation SOC. The total purchase price was $58 million and the
acquisition was accounted for as a purchase.
In March 1998, Cadence acquired all of the outstanding stock of Excellent
Design, Inc., or EXD, for cash. EXD provided ASIC and SOC design and library
development. The total purchase price was $40.9 million and the acquisition was
accounted for as a purchase.
In February 1998, Cadence acquired all of the outstanding stock of
Symbionics Group Limited for approximately 1 million shares of Cadence common
stock and $21.3 million of cash. Symbionics provided product development design
services to leading electronics manufacturers. The total purchase price was
$56.1 million and the acquisition was accounted for as a purchase.
RESULTS OF OPERATIONS
REVENUE
% CHANGE
-------------
2000 1999 1998 00/99 99/98
-------- -------- -------- ----- -----
(IN MILLIONS)
Product...................................... $ 627.4 $ 505.4 $ 760.5 24% (34)%
Services..................................... 336.0 294.9 265.2 14% 11%
Maintenance.................................. 316.2 293.0 294.5 8% (1)%
-------- -------- --------
Total revenue...................... $1,279.6 $1,093.3 $1,320.2 17% (17)%
======== ======== ========
SOURCES OF REVENUE AS A PERCENT OF TOTAL REVENUE
2000 1999 1998
---- ---- ----
Product..................................................... 49% 46% 58%
Services.................................................... 26% 27% 20%
Maintenance................................................. 25% 27% 22%
Product revenue increased $122 million in 2000, when compared to 1999,
primarily due to an overall increase in price and volume of license renewals
with major customers. The increases in sales volume of products was primarily
attributable to increased sales of intellectual property creation products,
which include mixed signal and simulation products, integrated circuit
implementation products, which include place and route, physical design, and
physical verification products, and printed circuit board related products.
Product revenue decreased $255.1 million in 1999, when compared to 1998,
primarily due to the implementation of Cadence's new software subscription
licensing model during the third quarter of 1999 and
29
30
to a lesser extent a decrease in sales volume of Cadence's software products.
These decreases were partially offset by an increase in emulation hardware
product revenue in the same periods and the favorable impact of foreign currency
exchange rate differences, primarily the Japanese yen. Revenue associated with
software products under subscription licenses is recognized ratably over the
license period because the agreements allow customers to exchange licensed
products for unspecified future technology.
Services revenue increased $41.1 million in 2000, when compared to 1999,
primarily due to an increase in Tality revenue of $69.5 million, partially
offset by a decrease of $28.4 million in methodology services revenue. Tality's
revenue increase is primarily due to increases in the total size of active
client engagements and total client service hours billed. The decrease in
methodology services engagements is primarily due to lower staffing levels.
Services revenue increased $29.7 million in 1999, when compared to 1998,
primarily due to an increase in Tality revenue of $23.6 million. Tality's
increase is primarily due to an increase in the total size of active client
engagements and an increase in total client service hours billed.
Maintenance revenue increased $23.2 million in 2000 when compared to 1999,
primarily due to the growth of the installed customer base. Maintenance revenue
was relatively flat in 1999 compared to 1998.
REVENUE BY GEOGRAPHY
% CHANGE
--------------
2000 1999 1998 00/99 99/98
-------- -------- -------- ----- -----
(IN MILLIONS)
Domestic............................. $ 720.8 $ 526.8 $ 676.6 37% (22)%
International........................ 558.8 566.5 643.6 (1)% (12)%
-------- -------- --------
Total revenue.............. $1,279.6 $1,093.3 $1,320.2 17% (17)%
======== ======== ========
REVENUE BY GEOGRAPHY AS A PERCENT OF TOTAL REVENUE
2000 1999 1998
---- ---- ----
Domestic.................................................... 56% 48% 51%
International............................................... 44% 52% 49%
International revenue decreased $7.7 million in 2000 when compared to 1999,
primarily due to decreases in product revenue in Japan and services revenue in
Europe and Japan, partially offset by an increase in product and maintenance
revenue in Europe.
International revenue decreased $77.1 million in 1999 when compared to
1998, primarily due to decreases in product revenue in all international regions
resulting from the implementation of Cadence's new subscription licensing model
during the third quarter of 1999. The decrease in international product revenue
was partially offset by an increase in services revenue in all international
regions except Asia.
Other differences in the rate