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UNITED STATES

SECURITIES AND EXCHANGE COMMISSION

Washington, D.C. 20549

FORM 10-K

For the Fiscal Year Ended December 31, 2002

Commission File Number: 0-21626

Electroglas, Inc.

(Exact Name of Registrant as Specified in its Charter)

Securities registered pursuant to Section 12(b) of the Act: None

Securities registered pursuant to Section 12(g) of the Act:

Common Stock, $0.01 par value

(Title of Class)

Indicate by check mark whether the Registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the Registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days.    Yes x    No ¨

Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of Registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K.    x

Indicate by check mark whether the registrant is an accelerated filer (as defined in Exchange Act Rule 12b-2).    Yes x    No ¨

As of June 30, 2002, the aggregate market value of the voting and non-voting common equity held by non-affiliates of the Registrant was approximately $211,700,000, based on the closing sale price as reported on the Nasdaq National Market on such date. This calculation does not reflect a determination that certain persons are affiliates of the Registrant for any other purposes.

As of February 22, 2003, the Registrant had 21,340,519 outstanding shares of Common Stock.

DOCUMENTS INCORPORATED BY REFERENCE

Portions of the Registrant’s Proxy Statement in connection with the Annual Meeting of Stockholders, to be held on May 20, 2003, are incorporated by reference into Part III of this Form 10-K.

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ELECTROGLAS, INC.

FORM 10-K

For the Year Ended December 31, 2002

INDEX

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FORWARD LOOKING STATEMENTS

This Annual Report on Form 10-K and certain information incorporated herein by reference contain forward looking statements within the “safe harbor” provisions of the Private Securities Litigation Reform Act of 1995. All statements included or incorporated by reference in this Annual Report, other than statements that are purely historical, are forward-looking statements. Words such as “anticipates,” “expects,” “intends,” “plans,” “believes,” “seeks,” “estimates” and similar expressions also identify forward looking statements. These forward looking statements are not guarantees of future performance and are subject to risks and uncertainties that could cause actual results to differ materially from the results contemplated by the forward looking statements and include, without limitation, statements regarding:

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The forward-looking statements in this Annual Report on Form 10-K are subject to additional risks and uncertainties further discussed under “Item 7. Management’s Discussion and Analysis of Financial Condition and Results of Operation—Factors that May Affect Results and Financial Condition” and are based on information available to us on the date hereof. We assume no obligation to update any forward looking-statement or statements. Actual results, performance or outcomes may differ from current expectations. The reader should also consult the cautionary statements and risk factors listed from time to time in our Reports on Forms 10-Q, 8-K and our 10-K.

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PART I

Item 1.    Business

Overview

We are a supplier of semiconductor manufacturing equipment and software to the global semiconductor industry. Our primary product line is automated wafer probing equipment and related network software to manage information from that equipment. In conjunction with automated test systems from other suppliers, our semiconductor manufacturing customers use our wafer probers and network software to test semi-conduction wafers for quality and to improve their productivity and control their processes, optimizing manufacturing efficiency. We were formed on April 1, 1993, to succeed the wafer prober business conducted by the Electroglas division of General Signal Corporation, our former parent. Immediately prior to the closing of the initial public offering of our Common Stock, or IPO, on July 1, 1993, we assumed the assets and liabilities of the Electroglas division in the asset transfer. Following our IPO, we commenced operations as an independent corporation. We, through our predecessors, have been in the semiconductor equipment business for more than 40 years. We believe we are among the largest suppliers of wafer probers worldwide, having sold over 15,000 wafer probers.

We have also been involved in the development, manufacture, marketing, and servicing of semiconductor wafer inspection products and process management software products as a result of two acquisitions we completed in 1997. In May 1997, we acquired Sunnyvale, California-based Knights Technology, Inc., or Knights. In December 1997, we acquired Albany, Oregon-based Techné Systems, Inc. (renamed Electroglas Inspection Products). In January 2001, we acquired Statware Inc., of Corvallis, Oregon, or Statware, to further expand our product offerings in the process management area and in November 2001, we combined the operations of Knights, Statware and the networking software section of the prober operations into a single operating division, called EGsoft. As of December 2002, we were organized into three operating divisions, the Prober Products Division, or PPD, Inspections Products Division and EGsoft. In January 2003, we reorganized the three operating divisions into one consolidated business unit combining the resources of all three divisions.

Additional information about Electroglas is available on our web site at www.electroglas.com. Electroglas makes available free of charge on our website our Annual Reports on Form 10-K, our Quarterly Reports on Form 10-Q, our Current Reports on Form 8-K and amendments to those Reports filed or furnished pursuant to Section 13(a) or 15(d) of the Securities Exchange Act of 1934, as amended, as soon as reasonably practicable after we electronically file them with or furnish them to the Securities Exchange Commission, or the SEC. Information contained on our web site is not part of this Annual Report on Form 10-K or our other filings with the SEC.

Industry Background

Semiconductor devices are fabricated by repeating a complex series of process steps on a substrate, or wafer, that is usually made of silicon. These wafers measure from 75mm to 300mm, or 3 to 12 inches, in diameter. Wafers are typically sent through a series of 100 to 400 process steps. A finished wafer consists of many integrated circuits, each referred to as a “device” or “die” or “chip”, the number depending on the area of the circuits and the size of the wafer. Manufacturers have increasingly utilized larger diameter wafers to achieve more cost-effective production. The move to 300mm, 12 inch, wafers began in 2000. The manufacture of semiconductor devices is very capital intensive. A typical state of the art facility, usually called a “wafer fab”, will cost more than $2 billion. The purchase of semiconductor manufacturing equipment and spare parts, the integration of such equipment into production lines, and the training of employees on a particular supplier’s equipment require significant expenditures by semiconductor manufacturers.

Wafer Probing

A wafer prober successively positions each die on the wafer so that the electrical contact points, or pads, on the die align under and make contact with probe pins, which are located on a probe card mounted on the wafer prober. The probe card, which is generally custom made by other suppliers for the specific device being tested, is

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connected to a test system, also supplied by other suppliers, which performs the required parametric or functional test. Parametric testing is performed during the wafer fabrication process, referred to as “in-line testing,” and at the completion of the wafer fabrication process, referred to as “end-of-line testing,” to measure electrical parameters that verify the reliability of the wafer fabrication process. Functional testing is performed after the completion of wafer fabrication to identify devices that do not conform to particular electrical specifications or performance criteria. This process is typically called “wafer sort.” Wafers often go through several wafer probing steps during the manufacturing process.

Automatic wafer probers are primarily used during this “wafer sort” process, which occurs after the fabrication steps are completed and before the separation and packaging of each individual device. Wafer probers are also increasingly used during in-line parametric testing. In-line testing requires special equipment features such as cleanroom compatibility and low-noise electrical measurement capability, as tests are carried out during the fabrication process. This testing is done to verify the quality of the manufacturing process while wafers are in an unfinished state where corrective action can occur. A small number of probers are also used for research and development, and quality and process control applications. We estimate, based upon our experience, that wafer sort applications represent approximately 85% of the market for automatic wafer probers. The remaining 15% is divided between in-line and end-of-line testing and laboratory applications.

There is a growing trend for semiconductor manufacturers to contract with other companies to perform their wafer sort operations. These contract test companies, typically called “test houses”, perform the wafer testing service and often provide assembly and packing services as well.

A semiconductor manufacturer typically purchases wafer probers when outfitting a new wafer fabrication facility or expanding an existing facility. Wafer probers are also purchased to replace equipment in response to major changes in technology such as larger wafer sizes and greater device complexity. A semiconductor fabrication facility typically requires 20 to 80 probers to meet testing requirements on a timely basis. A test house may require hundreds of wafer probe systems to support the testing requirements of the companies that contract with them.

Post-fab Wafer Inspection

Wafers typically undergo an optical inspection step before they are sent from the wafer sort operation to final assembly. This step identifies die with physical defects that may have passed electrical test, but are at risk of failure after the devices have been packaged. Sorting die both optically and electrically improves product reliability while avoiding the cost of packaging marginal die. Optical inspection on the sort floor is also used after wafer probe to determine whether the probe tips caused bond-pad damage. Wafer inspection tools automate this process of defect identification, defect classification, and feedback control processes. The tools can analyze each individual die on each wafer for defects and process excursions, identify the type of defect or pattern anomaly, measure the defect or anomaly, and pass the quantitative results to both upstream and downstream production machines. The requirement for automated inspection after the wafer manufacturing process is complete, or post fab is growing. Both the cost of manual inspection and the changing technologies of the packaging process are driving the need for more detailed inspection and process control in the post-fab environment.

Lightweight, portable electronic devices are driving the growth of new flip-chip packaging technologies. Unlike conventional packaging which uses fine gold wires to electrically connect the semiconductor chip to its package, flip-chips utilize gold or solder bumps that are deposited onto bonding pads on the chip surface. The chips are then “flipped” into packages or directly onto printed circuit boards. Flip-chips take up much less space than conventional chips, and due to the elimination of the gold wires, flip-chip packages generally operate at higher speeds. The use of flip-chip packaging is expected to grow rapidly as memory, SOC and other device types are required to operate at high speed and in tight spaces. Wafer bumping is an expensive process, and the cost of flip chip packaging can be very high. Bumps that are deformed, missing, and oversized or undersized will

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cause the failure of flip-chip devices. To avoid the cost of packaging defective chips, semiconductor manufacturers are turning to automated wafer inspection systems. Automated inspection systems must be able to inspect every bump on every wafer in order for semiconductor manufacturers to control their wafer bumping processes and screen out defective chips prior to probing and packaging.

An emerging application for post-fab inspection is the Micro Electro-Mechanical Systems (MEMS) device market. MEMS devices are miniaturized electromechanical devices such as switches, accelerometers, pressure sensors and inkjet printheads, which are fabricated using semiconductor manufacturing techniques. These MEMS devices need optical inspection to verify the small structures fabricated into the device.

Process Management Software

Software plays an important role in the IC manufacturing process. Capital and operating costs of a fabrication facility are very high so semiconductor manufacturers are seeking ways to improve overall equipment efficiency (OEE), optimize yield and provide plant-wide integration. Manufacturers are seeking a total integrated software infrastructure to produce, correlate, manage, and analyze data throughout the production process. In a wafer sort area, network software is increasingly being used to manage wafer information, product specific recipes and equipment information. Yield, or the percentage of good die that can be realized from a wafer, is a critical factor in determining the profitability of a production line, and often the semiconductor manufacturer as a whole. Therefore, efforts to maximize the yield of each product line have become a key engineering priority at these companies. This has led to a growing need for tools that monitor and analyze defects. Also, as defect problems are brought under control, there is an increased emphasis on operational efficiency.

Software tools are used to bring together fab process data, inspection results, electrical test data, and product test data to help determine which process zones or tools contribute most significantly to yield loss and to automate and optimize the operational efficiency of the semiconductor fabrication facility. The software provides a common location and format for presenting this data and doing cross-correlation between data types for the purpose of yield enhancement analysis and process optimization. Software tools also provide computerized interfaces and navigation capabilities for IC design, failure analysis (FA), defect review and debugging.

Historically, much of the software used in this market is developed in-house by the engineering group responsible for yield or through a dedicated software development group. This results in highly customized solutions that are inflexible and expensive to maintain. Many organizations are now looking to third-party providers of both standard and customizable solutions to lower their support costs, maximize their engineers’ productivity and increase the overall functionality of their analysis tools.

Our Strategy

We are a major supplier of wafer probers due to a combination of strengths, including a large installed base, advanced technical capabilities, close relationships with the leading manufacturers of integrated circuits, a broad line of high quality products, and a well-established, highly qualified distribution organization. Building on these capabilities, our strategy is comprised of the following key elements:

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Products

Wafer Probers

Horizon 4000 Series:     The 4090u (4090micro) and the 4090u Fast Probe are our primary offerings in the Horizon 4000 Series of wafer probers. This product line is positioned to satisfy high-volume semiconductor manufacturing applications for 200mm and smaller wafers. The Horizon 4000 Series provides many advanced automation capabilities, including automatic probe-to-pad-alignment, in-process inspection and optical character recognition, or OCR. The systems can also be configured with a temperature-controlled chuck top, providing the ability to precisely maintain a customer-selected wafer temperature during testing. The 4090u prober also offers an integrated mini-environment and clean air system to provide a class 1 probing environment. The 4090u Fast Probe uses special technologies to reduce the system stepping time in applications where the die are very small and there is a very large number of devices on a wafer. In 2001, we released a new version of our EGCommander software, which runs under the Window-NT operating system. The user interface features color graphics, touch screen programming, probing recipes, control maps, and real-time maps. The Horizon 4000 Series probers feature a distributed multiple processor architecture to maximize productivity and expandability.

The EG4/200:     Introduced in 1999, the EG4/200 is targeted at high-end probing applications for 200mm wafers. The EG4/200 utilizes a unique “probe-centered z-drive” to provide very low deflections, even under extremely high probe forces. This is important when testing multi-site or high pin count devices. The EG4/200 retains many of the features of the Horizon 4000 series probers such as a linear motor and an air-bearing positioning system. The EG4/200 uses the EGCommander system software, which runs under the Windows-NT operating system.

EG5/300:     Introduced in 1999, the EG5/300 is a new generation of wafer prober from Electroglas. It is targeted at the emerging 300mm wafer probing market. The EG5/300 utilizes a completely new system architecture that allows for faster and more accurate probing over the larger wafer sizes. Closed loop motion control and linear motors ensure precise wafer positioning over a wide range of temperatures and operating conditions. A modular design allows for configuration flexibility to meet the diverse needs of the emerging 300mm market. A new version of the EG5/300 system, named the Argos, was introduced in 2001. The Argos model provides what we believe is the highest accuracy capabilities available in the auto prober market. The EG5/300 uses the EGCommander system software, which runs under the Windows-NT operating system.

EG5/300e and EG4/200e:     The EG5/300e, introduced in December 2000, and the EG4/200e, introduced in July 2001, are targeted at the parametric test (“e-test”) segment of the wafer probe market. The EG5/300e, based on the EG5/300, is targeted at the emerging 300mm market. The EG4/200e, based on the EG4/200 platform

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addresses the 200mm market. Both systems incorporate patented technology licensed from our partner, Cascade Microtech, Inc. This technology allows extremely precise, low-level electrical measurements to be made at the wafer level. This type of electrical measurement performance is becoming increasingly critical for advanced sub-micron semiconductor processes.

Pathfinder:     Introduced in 2002, the Pathfinder system is designed to meet the unique test handling requirements of the Known Good Die (KGD) and Chip-scale package markets. The Pathfinder system features a unique material handling system that can handle and position wafers and packages after they have been sawn (“diced”). Special alignment techniques are used to compensate for the variability inherent in these sawn wafers and packages.

Software Products

Our collaborative manufacturing software tools deliver new ways of leveraging the Internet and process management technologies. These tools allow semiconductor manufacturers to convert data to corrective action at any level—from the process cell to the entire manufacturing enterprise. We offer semiconductor makers a software infrastructure that spans from IC design-for-manufacturing to final test. This software infrastructure enables our customers to manage their fabs and wafer sort operations more efficiently, to speed product cycles, and to improve yield and profitability. Our products include: Collaborative Process Management Tools, Design for Manufacturing software (CADNav, Merlin), Fab Solutions (YieldManager, LCD-YM), and Test Floor Solutions (SORTnet, SORTmanager).

Wafer Inspection Products

The QuickSilver series of automated wafer inspection products are designed for inspection of wafers in the post fab environment. These products feature advanced technologies such as Time Delay Integration, or TDI imaging and dedicated image processing systems that allow for high-speed acquisition of complex images of the wafer surface. This high-speed image acquisition allows the QuickSilver system to be used in production applications, inspecting every die on every wafer. The QuickSilver system can be configured for several different inspection applications including solder bump, gold bump, surface defect, and probemark inspection. An important capability of QuickSilver is the ability to quickly train the system to identify defects in new products, review inspection results and automatically classify defects. The QuickLook process visualization station is offered to provide these capabilities in an off-line mode, allowing users to get maximum utilization of their QuickSilver inspection system.

Engineering, Research and Development

The market for semiconductor manufacturing equipment is characterized by continuous technological development and a high rate of product innovation. We believe that continued, rapid development of new products and enhancements to existing products is necessary to maintain our competitive position. For example, we devoted a significant portion of our personnel and financial resources to engineering, research and development programs for our wafer prober product line to continue a high level of development for 200mm wafer probers as well as to develop an entirely new platform for 300mm wafer probers. In addition, we have invested in new product areas such as wafer inspection and software. We use our close relationships with key customers to make product improvements that respond to such customers’ needs.

Engineering, research and development expenses were $31.6 million, $31.6 million and $28.3 million in 2002, 2001 and 2000, respectively, or 55.2%, 37.3% and 12.6% of net sales, respectively. Engineering, research and development expenses consist primarily of salaries, project materials, consultant fees, and other costs associated with our ongoing efforts in hardware and software product development and enhancement. It is expected that these expenses will decrease in absolute dollars in 2003 from 2002 levels.

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Marketing, Sales and Service

We sell our products directly to end-users through both a direct sales force and independent representatives as well as use distributors in certain geographies. We generally sell product on net 30-day terms to most customers. Other, primarily foreign, customers are required to deliver a letter of credit typically payable upon product delivery. We generally warrant our products for a period of up to 12 months from shipment for material and labor repair. Installation and certain training is customarily included in the price of the product. Our field engineers provide customers with call out repair and maintenance services for a fee. Customers may enter into repair and maintenance service contracts covering our products. For a fee, we train customer employees to perform routine service. Telephone consultation services are generally provided free of charge.

We maintain sales and service offices in strategic locations throughout the United States. In Europe, we maintain sales and service offices in France and Germany and in Asia, offices in the People’s Republic of China, Singapore and Taiwan. As of December 31, 2002, we employed 148 people worldwide in sales, service, applications, logistics, technical support, and customer service.

Customers

We sell our products to leading semiconductor manufacturers throughout the world. In 2002, STMicroelectronics and Cypress Semiconductor accounted for 13% and 11% of net sales. In 2001, STMicroelectronics accounted for 12% of net sales. In 2000, STMicroelectronics, Philips and Atmel accounted for 18%, 14% and 13% of net sales, respectively.

International sales represented 48%, 51% and 53% of our net sales in 2002, 2001 and 2000, respectively. These sales represent the combined total of export sales made by United States operations and all sales made by foreign operations.

Manufacturing and Suppliers

Our assembly equipment manufacturing activities consist primarily of integrating components and subassemblies to create finished prober and inspection systems, spares and upgrades configured to customer specifications. We schedule production based upon firm customer commitments and anticipated orders during the planning cycle. In January 2002, we announced plans to move prober manufacturing from San Jose, California to Singapore to reduce product cost. In addition to rapid product innovation, our wafer prober market is subject to significant price competition and cost reduction is required. As of December 2002, the majority of the manufacturing of our high-volume prober systems had completely transferred to our Singapore manufacturing facilities. Certain of the components and subassemblies included in our products are obtained from a single source. However, we believe that alternative sources exist or can be developed.

Quality control is maintained through the assembly and test process, with documented instructions and test procedures and final inspection for all manufactured equipment prior to shipment. We train all of our employees in basic quality skills and regularly participate in quality sharing meetings with other equipment manufacturers and customer quality audits of procedures and personnel. We are ISO 9001 Certified.

Backlog

Our backlog was $14.0 million as of December 31, 2002 and $22.6 million as of December 31, 2001. Our backlog consists of product orders for which a customer purchase order has been received and which is scheduled for shipment or is earned within the next twelve months. Orders are subject to cancellation or rescheduling by the customer, generally with a cancellation charge. Due to possible changes in product delivery schedules and cancellation of product orders and because our sales will often reflect orders shipped in the same quarter received, our backlog at any particular date is not necessarily indicative of actual sales for any succeeding period.

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Backlog also includes deferred revenue comprised of products shipped (but not recognizable as revenue per our revenue recognition policy), maintenance revenue that is being amortized over twelve months or less, and services earned or to be performed within the next year.

Competition

The semiconductor equipment industry is highly competitive. The principal competitive factors in the industry are product performance, reliability, price, service and technical support, product improvements, established relationships with customers and product familiarity. We believe that our products compete favorably with respect to each of these factors.

Our major competitors in the prober market segment are Tokyo Electron Limited, or TEL, and Tokyo Seimitsu, or TSK. The major competitors in the post fab inspection market segment are August Technologies and Robotic Vision Systems Inc., or RVSI. The main competitors in the process management software market segment are KLA-Tencor and Brooks Automation. Most of our competitors have greater financial, engineering and manufacturing resources than we have, as well as larger service organizations and long-standing customer relationships. We cannot assure you that levels of competition in our particular product market will not intensify or that our technological advantages will be reduced or lost as a result of technological advances by competitors or changes in semiconductor processing technology. For a more detailed discussion of the competition we face, see “Factors that May Affect Results and Financial Condition.”

Patents, Trademarks, Copyrights and Other Intellectual Property

We believe that the success of our business depends more on the technical competence, creativity and marketing abilities of our employees, rather than on patents, trademarks and copyrights. Nevertheless, we have a policy of seeking patents when appropriate on inventions concerning new products and improvements as part of our ongoing research, development and manufacturing activities. We own various patents and have applied for additional patent protection in the United States and abroad for the technology in our products. We also have several registered United States and international trademarks. We maintain unregistered copyrights on our software and typically maintain the source code for our products as a trade secret.

We also rely upon trade secret protection for our confidential and proprietary information. We routinely enter into confidentiality agreements with our employees. There can be no assurance, however, that others will not independently gain information and techniques or otherwise gain access to our trade secrets or that we can meaningfully protect our trade secrets. For a more detailed discussion regarding risks related to our intellectual property, see “Factors that May Affect Results and Financial Condition.”

Employees

As of December 31, 2002, we employed 469 people. Many of our employees are highly skilled, and our success will depend in part upon our ability to attract and retain such employees, who are in great demand. We have never had a work stoppage or strike, and no employees are represented by a labor union or covered by a collective bargaining agreement. We consider our employee relations to be good.

Item 2.     Properties

In the first quarter of 2000, we consolidated our executive office, manufacturing, engineering, and research and development operations into an approximately 260,000 square foot facility located in San Jose, California. This space is under a lease expiring in March 2003, with monthly rent payments based on the London Interbank Offering Rate, or LIBOR. At current interest rates and based on the lease amount of $48.3 million at December 31, 2002, the remaining gross lease payments approximate $0.2 million. On January 28, 2003, we gave notice to the lessor electing an early designated sale date and completed the purchase of the facility in March 2003. The

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long-term lease receivable and cash collateral were used to fund the purchase price. The property and equipment, including closing costs, were recorded at approximately $37.2 million. We are currently occupying 66% of the facility, and 34% is available for lease. See Note 11, Commitments and Contingencies.

In January 2002, we entered into a three-year operating lease for a 39,000 square foot manufacturing facility in Singapore with annual lease payments of approximately $0.4 million. In August 2000, we entered into a six-year lease agreement in Mumbai, India for 4,000 square feet with an annual lease payment of approximately $0.5 million, increasing at 15% per year.

Item 3.     Legal Proceedings

We are not currently involved in any legal actions that we believe are material. From time to time, however, we may be subject to various claims and lawsuits by customers, suppliers, competitors, and employees arising in the normal course of business, including suits charging infringement or violations of antitrust laws. Such suits may seek substantial damages and, in certain instances, any damages awarded would be trebled.

Some customers using certain of our products have received a notice of infringement from Technivison Corporation and the Lemelson Medical Education & Research Foundation, or Lemelson, alleging that the manufacture of semiconductor products infringes certain patents currently held by Lemelson. Certain of these customers have notified us that, in the event it is subsequently determined that the customer infringes certain of the Lemelson patents, they may seek reimbursement from us for some damages or expenses resulting from this matter. We have in turn notified our suppliers that, in the event, it is subsequently determined that our customers are determined to infringe and that we are responsible for any associated costs and fees, that it may seek reimbursement for the resultant costs and fees. We believe that our products do not infringe the Lemelson patents. Certain of our customers are currently engaged in litigation with Lemelson involving 17 of its patents, and the validity of those patents has been placed in issue. The trial ended in January 2003, post trial briefs will be reviewed and it is expected that a decision will be made during the second half of 2003. In the future, it is possible that our participation in the litigation may be required. We may incur costs with respect to such participation and cannot predict the outcome of this or similar litigation or the effect of such litigation on our business. To the best of our knowledge, Lemelson has not asserted that we may be liable for infringing its patents.

Item 4.     Submission of Matters to a Vote of Security Holders

No matters were submitted to a vote of our security holders during the fourth quarter ended December 31, 2002.

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PART II

Item 5.     Market for the Registrant’s Common Equity and Related Stockholder Matters

Market Prices for Common Stock

Our common stock is traded on the Nasdaq National Market System under the symbol “EGLS.” The following table sets forth for the periods indicated the actual high and low sales prices per share of common stock as reported on the Nasdaq National Market System:

On February 22, 2003, the closing price of our common stock was $1.18.

We have never declared or paid cash dividends on the shares of common stock and we do not anticipate paying cash dividends in the foreseeable future. We currently intend to retain any future earnings to fund the development and growth of our business. As of February 22, 2003, we had approximately 8,000 shareholders of record.

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Item 6.     Selected Financial Data

On December 3, 1999, the SEC Staff issued Staff Accounting Bulletin (SAB 101), “Revenue Recognition in Financial Statements.” The SEC Staff addressed several issues in SAB 101, including the timing for recognizing revenue derived from selling arrangements that involve contractual customer acceptance provisions and installation of the product if these events occur after shipment and transfer of title. In connection with our adoption of SAB 101, we recorded a non-cash charge of $2.0 million, or ($0.09) per diluted share, to reflect the cumulative effect of the accounting change as of the beginning of the fiscal year 2000. Our revenue recognition policies are disclosed in Note 1 to our Consolidated Financial Statements.