CREDENCE SYSTEMS CORP - 10-K Annual Report

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UNITED STATES

SECURITIES AND EXCHANGE COMMISSION

Washington, D.C. 20549

FORM 10-K

(Mark One)

ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 [NO FEE REQUIRED]

For

the fiscal year ended October 31, 2002

TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 [NO FEE REQUIRED]

For the transition period from to

0-22366

(Commission file number)

CREDENCE SYSTEMS CORPORATION

(Exact name of registrant as specified in its charter)

Delaware (State or other jurisdiction of incorporation or organization)		94-2878499 (I.R.S. Employer Identification No.)

215 Fourier Avenue, Fremont, California (Address of principal executive office)		94539 (Zip Code)

(510) 657-7400

(Registrant’s telephone number, including area code)

Securities registered pursuant to Section 12(b) of the Act:

Title of each class

None

Name of each exchange on which registered

None

Securities registered pursuant to Section 12(g) of the Act:

Common Stock, $0.001 par value

Preferred Stock Purchase Rights

Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. Yes x No ¨

Indicate by a check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of the registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K. x

Indicate by check mark whether the registrant is an accelerated filer (as defined in Rule 12b-2 of the Exchange Act). Yes ¨ No x

The aggregate market value of voting stock held by non-affiliates of the Registrant, as of April 30, 2002 was approximately $1,226,848,612 (based upon the closing price for shares of the Registrant’s common stock as reported by the Nasdaq National Market for the last trading date prior to that date). Shares of common stock held by each officer, director and holder of 5% or more of the outstanding common stock have been excluded in that such persons may be deemed to be affiliates. This determination of affiliate status is not necessarily a conclusive determination for other purposes.

On January 3, 2003, approximately 60,941,991 shares of the Registrant’s common stock, $0.001 par value, were outstanding.

DOCUMENTS INCORPORATED BY REFERENCE

Portions of the Registrant’s Proxy Statement for the 2003 Annual Meeting of Stockholders to be held on March 19, 2003 are incorporated by reference into Part III of this report. Except as expressly incorporated by reference, the Registrant’s Proxy Statement shall not be deemed to be a part of this report.

PART I

Item 1. Business

We design, manufacture, sell and service engineering validation test and automatic test equipment, or ATE, used for testing semiconductor integrated circuits, or ICs. We also develop, license and distribute software products that provide automation solutions in the design and test flow fields. We serve a broad spectrum of the semiconductor industry’s testing needs through a wide range of products that test digital logic, mixed-signal, system-on-a-chip, radio frequency, volatile, and static and non-volatile memory semiconductors. We utilize our proprietary technologies to design products which are intended to provide a lower total cost of ownership than many competing products currently available while meeting the increasingly demanding performance requirements of today’s engineering validation test and ATE markets. Our hardware products are designed to test semiconductors at two stages of their lifecycle; first, at the prototype stage and second, as they are produced in high volume. Our software products enable design and test engineers to develop and trouble shoot production test programs prior to fabrication of the device prototype. Collectively, our customers include major semiconductor manufacturers, fabless design houses, foundries and assembly and test services companies.

We were incorporated in California in March 1982 to succeed to the business of a sole proprietorship and were reincorporated in Delaware in October 1993. “Credence” or the “Company”, “we”, “us” and “our” refers to Credence Systems Corporation and our subsidiaries. Our principal executive offices are located at 215 Fourier Avenue, Fremont, CA 94539, and our telephone number is (510) 657-7400. Our worldwide website address is www.credence.com. “Credence Systems Corporation,” “Credence,” “IMS” “Fluence,” “SC,” “ValStar,” “Quartet,” “Quartet One,” “Octet,” “ Electra,” “Vanguard,” “Wavebridge,” “MemBIST,” “TDS,” “TDX,” “Triton,” “EPRO,” “BOST,” “MemBOST,” “Kalos,” “DUO,” “TMT,” “MVNA,” “Opmaxx,” “DirectTest” and “Virtual Test” are our trademarks. This Annual Report on Form 10-K also includes trademarks of other companies.

Background

The semiconductor industry’s successful production of increasingly smaller, faster and more sophisticated ICs has made semiconductor devices available for a wide range of applications. This trend, together with a continual drive to reduce production costs, has resulted in reduced average selling prices and semiconductor content growth in almost all appliances ranging from dishwashers to automobiles, cell phones to PDAs and laptops to servers. At the same time semiconductors have emerged as the building blocks of the communications, internet and telephony infrastructures. It has become increasingly important for semiconductor manufacturers to seek ways to reduce manufacturing costs while improving their time to volume production and profit.

The process of designing and manufacturing ICs is complex and capital-intensive, involving stages of design, prototype manufacture, engineering validation test of the prototypes, device manufacture and production test. Each stage in this process has come under pressure as integrated circuits have increased in complexity and speed. At the design stage, advances in electronic design automation, or EDA, software have allowed design engineers to work with integrated circuit designs at increasingly higher levels of abstraction, permitting engineers to design significantly more complex integrated circuits in less time. The ability to design more complex and capable circuits, together with advances in manufacturing processes, has resulted in an approximate doubling of chip speed and complexity every two years. However, as integrated circuits have become more complex and as device manufacturers have increasingly sought ways to introduce products to market more rapidly, critical limitations have become increasingly apparent in the IC design-to-production process flow.

Today, IC design and manufacturing is, to a large extent, a serial process that crosses organizational, functional and often geographical boundaries. In general, a design has to be complete before prototypes can be built; prototypes have to be built before they can be tested; and prototypes have to be production-ready before production test software can be debugged and refined. Production test software can take significant time to debug and refine, so the need to wait until a physical part has been produced to perform that process delays an

IC’s introduction to the market. Even then, test failures can raise the question of whether the IC itself is flawed, or the test has an error. In addition, an IC’s design may be so sophisticated that some or all of its functionality cannot effectively be tested. Designs that are discovered to be un-testable when produced require another iteration of the integrated circuit process flow. These challenges are further exacerbated within semiconductor manufacturers by traditional organizational boundaries where design responsibilities end at pre-silicon verification and ownership is transferred to test engineering to create suitable test programs to uncover faults that may occur in production and by the increased level of outsourcing which physically separates the design and test functions. Additionally, the process and technology used to develop and debug production test programs has often been inefficient and inadequate.

The equipment used in the engineering validation test stage has often been unable to effectively verify and characterize increasingly complex ICs. To perform specialized tests on prototypes, engineers turned to ATE machines to verify and characterize prototypes. However, ATE machines are designed for volume production testing and in many cases lack the flexibility or versatility to efficiently test whether, and within what limits, a given part works, or efficiently analyze why it fails to work.

Production testing is a principal element in the cost structure of semiconductors. Purchasers of production testers now examine more carefully the total cost of ownership of ATE comprising of the initial purchase price of the tester, as well as the tester’s reliability, flexibility, size, power and air conditioning requirements, upgradeability, maintenance costs and spare parts.

As assembly and packaging have become increasingly expensive compared with the cost of the semiconductor die, so that their costs may exceed the cost of the die itself, semiconductor manufacturers continue to shift performance testing increasingly toward wafer probe. By subjecting devices to performance testing earlier, defective die are detected and eliminated before assembly and packaging costs are incurred. This trend has imposed new demands on ATE. Wafer probe testing, where production testing may now occur, requires that the device under test be located in close physical proximity to the measuring circuits of the tester in order to minimize potential signal distortions that can negatively impact testing yields. Smaller testers can more easily be placed in close physical proximity to the circuits. In addition, wafer probe test typically occurs in a clean room where potential contaminants must be continually removed and temperatures kept constant. These special maintenance requirements make clean rooms expensive to operate. Smaller testers occupy less floor space and therefore assist in reducing clean room costs. In addition, smaller testers that consume less power generally have reduced air conditioning requirements.

There are two dominant process technologies used to develop the ICs used in ATE: emitter-coupled logic, or ECL, and complementary metal oxide semiconductor, or CMOS. Although CMOS technology allows higher functionality per chip and requires less power to operate, ATE based exclusively on CMOS technology has been limited by the inability of CMOS to meet the timing and measurement demands of semiconductor testing. Historically, although the speed of CMOS was acceptable, its timing stability was not. This problem results from the tendency of CMOS circuits to experience timing drift as a function of temperature and voltage variation during tests. To fully benefit from the economic and other advantages of CMOS technology, the challenge has been to control this drift characteristic in order to produce semiconductors for ATE that meet the performance requirements of semiconductor testing.

These technical, economic and market trends have created a significant need for an integrated design to production test flow that includes Built in Self Test, or BIST, circuitry, specialized engineering validation test products and high performance, cost effective ATE. Additionally, the market is requiring solutions that enable engineers to develop and debug production test software and ATE interface equipment, or fixtures, in parallel with the design and validation of integrated circuit prototypes to increase the process parallelism and improve device time to market.

The Credence Solution and Strategy

We provide high performance IC engineering validation test systems that address the engineering and production test requirements of increasingly complex devices. Our engineering validation test systems test logic devices, mixed-signal devices that combine both analog and digital functionality and memory devices. Our engineering validation test systems can also be used to test selected functions of highly integrated, or system-on-a-chip, or SoC, devices. By keeping pace with the industry’s advances in speed and pin count requirements, our solutions enable customers to reduce the time required for verification, characterization and failure analysis. This generally results in lower cost of design, reduced time-to-market and increased competitiveness for the companies designing today’s increasingly complex integrated circuits. Our validation systems give engineers a more flexible and cost-effective way to verify and characterize prototype integrated circuits and to perform failure analysis. Each validation system integrates the functions of a variety of individual test instruments into a

single system consisting of both hardware and software that offers increased verification and characterization performance with significant cost savings. Our engineering validation test technology allows our systems to send and receive data from an integrated circuit at the same speeds the circuit will experience in actual use. As a result, design and test engineers can better identify failures, assess areas of concern, run rapid diagnostic sequences to pinpoint the causes of failure and identify changes needed to correct design errors or weaknesses.

We have developed proprietary CMOS stabilization methods that minimize the drift characteristic of CMOS and enable us to produce ATE production test systems that are smaller and require less power than those based on ECL technology. These testers are intended to provide a lower total cost of ownership than many competing products currently available while meeting the performance demands of today’s ATE market. CMOS technology allows the circuits used in our testers to be reduced, or scaled down in size as IC process technology improves. This scalability feature enables us to develop and manufacture smaller, higher performance circuits for use in our testers at what we believe to be a lower cost, and with a potentially shorter development cycle, than traditional process technologies.

We believe our software solutions enable test engineers to develop, refine and debug production test software early in the IC design and production process, even before a prototype of the IC is produced. By allowing production test programs to be developed and debugged while the integrated circuit is being designed and validated, our software can significantly reduce the time required to introduce integrated circuits to market.

Our objective is to be the leading supplier of design through production test solutions. This includes high performance IC engineering validation test systems, cost-effective ATE for production testing of ICs used in high volume applications, and software solutions and other innovations to decrease the cycle time from circuit design to high volume manufacturing. Our business strategy incorporates the following key elements:

•

Maintain Technology Leadership. We believe that our proprietary CMOS stabilization technology enables the development of ATE that is designed to meet the performance and cost of ownership requirements of semiconductor manufacturers and assembly and test services companies. In addition, we believe the scalability of this technology will allow us to offer new products and enhancements in a potentially shorter time and at a lower cost than many of our competitors that base their products on traditional less-scalable architecture.

•

Provide Innovative Solutions to Test Increasingly Complex Devices. We intend to keep pace with rapid advances in integrated circuit design and test by introducing new engineering validation test systems and related software designed to test higher speed and higher pin count devices. We intend to continually enhance our existing systems to add valuable features and functions that meet our customers’ evolving needs.

•

Lower Total Cost of Ownership. We seek to provide ATE to our customers at a lower total cost of ownership than many competing products currently available while meeting the performance

requirements of our customers. We believe that the system price, reliability, flexibility, size, power and air conditioning requirements, upgradeability and maintenance costs, including spare parts, of our testers enable our customers to more cost effectively test ICs.

•

Provide Integrated Design to Production Test Solutions to Reduce Time-to-Market. We believe that our customers require increasing levels of sophisticated software tools to integrate the design to production test flow, assist in the utilization of ATE and minimize time-to-market. We currently are focusing our software efforts on internal development and acquisition of companies or businesses that develop such tools. Through our acquisition of Fluence Technology, Inc., or Fluence, and Integrated Measurement Systems, Inc., or IMS, we have acquired automatic test program development software, or TDS, and TDX product lines, analog design, optimization and fault analysis technology and BIST products. The acquisition of IMS added Virtual Test Software designed to develop and debug test programs and model the tester and test environment. We believe these acquisitions, and our new software product lines that integrate design and test, will enable us to capitalize on the Design-for-Test, or DFT, market.

•

Target Diverse, High-Volume Markets. Our products target the testing of digital logic, analog mixed-signal, SoC, memory and radio frequency devices that are used in a broad range of growing end-user market segments. Our products are designed to test semiconductors that are manufactured in high volume and are used in a variety of applications such as automobiles, appliances, personal computers, personal communications products, networking products, digital televisions and multimedia hardware and communications infrastructure.

•

Leverage Relationships with Industry Leaders to Enhance Market Position. We currently intend to continue to build close working relationship with integrated circuit manufacturers, EDA software vendors and ATE machine vendors to enhance our market position. Working closely with integrated circuit manufacturers helps us anticipate their needs and incorporate specific value-added functionality into our products. We believe our relationships with leading EDA software vendors allow us to design and offer products that can access the device models created with EDA software and effectively use this data to perform validation tests and debug and refine production test programs. Our relationships with several leading ATE vendors strengthen our ability to develop ATE machine simulations, and we believe these relationships have led to increased customer acceptance of our TDS and virtual test software products.

•

Worldwide Technical Support and Customer Service. As semiconductor manufacturers expand their operations worldwide, they require that their test suppliers have the capability to provide global support, service and training. To meet this requirement, we utilize a combination of direct sales, service and support personnel and a broad network of independent distributors located in close proximity to major customer sites. We and our distributors currently maintain locations throughout the world to service and support our customers.

Products

We currently offer a wide variety of products that test digital logic, analog, mixed-signal, SoC, dynamic random access memory, or DRAM, static random access memory, or SRAM, non-volatile or Flash memory and radio frequency wireless ICs. Digital logic semiconductors produce discrete on and off logical sequences that control functions, store data, retrieve data and move and manipulate data at high rates of speed. Analog semiconductors control external functions such as sound, graphics, and motor controls by producing continuous varying voltage or current signals. When these analog functions are combined onto a digital IC, the resulting device is considered a mixed-signal device and as the levels of integration increase, the circuit is termed an SoC device. For memory devices, DRAM loses data without power while non-volatile memory semiconductors retain their data when the power is turned off. RF wireless IC’s are the devices that receive, transmit and convert radio frequency signals typically used in cellular telephones and other communications devices.

Our CMOS-based ATE products—the SC, Quartet and Octet series—are designed to test high speed devices used in applications such as networking and personal computing as well as multimedia, digital television, high-

definition television and personal communications. Our memory product line, the Kalos Series, tests non-volatile memory, or NVM, devices, including ROM, EPROM, EEPROM and Flash memories, which are used in high volume applications in the consumer, automotive and telecommunications markets.

During fiscal 2002, we introduced five new products, or modifications to existing products. The Octet series high performance configurable SoC test platform retains compatibility with the earlier generation Quartet but provides twice the pin count with 1024 channels and four times the performance with 800Mb/sec data rates. The Octet is targeted toward high performance SoC devices. The ASL 3000 extends our ASL product line providing digital capability on the analog-focused product line. The ASL 3000 is targeted toward cost-sensitive mixed signal applications. To address the high performance, low cost RF IC market, we introduced the ASL 3000RF, which incorporates our proprietary Modulated Vector Network Analyzer, or MVNA technology. In the engineering validation market, we introduced the Gemini MS product that combines digital performance with new analog measurement technologies. Adding to our design to test portfolio, we introduced a new version of our Test Developer product with improved cyclization and software algorithms.

In January 2003, we announced the acquisition of substantially all of the assets of SZ Testsysteme AG and SZ Testsysteme GmbH. The Credence-SZ division will operate with approximately 135 contracted personnel from a facility located in Amerang, Germany and focus on the advanced analog, power automotive, and communications markets.

In November 2002, we announced the planned sale of our subsidiary, Dimensions Consulting Inc., or DCI. DCI has approximately 15 employees and specializes in providing interface solutions for the semiconductor test and development market through its high-performance ATE board designs and test socket systems. We anticipate that the transition will be consummated during the first fiscal quarter of 2003.

In November 2002, we announced the planned acquisition of Optonics, Inc, or Optonics. Optonics, headquartered in Mountain View, California, is a leading technology supplier of integrated solutions for emission-based optical diagnostics and failure analysis. Optonics has approximately 36 employees and the acquisition closed on January 22, 2003.

During fiscal 2001 we acquired DCI, the principal assets of Rich Rabkin & Associates, Inc., or Rabkin, and IMS. DCI specializes in providing interface solutions for the semiconductor test and development market through ATE board design and test socket systems. Rabkin specializes in providing interface solutions and test head positioning devices for the semiconductor test market through its patented solution for high parallel memory testing. DCI and Rabkin were integrated into our Memory Products Division to offer test solutions that we believe increase manufacturing efficiencies and provide faster time to market for our customers. IMS designs, manufactures, markets and services high-performance engineering validation test systems. These systems are used to test, at the prototype stage, complex digital, mixed-signal and memory devices. In addition, IMS develops, markets and supports a line of virtual test software that we believe enables design and test engineers to develop and debug production test software prior to fabricating the prototype of the actual device. During fiscal 2001, we merged our wholly owned subsidiary, Fluence, into IMS. During fiscal 2002, we merged IMS into the Company.

During fiscal 2000 we acquired TMT, Inc., Modulations Instruments, Inc., or MI, and NewMillennia Solutions, Inc., or NMS. The TMT product line includes the ASL 1000, targeted at testing analog function ICs,

and the RFx, targeted at testing RF wireless ICs. During fiscal 2000 we introduced the ASL 2000 targeted at testing many analog devices in a multisite mode as well as providing significant expansion capability for our customers in the future. MI provides test solutions for the design and manufacturing of RF semiconductor and wireless infrastructure component markets. MI holds proprietary intellectual property for performing S-Parameter measurements using complex modulated signals. Our Modulated Vector Network Analyzer, or MVNA technology allows accurate measurement of devices stimulated with signals matching their end-use operating environment.

The following table sets forth our current product offerings, their features and examples of typical devices tested by each product. Included in some of the basic features are the anticipated cycle speed in megahertz, timing accuracy in either picoseconds (ps) or nanoseconds (ns), the number and characteristics of the pins and the density, in megabits(Mb), of the device that can be tested:



Product	Series	Models	Market and Basic Features	Typical Devices Tested

Digital	SC	SC312 SC Micro	ATE: 50-100 MHz 64-304 Pins + 350-500 ps accuracy	Microcontrollers, ASSPs, DSPs and FPGAs

	IMS Vanguard	300 500 550	Engineering validation test: Up to 1Gbs +/- 200 ps accuracy 16-512 Pins	Microprocessors, -Network Processors, Chipsets, ASICs, Multi-Chip Modules

SoC, Mixed-Signal	Octet	Octet 400 Octet 800	ATE: 1024 digital pins 400-800 Mbs +/- 150 ps accuracy Analog, Video, Audio	Multimedia devices, mass storage, DSPs, ASICs, Datacom and specialty devices, mobile communication devices, complex audio devices

	Quartet	One	ATE: 512 digital pins 200 MHz +/- 175 ps accuracy Analog, Video, Audio	Multimedia devices, mass storage, DSPs, ASICs, Datacom and specialty devices, mobile communication devices, complex audio devices

	ASL	ASL 3000	ATE: Up to 32 analog instruments with expansion for up to 64 pins of digital and DSP instruments.	Personal communications, A/D and D/A converters as well as multi-site test of traditional linear devices

	IMS Electra	Electra, Electra MX	Engineering validation test: 16-576 digital pins 200 MHz Digital 2.4GHz Analog	High pin count SoC’s, A/D and D/A converters, PLL’s

	IMS Gemini	Gemini MS	Engineering validation test: 336 digital pins 330 MHz Digital 2.4GHz Analog

Memory	KALOS	Kalos, Kalos xw, Kalos (xp), Personal Kalos	ATE: 50/70 MHz Up to 1G fail memory +/- 1ns Accuracy	Flash memories, EEPROM, EPROM, MROM, Microcontrollers and NVM ASICs

	IMS Orion	Orion	Engineering validation test: 200MHz 48-80 Pins 1 Gbit fail memory	SRAM, DRAM, Rambus

Analog Test Products	ASL	ASL 1000	ATE: Up to 19 analog instruments with 32 14MHz digital pins	Analog or Linear IC such as battery power management IC. Traditional linear devices such as Op-Amps, comparators and regulators



Product	Series	Models	Market and Basic Features	Typical Devices Tested

Radio Frequency (RF) Wireless	RFx	RFx	ATE: Up to 8 ports of 6GHz RF with Analog and digital instruments.	Wireless communications IC such as Power amplifiers (PAs), Low Noise Amplifiers, Mixers and synthesizers

	ASL	ASL 3000RF	ATE: Up to 8 ports of 6GHz RF with Analog and digital instruments. MVNA technology	Wireless communications IC such as PAs, Low Noise Amplifiers, Mixers and synthesizers. Bluetooth, CDMA, GSM, and 802.11 WLAN compatible devices

Software	Design to Test	Test Developer	Generates tester specific files from simulation (EDA) files. Verifies timing specification	Tools apply to digital logic circuits

	Design to Test	Virtual Test	Accelerates the development and debug of test programs	Tools apply to digital logic devices

	Design to Test	MS BIST	BIST generation for digital, analog and mixed-signal devices	Tools apply to analog, high-speed digital and mixed-signal devices

Digital Products

SC. In fiscal 1997, we expanded the SC series by introducing and shipping the SC 312, which runs at a higher speed (100 MHz) and has improved accuracy over its predecessor, the SC 212. The SC Micro is a cost-reduced version of the SC 312. This system offers our customers a full capability test system at a price currently below $2,000 per digital pin channel. This per channel price has previously been available only in test systems with reduced functionality-requiring users to compromise the quality of their device testing. The SC Micro retains the customer’s test quality while lowering its test costs. The purchase price of these testers typically ranges from $200,000 to $500,000 depending upon configuration.

IMS Vanguard. The IMS Vanguard, our flagship engineering validation test product introduced by IMS in 1999, can send and receive data from integrated circuits under test at up to 1 Gbs and accounted for the majority of logic family sales in 2002. The logic engineering validation test system family includes the Vanguard 500, 330 and most recently introduced 550. The IMS Vanguard systems sell for between $0.7 million and $2.3 million depending on configuration.

SoC and Mixed-Signal Products

Octet. Octet is our latest generation, high performance SoC configurable test platform. Introduced in July 2002 and first shipped in October 2002, the product is currently being evaluated by a small number of customers. No revenue has yet been recorded for this product. Octet targets high performance SoC chips used in chipsets, graphics, audio, video, mass storage and wireless baseband markets. Featuring up to 1024 digital pins and a selection of high performance analog instruments, the Octet is a production ready, high performance tester and meets the market requirements for low cost of test. Prices range from $1.0 million to $2.5 million depending on configuration.

Quartet. Quartet is our high performance mixed-signal product series. The Quartet One was introduced in 1998 and started shipping in early fiscal 1999. Quartet builds on the Duo series by addressing the needs of device manufacturers serving the consumer mixed-signal, or CMS, marketplace. CMS devices combine the power of digital processors with CD quality audio, broadcast video and wireless communications onto a single, cost

sensitive SoC. The Quartet One, the first of the Quartet series, addresses all four of these requirements in an integrated, ready for volume production package. With 200 MHz digital, 20 bit audio and 300 MHz video, Quartet One is designed to meet the demands of the most complex SoC devices. With typical system prices between $0.5 million and $1.5 million depending on configuration, the Quartet provides a low cost of test required by the CMS market.

ASL 3000. Introduced in fiscal 2002, the ASL 3000 is an extension of the ASL product line featuring an increased number of mixed signal instruments, expansion to 64 pins of digital capability, and DSP based mixed signal test. The ASL 3000 is capable of testing more complex devices and more devices in parallel and targets a wide range of ICs used in personal communications. The purchase price of the ASL 3000 ranges from $150,000 to $350,000 depending on configuration.

IMS Gemini MS. Our mixed-signal engineering validation test systems are used by customers to verify the designs of complex integrated circuits containing both digital and analog functionality. These mixed-signal integrated circuits are used in applications such as cellular phones, internet appliance, set top boxes and cable modems. The IMS Gemini MS is also used to test selected functions of highly-integrated, or system-on-chip, designs. Depending on configuration, the system can send and receive data from integrated circuits under test at up to 330 MHz. The IMS Gemini MS sells for between $0.7 million and $1.5 million depending on configuration.

IMS Electra. The Electra system can send and receive data from integrated circuits under test at up to 200 MHz. Our Electra series includes the Electra, which can test mixed-signal integrated circuits with up to 224 pins, and the Electra MX, which can test mixed-signal integrated circuits with up to 576 pins. Our Electra series systems sell for between $0.3 million and $2.1 million.

Memory Products

Kalos. Introduced in November 1997, the Kalos is a highly integrated, parallel system designed to test flash memory. Running at 50 MHz, it provides multi-site testing and is designed to lower the customer’s cost of test. The Kalos features a unique tester-on-a-card architecture, which places all test functions for each site on a single card and thus reduces floor space and power consumption while increasing performance. The typical purchase price of the Kalos ranges from $0.4 million to $1.2 million depending on configuration.

Kalos (xp). Introduced in fiscal 1999, the Kalos (xp) is based upon the Kalos tester. The Kalos (xp) features a wider, 96 pin test site enabling testing of high pin count NVM and flash memory core microcontroller devices. Kalos (xp) provides up to eight site-in-parallel test capabilities in a small footprint tester package.

Kalos xw. Introduced in fiscal 2000, the Kalos _XW is based upon the Kalos tester and features 32 test sites, twice as many test sites as the standard Kalos system.

Personal Kalos. Personal Kalos is a desktop engineering version of the high-throughput Kalos tester. The typical price for a Personal Kalos ranges from $50,000 to $120,000 depending on configuration.

IMS Orion. The IMS Orion is used by our customers to verify the designs of the most common types of memory integrated circuits, including complex SRAMs and DRAMs. The IMS Orion will send and receive data from integrated circuits under test at speeds up to 200 MHz/400 Mbs. Depending on configuration, these memory validation systems sell for between $400,000 and $600,000.

Analog Test Products

The acquisition of TMT in fiscal 2000 extended the market that we serve to include analog dominant ICs that are made up of traditional analog function blocks such as amplifiers, regulators, switches and converters.

The ASL product line tests these traditional devices either as individual ICs or as larger function ICs such as battery power management devices in portable electronics devices.

ASL 1000. The ASL 1000 was introduced in fiscal 1996. This system is highly configurable and targeted at testing the traditional analog building block ICs. As the traditional analog or linear device manufactures move to more efficient manufacturing, the multi-site test capability of the ASL 1000 has proven to be very effective at reducing their cost of test. The purchase price of the ASL 1000 ranges from $90,000 to $250,000 depending on configuration.

RF Wireless Test Products

Our RF wireless test products provide tools to IC manufacturers for use in characterization and production test of high performance, cost sensitive RF devices.

ASL 3000RF. Introduced in early 2002 and first shipped in May 2002, the ASL 3000RF extends the ASL 3000 product line by incorporating proprietary MVNA technology to test RF devices. No revenue has yet been recorded for this product. The ASL 3000RF is targeted at cost effective testing of RF front-end devices that are typically manufactured using Gallium Arsenide, or GaAs, Bi-polar or Bi-CMOS technology. The devices, Power Amplifiers, or PAs, Low Noise Amplifiers, or LNAs, Synthesizers, Mixers and Switches and integrated combinations of these, or Base band chips, are used in both digital and analog cell phones. Providing capability to test devices compliant with Bluetooth and 802.11 standards, the ASL 3000RF delivers high performance, high throughput and leading cost of test economics. Prices range from $400,00 to $750,000 depending on configuration.

RFx. The RFx, a product acquired through the TMT acquisition, was first introduced in fiscal 1998 and is made up of specialized RF test instruments combined with the analog instrumentation of the ASL product line. The RF instruments are capable of testing up to 6GHz in either the scalar or vector method of testing RF parameters The purchase price of the RFx typically ranges from $400,000 to $750,00 depending on configuration.

Software Products

Our software products for IC manufacturers and test and assembly contractors help create detailed tests to ensure product quality and shorten time-to-market.

TestDeveloper. This product simplifies the complex SoC test program development task for the semiconductor industry by taking waveform data from simulator-specific representations in the design environment, analyzing this data and then transforming the data into specific tester environments to be used in either device verification or production test. TestDeveloper connects design to test by interfacing to commonly used design simulators, and by offering numerous TesterBridge modules available for a variety of ATE models.

VirtualTest Software. To address the need for shorter test development times and lower cost, this product accelerates the development and debug of a test program, creates a model of the test environment, develops and tests fixtures and documents the entire test process. VirtualTest Software simulates the ATE environment enabling test engineers to develop and debug test programs in parallel with the design, prototype manufacturing and engineering validation test processes. With VirtualTest Software, test development work can begin before the device design is completed.

MSBIST. The mixed-signal built-in self-test product line generates on-chip testing of analog-to-digital converters, digital-to-analog converters and high precision jitter measurements for advanced devices by inserting proprietary test techniques into the design before it is manufactured.

Customers, Markets and Applications

We target digital logic, analog, mixed-signal, dynamic random access memory, non-volatile memory device, RF and SoC manufacturers that serve a broad range of growing end-user market segments. Our customers design, manufacture and test semiconductors in high volume for use in applications such as automobiles, appliances, personal computers, personal communications products, networking products, digital televisions, wireless LAN and multimedia hardware.

In addition to marketing our products to major semiconductor manufacturers, we have developed relationships with numerous assembly and test services companies. Semiconductor manufacturers and fabless semiconductor companies utilize these subcontractors as a means of lowering their fixed production costs, thus minimizing the effects of cyclicality inherent in the semiconductor industry. As a result, these assembly and test services companies are an increasingly important segment of the ATE market.

We believe that our success depends in large part upon the success of our major customers. The loss of, or any reduction in, orders by a significant customer (including the potential for reductions in orders by assembly and test services companies which that customer may utilize), including reductions due to market, economic or competitive condition in the semiconductor industry or in other industries that manufacture products utilizing semiconductors has materially adversely affected, and may continue to materially adversely affect our business, financial condition or results of operations. Our ability to increase sales in the future will depend in part upon our ability to obtain orders from new customers as well as upon the financial condition and success of our customers and the general global economy. There can be no assurance that our sales will not decrease in the future or that we will be able to retain existing customers or to attract new ones.

For information on our geographic data and major customers, see Note 4 to the Consolidated Financial Statements included elsewhere herein. Our international sales are primarily denominated in United States dollars. We anticipate that our international business will continue to account for a significant portion of net sales in the foreseeable future.

We schedule production of our systems based upon order backlog and order forecast. We include in our backlog only those customer orders for systems (including upgrades) for which we have accepted purchase orders and assigned shipment dates in approximately the following six months. Substantially all of our orders are subject to cancellation or rescheduling by the customer with limited or no penalties. Our backlog at any particular date may not necessarily be representative of actual sales for any succeeding period due to orders received for systems to be shipped in the same quarter, possible changes in system delivery schedules, cancellation of orders and potential delays in system shipments. As of October 31, 2002, our order backlog for systems, exclusive of orders for software, spare parts, service and support, was approximately $51.2 million plus an additional $9.4 million of deferred revenue under Staff Accounting Bulletin 101, or SAB 101, as compared with $33.5 and $20.5 million, respectively, as of October 31, 2001. During fiscal years 2001 and 2002, we experienced order cancellations and customer-requested shipment delays in connection with the cyclical downturn in the semiconductor industry. We believe it is probable that order cancellations and customer-requested shipment delays will continue to occur in the future.

Sales, Service and Support

We currently market and sell our products in the United States principally through our direct sales organization, with direct sales employees and representatives in over 14 locations. Outside the United States, we utilize both direct sales employees and a broad network of distributors, with direct sales employees and distributors in over 18 countries. Shipments through distributors represented approximately 35%, 44%, and 54% of net sales during fiscal years 2002, 2001, and 2000, respectively.

Our distributors and we have sales and support centers located in the United States, Europe, Israel, and throughout Asia from which both direct Credence personnel and independent sales and service representatives

sell and support our products. We believe that field support is critical to our customers. Support encompasses many of the components of the total cost of ownership for test equipment. We seek to develop long-term relationships with major customers through extensive support consisting of teams of professional sales, applications, training and service personnel. These personnel are located in close physical proximity to key customer sites in order to provide the required support in a timely fashion. The sales process includes consultations with customers to help them purchase the most cost-effective equipment for their needs, to help develop custom test programs to optimize production throughput, to assist in long-term self-sufficiency through training of customer test engineering personnel and to provide the service capacity and preventive maintenance to reduce downtime for customers’ systems. Customer support includes field personnel and in-house applications personnel who work closely with design engineering groups to modify existing equipment to meet the latest performance requirements.

In fiscal 2002 we combined our separate Japan operations under our joint venture with Innotech Corporation. Both companies originally formed this joint venture in 1997 to engage in the customization and manufacture of ATE products for sale in Japan. In March 1996, we established a service and support subsidiary in Korea. We also have a relationship with Itek, Inc., a distributor of our products in Korea.

In fiscal 2000 we purchased our European distribution companies from their owner-managers. These subsidiaries provide sales, support and services to our customers in Europe and Israel.

We have an agreement with a non-related leasing company. In addition to leasing and financing activities, we also provide certain remarketing services to customers through such company. We have issued a guaranty in favor of a bank with respect to certain obligations of the leasing company to the bank. Under this agreement, the leasing company agreed to grant to us a security interest to secure the obligations of the leasing company as a result of any payments by us pursuant to the guaranty. At October 31, 2002 and 2001, the outstanding amount of debt of the leasing company subject to our guaranty was $5,000,000 and $8,750,000, respectively.

Our standard policy is to warrant our new systems against defects in design, materials and workmanship for one year for parts and labor. We offer customers additional support after the warranty period in the form of maintenance contracts for specified time periods. Such contracts include various options such as board replacement, priority response, planned preventive maintenance, scheduled one-on-one training, daily on-site support and monthly system and performance analysis.

Research and Development

The engineering validation test and ATE markets are subject to rapid technological change and new product introductions. Our ability to be competitive in this market will depend in significant part upon our ability to successfully develop and introduce new products, enhancements and related software tools on a timely and cost-effective basis. This will enable customers to integrate such products into their operations as they begin volume manufacturing of the next generation of semiconductors.

We have pursued a technology acquisition strategy to complement our internal research and development efforts, including:

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in 1988, we completed the acquisition of Axiom Technology Corporation, which added mixed-signal testing capability;

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in 1989, we completed the acquisition of ASIX Systems Corporation, which added one of our proprietary CMOS stabilization methods;

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in 1990, we acquired the STS Division of Tektronix Inc., which added a second proprietary CMOS stabilization method;

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in 1993, we acquired various patents from Tektronix;

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in March 1995, we acquired EPRO, which added non-volatile memory testing capability;

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in July 1997, we acquired, through our subsidiary Fluence, specified assets and assumed specified liabilities of Test Systems Strategies, Inc., a wholly owned subsidiary of Summit Design, Inc.;

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in August 1997, we acquired through Test Systems Strategies fault simulation and test program development products of Zycad;

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in June 1998, we purchased specified assets from Heuristics Physics Labs (HPL) which added memory BIST design and test applications capability;

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in September 1999, we acquired Opmaxx through Fluence, which added analog design optimization and fault analysis technology and BIST products;

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in May 2000, we acquired TMT, which added lower-end analog and mixed signal testing capability, particularly in the communications segment;

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in August 2000, we acquired MI, which added radio frequency test technology;

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in October 2000, we acquired NMS, which provides test strategies and products including native test environments and targeted design for test techniques;

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in January 2001, we acquired DCI, which provides interface solutions for the semiconductor test and development market through ATE board designs and test socket systems;

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in February 2001, we acquired the principal assets of Rabkin, which provides interface solutions and test head positioning devices for the semiconductor test market through patented solutions for high parallel memory testing;

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in August 2001, we acquired IMS, which designs, manufactures, markets and services high-performance integrated circuit engineering validation test systems. These systems are used to test, at the prototype stage, complex digital, mixed-signal and memory devices;

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during fiscal 2001, we merged our wholly-owned subsidiary, Fluence, into IMS;

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during fiscal 2002, we merged our wholly-owned subsidiary IMS into the Company;

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in November 2002, we announced the planned acquisition of Optonics, which will add emission-based optical diagnostics and failure analysis products. This transaction closed in January 2003;

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in November 2002, we announced the planned sale of DCI; and

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in January 2003, we purchased substantially all of the assets of SZ Testsysteme AG and SZ Testsysteme GmbH.

Each of the CMOS stabilization methods we acquired provides a different solution to the tendency of CMOS to experience timing drift as a function of temperature and voltage variation. The first proprietary solution uses a timing phase detection circuit combined with a voltage control mechanism to compensate for thermal, voltage and process drift. The second uses a unique combination of counters and heating circuits to provide stability through thermal means. These methods allow our CMOS-based ICs to achieve the timing repeatability necessary to meet the performance requirements of ATE and to realize the economic and other advantages of CMOS technology over ECL technology. CMOS circuits use less space than those based on ECL as the circuits require less power and can be more closely packed together. In addition to these acquired stabilization methods, we have also developed and continue to develop new and/or improved stabilization techniques for our tester products.

During the past two fiscal years, we developed the Octet, a configurable SoC platform targeted at the high performance, high volume production SoC market. Incorporating greater digital capability and testing at increased data rates, the Octet is our flagship production test product. We will continue to focus research and development efforts on the Octet product line to ensure that our products have the ability to efficiently test state-of-the-art customer devices which combine analog, high speed digital logic, and memory on a single IC.

Our ongoing research and development efforts also include focusing on increased cycle speed, accuracy and pin counts of our testers. In addition, we are working on a software development program that is intended to provide for upward compatibility through our products. We will also continue to focus efforts on providing software solutions that allow more rapid, cost-effective development of ATE test programs that reduce time-to-market of customer integrated circuit designs. We currently intend to continue to invest significant resources in the development of new products and enhancements for the foreseeable future.

Research and development expenses were $85.4 million in fiscal 2002, $86.4 million in fiscal 2001, and $77.9 million in fiscal 2000 (excluding $11.8 million charged for acquired in-process research and development, or IPR&D).

Proprietary Rights

We currently hold 134 United States patents, which expire over time through January 2021. In addition, we currently have 46 foreign patents, which expire over time through January 2017. The two United States patents, acquired from ASIX and Tektronix, underlying our proprietary CMOS stabilization methods expire in February 2007 and December 2007, respectively. From time to time we grant licenses under our patents and technology and receive licenses under patents and technology of others.

In 1993, we granted a license to Tektronix with respect to patents obtained in the acquisition of the STS Division of Textronix, and certain other intellectual property rights, the Tektronix Rights, including a patent covering one of our proprietary CMOS stabilization technologies, that were assigned to us by Tektronix in 1993. Tektronix has a worldwide, perpetual, irrevocable, non-exclusive, royalty free, fully-paid, sublicensable and transferable license to the Tektronix Rights. Tektronix may not grant rights under the Tektronix Rights to make, use, sell or otherwise distribute ATE for testing ICs to any entity other than a Tektronix joint venture affiliate and to a successor-in-interest to Tektronix. Tektronix may not grant or assign such rights to any other party that is a Credence competitor. In addition, Tektronix may not knowingly sell components incorporating the Tektronix Rights to any other party. We and Tektronix have granted to each other a worldwide, perpetual, irrevocable, non-exclusive, royalty free, fully-paid, sublicensable and transferable license to all improvements, enhancements, modifications or derivative works created before August 1996, or the Improvements, of intellectual property that was licensed or assigned pursuant to a Technology Agreement dated December 31, 1990, as amended on August 12, 1993, including the Tektronix Rights, to make, use and sell ATE for testing ICs. Tektronix’s license to the Improvements is subject to the same restrictions as its license to the Tektronix Rights.

We attempt to protect our intellectual property rights through patents, copyrights, trademarks and maintenance of trade secrets and other measures. There can be no assurance that others will not independently develop equivalent intellectual property or that we can meaningfully protect our intellectual property. There can be no assurance that any patent we own will not be invalidated, circumvented or challenged, that the rights granted thereunder will provide competitive advantages to us or that any of our pending patent applications will be issued. Furthermore, there can be no assurance that others will not develop similar products, duplicate our products or design around the patents owned by us. In addition, litigation has been and may continue to be necessary to enforce our patents and other intellectual property rights, to protect our trade secrets, to determine the validity and scope of the proprietary rights of others, or to defend against claims of infringement or invalidity. In addition, from time to time we encounter disputes over rights and obligations concerning intellectual property. We cannot assume that we will prevail in any such intellectual property disputes. For additional information with respect to our intellectual property, review the information set forth under “Risk Factors—If the protection of proprietary rights is inadequate, our business could be harmed” and “—Our business may be harmed if we are found to infringe proprietary rights of others.”

Manufacturing and Suppliers

Our manufacturing objective is to produce engineering validation test systems and ATE that conforms to our customers’ requirements at the lowest commercially practical manufacturing cost. We rely on outside vendors to manufacture certain components and subassemblies including several custom integrated circuits. We seek to manage our inventory levels through agreements with both suppliers and subcontractors that provide just-in-time delivery of these components and subassemblies. We assemble these components and subassemblies to create finished testers in the configuration specified by our customers. In general, we use standard components and prefabricated parts available from numerous suppliers. However, some components and subassemblies necessary for the manufacture of our testers are obtained from a sole supplier or a limited group of suppliers and we are in the process of qualifying a second source for some of those components. There can be no assurance that such alternative source will be qualified or available. Our reliance on a sole or a limited group of suppliers and on outside subcontractors involves certain risks, including a potential inability to obtain an adequate supply of required components, and reduced control over pricing and timely delivery of components. See “Risk Factors—There are limitations on our ability to find the supplies and services necessary to run our business.”

Competition

The ATE industry is intensely competitive. We face substantial competition throughout the world, primarily from ATE manufacturers located in the United States, Europe and Japan, as well as from some of our customers. Our competitors in the digital semiconductor testing market include:

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Advantest Corp.;

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Agilent Technologies, Inc.;

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Ando Electric Co. Ltd.;

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LTX Corp.;

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NPTest, Inc.; and

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Teradyne, Inc.

the mixed-signal and analog semiconductor testing market our competitors include:

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Advantest Corp.;

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Agilent Technologies, Inc.;

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Eagle Test Systems, Inc.;

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LTX, Corp.;