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UNITED STATES
SECURITIES AND EXCHANGE COMMISSION
Washington, D.C. 20549

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FORM 10-K

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(Mark One)

[X] ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE
ACT OF 1934 [NO FEE REQUIRED]

For the fiscal year ended October 31, 2001

OR

[_] TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES
EXCHANGE ACT OF 1934 [NO FEE REQUIRED]

For the transition period from ______________ to ________________

0-22366
(Commission file number)

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CREDENCE SYSTEMS CORPORATION
(Exact name of registrant as specified in its charter)

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Delaware 94-2878499
(State or other (I.R.S. Employer
jurisdiction Identification No.)
of incorporation or
organization)

215 Fourier Avenue, 94539
Fremont, California (Zip Code)
(Address of principal
executive office)

(510) 657-7400
(Registrant's telephone number, including area code)

Securities registered pursuant to Section 12(b) of the Act:

Title of each class Name of each exchange on
None which registered
None

Securities registered pursuant to Section 12(g) of the Act:

Common Stock, $0.001 par value
Preferred Stock Purchase Rights

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Indicate by check mark whether the registrant (1) has filed all reports
required to be filed by Section 13 or 15(d) of the Securities Exchange Act of
1934 during the preceding 12 months (or for such shorter period that the
registrant was required to file such reports), and (2) has been subject to such
filing requirements for the past 90 days. Yes [X] No [_]

Indicate by a check mark if disclosure of delinquent filers pursuant to Item
405 of Regulation S-K is not contained herein, and will not be contained, to
the best of the registrant's knowledge, in definitive proxy or information
statements incorporated by reference in Part III of this Form 10-K or any
amendment to this Form 10-K. [_]

The aggregate market value of voting stock held by non-affiliates of the
Registrant, as of January 3, 2002 was approximately $1,260,833,000 (based upon
the closing price for shares of the Registrant's common stock as reported by
the Nasdaq National Market for the last trading date prior to that date).
Shares of common stock held by each officer, director and holder of 5% or more
of the outstanding common stock have been excluded in that such persons may be
deemed to be affiliates. This determination of affiliate status is not
necessarily a conclusive determination for other purposes.

On January 3, 2002, approximately 60,326,952 shares of the Registrant's
common stock, $0.001 par value, were outstanding.

DOCUMENTS INCORPORATED BY REFERENCE

Portions of the Registrant's Proxy Statement for the 2001 Annual Meeting of
Stockholders to be held on March 20, 2002 are incorporated by reference into
Part III.

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PART I

Item 1. Business

Credence Systems Corporation designs, manufactures, sells and services
engineering validation test and automatic test equipment, or ATE, used for
testing semiconductor integrated circuits, or ICs. We also develop, license and
distribute software products that provide automation solutions in the design
and test flow fields. We serve a broad spectrum of the semiconductor industry's
testing needs through a wide range of products that test digital logic,
mixed-signal, system-on-a-chip, radio frequency, volatile, static and
non-volatile memory semiconductors. We utilize our proprietary technologies to
design products which are intended to provide a lower total cost of ownership
than many competing products currently available while meeting the increasingly
demanding performance requirements of today's engineering validation test and
ATE markets. Our hardware products are designed to test semiconductors at two
stages of their lifecycle; first, at the prototype stage and second, as they
are produced in high volume. Our software products enable design and test
engineers to develop and trouble shoot production test programs prior to
fabrication of the device prototype. Collectively, our customers include major
semiconductor manufacturers, fabless design houses, foundries and assembly and
test services companies.

We were incorporated in California in March 1982 to succeed to the business
of a sole proprietorship and were reincorporated in Delaware in October 1993.
"Credence" or the "Company", "we," us" and "our" refers to Credence Systems
Corporation and our subsidiaries. Our principal executive offices are located
at 215 Fourier Avenue, Fremont, CA 94539, and our telephone number is (510)
657-7400. Our worldwide website address is www.credence.com. "Credence Systems
Corporation," "Credence," "IMS" "Fluence," "SC," "ValStar," "Quartet," "Quartet
One," " Electra," "Vanguard," "Wavebridge," "MemBIST," "TDS," "TDX," "Triton,"
"EPRO," "BOST," "MemBOST," "Kalos," "DUO," "TMT," "MVNA," "Opmaxx,"
"DirectTest" and "Virtual Test" are our trademarks. This Annual Report on Form
10-K also includes trademarks of other companies. "Matrix Test" is a trademark
of Amkor Technology, Inc.

Background

The semiconductor industry's successful production of increasingly smaller,
faster and more sophisticated ICs has made semiconductor devices available for
a wide range of applications. This trend, together with a continual drive to
reduce production costs, has resulted in reduced average selling prices and
semiconductor content growth in almost all appliances ranging from dishwashers
to automobiles, cell phones to PDAs and laptops to servers. At the same time
semiconductors have emerged as the building blocks of the communications,
internet and telephony infrastructures. It has become increasingly important
for semiconductor manufacturers to seek ways to reduce manufacturing costs
while improving their time to volume production and profit.

The process of designing and manufacturing integrated circuits is complex
and capital-intensive, involving stages of design, prototype manufacture,
engineering validation test of the prototypes, device manufacture and
production test. Each stage in this process has come under pressure as
integrated circuits have increased in complexity and speed. At the design
stage, advances in electronic design automation, or EDA, software have allowed
design engineers to work with integrated circuit designs at increasingly higher
levels of abstraction, permitting engineers to design significantly more
complex integrated circuits in less time. The ability to design more complex
and capable circuits, together with advances in manufacturing processes, has
resulted in an approximate doubling of chip speed and complexity every two
years. However, as integrated circuits have become more complex and as device
manufacturers have increasingly sought ways to introduce products to market
more rapidly, critical limitations have become increasingly apparent in the
integrated circuit design-to-production process flow.

Today, IC design and manufacturing is, to a large extent, a serial process
that crosses organizational, functional and often geographical boundaries. In
general, a design has to be complete before prototypes can be

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built; prototypes have to be built before they can be tested; and prototypes
have to be production-ready before production test software can be debugged and
refined. Production test software can take significant time to debug and
refine, so the need to wait until a physical part has been produced to perform
that process delays an integrated circuit's introduction to the market. Even
then, test failures can raise the question of whether the integrated circuit
itself is flawed, or the test has an error. In addition, an IC's design may be
so sophisticated that some or all of its functionality cannot effectively be
tested. Designs that are discovered to be un-testable when produced require
another iteration of the integrated circuit process flow. These challenges are
further exacerbated within semiconductor manufacturers by traditional
organizational boundaries where design responsibilities end at pre-silicon
verification and ownership is transferred to test engineering to create
suitable test programs to uncover faults that may occur in production and by
the increased level of outsourcing which physically separates the design and
test functions. Additionally, the process and technology used to develop and
debug production test programs has often been inefficient and inadequate.

The equipment used in the engineering validation test stage has often been
unable to effectively verify and characterize increasingly complex ICs. To
perform specialized tests on prototypes, engineers turned to ATE machines to
verify and characterize prototypes. However, ATE machines are designed for
volume production testing and in many cases lack the flexibility or versatility
to efficiently test whether, and within what limits, a given part works, or
efficiently analyze why it fails to work.

Production Testing is a principal element in the cost structure of
semiconductors. Purchasers of production testers--ATE--now examine more
carefully the total cost of ownership of ATE comprising of the initial purchase
price of the tester, as well as the tester's reliability, flexibility, size,
power and air conditioning requirements, upgradeability, maintenance costs and
spare parts.

As assembly and packaging have become increasingly expensive compared with
the cost of the semiconductor die, so that their costs may exceed the cost of
the die itself, semiconductor manufacturers continue to shift performance
testing increasingly toward wafer probe. By subjecting devices to performance
testing earlier, defective die are detected and eliminated before assembly and
packaging costs are incurred. This trend has imposed new demands on ATE. Wafer
probe testing, where production testing may now occur, requires that the device
under test be located in close physical proximity to the measuring circuits of
the tester in order to minimize potential signal distortions that can
negatively impact testing yields. Smaller testers can more easily be placed in
close physical proximity to the circuits. In addition, wafer probe test
typically occurs in a clean room where potential contaminants must be
continually removed and temperatures kept constant. These special maintenance
requirements make clean rooms expensive to operate. Smaller testers occupy less
floor space and therefore assist in reducing clean room costs. In addition,
smaller testers that consume less power generally have reduced air conditioning
requirements.

There are two dominant process technologies used to develop the ICs used in
ATE, emitter-coupled logic, ECL, and complementary metal oxide semiconductor,
CMOS. Although CMOS technology allows higher functionality per chip and
requires less power to operate, ATE based exclusively on CMOS technology has
been limited by the inability of CMOS to meet the timing and measurement
demands of semiconductor testing. Historically, although the speed of CMOS was
acceptable, its timing stability was not. This problem results from the
tendency of CMOS circuits to experience timing drift as a function of
temperature and voltage variation during tests. To fully benefit from the
economic and other advantages of CMOS technology, the challenge has been to
control this drift characteristic in order to produce semiconductors for ATE
that meet the performance requirements of semiconductor testing.

These technical, economic and market trends have created a significant need
for an integrated design to production test flow that includes Built in Self
Test, or BIST, circuitry, specialized engineering validation test products and
high performance, cost effective ATE. Additionally, the market is requiring
solutions that enable engineers to develop and debug production test software
and ATE interface equipment, or fixtures, in parallel with the design and
validation of integrated circuit prototypes to increase the process parallelism
and improve device time to market.

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The Credence Solution and Strategy

We provide high performance IC engineering validation test systems that
address the engineering and production test requirements of increasingly
complex devices. Our engineering validation test systems test logic devices,
mixed-signal devices that combine both analog and digital functionality and
memory devices. Our engineering validation test systems can also be used to
test selected functions of highly integrated, or system-on-chip, devices. By
keeping pace with the industry's advances in speed and pin count requirements,
our solutions enable customers to reduce the time required for verification,
characterization and failure analysis. This generally results in lower cost of
design, reduced time-to-market and increased competitiveness for the companies
designing today's increasingly complex integrated circuits. Our validation
systems give engineers a more flexible and cost-effective way to verify and
characterize prototype integrated circuits and to perform failure analysis.
Each validation system integrates the functions of a variety of individual test
instruments into a single system consisting of both hardware and software that
offers increased verification and characterization performance with significant
cost savings. Our engineering validation test technology allows our systems to
send and receive data from an integrated circuit at the same speeds the circuit
will experience in actual use. As a result, design and test engineers can
better identify failures, assess areas of concern, run rapid diagnostic
sequences to pinpoint the causes of failure and identify changes needed to
correct design errors or weaknesses.

We have developed proprietary CMOS stabilization methods that minimize the
drift characteristic of CMOS and enable us to produce ATE production test
systems that are smaller and require less power than those based upon ECL
technology. These testers are intended to provide a lower total cost of
ownership than many competing products currently available while meeting the
performance demands of today's ATE market. CMOS technology allows the circuits
used in our testers to be reduced, or scaled down in size as IC process
technology improves. This scalability feature enables us to develop and
manufacture smaller, higher performance circuits for use in our testers at what
we believe to be a lower cost, and with a potentially shorter development
cycle, than traditional process technologies.

We believe our software solutions enable test engineers to develop, refine
and debug production test software early in the integrated circuit design and
production process, even before a prototype of the integrated circuit is
produced. By allowing production test programs to be developed and debugged
while the integrated circuit is being designed and validated, our software can
significantly reduce the time required to introduce integrated circuits to
market.

Our objective is to be the leading supplier of design through production
test solutions. This includes high performance IC engineering validation test
systems, cost-effective ATE for production testing of ICs used in high volume
applications, and software solutions and other innovations to decrease the
cycle time from circuit design to high volume manufacturing. Our business
strategy incorporates the following key elements:

. Maintain Technology Leadership. We believe that our proprietary CMOS
stabilization technology enables the development of ATE that is designed
to meet the performance and cost of ownership requirements of
semiconductor manufacturers and assembly and test services companies. In
addition, we believe the scalability of this technology will allow us to
offer new products and enhancements in a potentially shorter time and at a
lower cost than many of our competitors that base their products on
traditional less-scalable architecture.

. Provide Innovative Solutions to Test Increasingly Complex Devices. We
currently intend to keep pace with rapid advances in integrated circuit
design and test by introducing new engineering validation test systems and
related software designed to test higher speed and higher pin count
devices. We intend to continually enhance our existing systems to add
valuable features and functions that meet our customers' evolving needs.

. Lower Total Cost of Ownership. We seek to provide ATE to our customers at
a lower total cost of ownership than many competing products currently
available while meeting the performance requirements of our customers. We
believe that the system price, reliability, flexibility, size, power and

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air conditioning requirements, upgradeability and maintenance costs,
including spare parts, of our testers enable our customers to more cost
effectively test ICs.

. Provide Integrated Design to Production Test Solutions to Reduce
Time-to-Market. We believe that our customers require increasing levels
of sophisticated software tools to integrate the design to production test
flow, assist in the utilization of ATE and minimize time-to-market. We
currently are focusing our software efforts on internal development and
acquisition of companies or businesses that develop such tools. Through
our acquisition of Fluence Technology, Inc., or Fluence, and Integrated
Measurement Systems, Inc., or IMS, we have acquired automatic test program
development software, or TDS, and TDX product lines, analog design,
optimization and fault analysis technology and BIST products. In addition,
through the acquisition of certain assets of Heuristics Physics Labs, we
obtained memory BIST and related in-process software products. The
acquisition of IMS added Virtual Test Software designed to develop and
debug test programs and model the tester and test environment. We believe
these acquisitions, and our new software product lines that integrate
design and test, will enable us to capitalize on the Design-for-Test, or
DFT, market.

. Target Diverse, High-Volume Markets. Our products target the testing of
digital logic, analog mixed-signal, system-on-a-chip, or SoC, memory and
radio frequency devices that are used in a broad range of growing end-user
market segments. Our products are designed to test semiconductors that are
manufactured in high volume and are used in a variety of applications such
as automobiles, appliances, personal computers, personal communications
products, networking products, digital televisions and multimedia hardware
and communications infrastructure.

. Leverage Relationships with Industry Leaders to Enhance Market
Position. We currently intend to continue to build close working
relationship with integrated circuit manufacturers, EDA software vendors
and ATE machine vendors to enhance our market position. Working closely
with integrated circuit manufacturers helps us anticipate their needs and
incorporate specific value-added functionality into our products. We
believe our relationships with leading EDA software vendors allow us to
design and offer products that can access the device models created with
EDA software and effectively use this data to perform validation tests and
debug and refine production test programs. Our relationships with several
leading ATE vendors strengthen our ability to develop ATE machine
simulations, and we believe these relationships have led to increased
customer acceptance of our TDS and virtual test software products.

. Worldwide Technical Support and Customer Service. As semiconductor
manufacturers expand their operations worldwide, they require that their
test suppliers have the capability to provide global support, service and
training. To meet this requirement, we utilize a combination of direct
sales, service and support personnel and a broad network of independent
distributors located in close proximity to major customer sites. We and
our distributors currently maintain locations throughout the world to
service and support our customers.

Products

We currently offer a wide variety of products that test digital logic,
analog, mixed-signal, SoC, dynamic random access memory, or DRAM, static random
access memory, non-volatile memory and radio frequency wireless ICs. Digital
logic semiconductors produce discrete on and off logical sequences that control
functions, store data, retrieve data and move and manipulate data at high rates
of speed. Analog semiconductors control external functions such as sound,
graphics, and motor controls by producing continuous varying voltage or
current. When these analog functions are combined onto a digital integrated
circuit, the resulting device is considered a mixed-signal device. DRAM loses
data without power while non-volatile memory semiconductors retain their data
when the power is turned off. RF wireless IC's are the devices that receive,
transmit and convert radio frequency signals typically used in cellular
telephones.

Our CMOS-based ATE products--the SC, and Quartet series--are designed to
test high speed devices used in applications such as networking and personal
computing as well as multimedia, digital television, high-definition

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television and personal communications. Our memory product line, the Kalos
Series, tests non-volatile memory, or NVM, devices, including ROM, EPROM,
EEPROM and Flash memories, which are used in high volume applications in the
consumer, automotive and telecommunications markets.

During fiscal 2001 we acquired Dimensions Consulting, Inc. ("DCI"), the
principal assets of Rich Rabkin & Associates, Inc. ("Rabkin") and IMS. DCI
specializes in providing interface solutions for the semiconductor test and
development market through ATE board design and test socket systems. Rabkin
specializes in providing interface solutions and test head positioning devices
for the semiconductor test market through its patented solution for high
parallel memory testing. DCI and Rabkin were integrated into our Memory
Products Division to offer test solutions that we believe increase
manufacturing efficiencies and provide faster time to market for our customers.
IMS designs, manufactures, markets and services high-performance engineering
validation test systems. These systems are used to test, at the prototype
stage, complex digital, mixed-signal and memory devices. In addition, IMS
develops, markets and supports a line of virtual test software that we believe
enables design and test engineers to develop and debug production test software
prior to fabricating the prototype of the actual device. During fiscal 2001, we
merged our wholly-owned subsidiary, Fluence, into IMS.

During fiscal 2000 we acquired TMT, Inc. ("TMT"), Modulations Instruments,
Inc. ("MI"), and NewMillennia Solutions, Inc. ("NMS"). The TMT product line
includes the ASL 1000, targeted at testing analog function ICs, and the RFx,
targeted at testing RF wireless ICs. During fiscal 2000 we introduced the ASL
2000 targeted at testing many analog devices in a multisite mode as well as
providing significant expansion capability for our customers in the future. MI
provides test solutions for the design and manufacturing of RF semiconductor
and wireless infrastructure component markets. MI holds proprietary
intellectual property for performing S-Parameter measurements using complex
modulated signals. Our Modulated Vector Network Analyzer ("MVNA") Technology
allows accurate measurement of devices stimulated with signals matching their
end-use operating environment.

During fiscal 1999, our wholly-owned subsidiary, Fluence, acquired Opmaxx,
Inc. The Opmaxx products are targeted at analog and mixed signal design and
test applications.

During fiscal 1998, we introduced the Quartet series. The Quartet system is
compatible with Duo, and provides the enhanced capabilities required to test
consumer mixed signal products with 200 MHZ I/O 20 bit analog and video input
and output. Quartet directly addresses the cost sensitive needs of consumer
related system-on-a-chip, or SoC, devices.

Introduced in 1997, the Kalos Flash memory test system is a highly
integrated parallel systems that provides multi-site testing and is designed to
lower the overall cost of test.

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The following table sets forth our current product offerings, their features
and examples of typical devices tested by each product. Included in some of the
basic features are the anticipated cycle speed in megahertz, timing accuracy in
either picoseconds (ps) or nanoseconds (ns), the number and characteristics of
the pins and the density, in megabits(Mb), of the device that can be tested:



Product Series Models Market and Basic Features Typical Devices Tested
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Digital SC SC312 ATE: Microcontrollers, ASSPs, DSPs
SC Micro 50-100 MHz and FPGAs
64-304 Pins
+ 350-500 ps accuracy
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IMS 500 330 550 Engineering validation test: Microprocessors, ASICs, Multi-
Vanguard Up to 1GHz Chip Modules
+ 200 ps accuracy
6-512 Pins
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Mixed-Signal Quartet One ATE: Multimedia devices, mass
512 digital pins storage, DSPs, ASICs, Datacom
200 MHz and specialty devices, mobile
+ 175 ps accuracy communication devices, complex
Analog, Video, Audio, RF audio devices
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IMS Electra Electra, Engineering validation test: Cable Modems, Sonet/ATM,
Electra MX 16-576 digital pins System-on-a-Chip (SoC)
400 MHz Digital
2.4GHz Analog
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Memory KALOS Kalos ATE: Flash memories, EEPROM,
Products Kalos xw 50 MHz EPROM, Microcontrollers and
Kalos xp 256 Mb NVM ASICs
Personal + 1ns
Kalos
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IMS Orion Orion Engineering validation test: SRAM, DRAM, Rambus
200MHz
48-80 Pins
1 Gbit fail memory
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Analog Test ASL ASL 1000 ATE: Analog or Linear IC such as
Products Up to 19 analog instruments with battery power management IC.
32 14MHz digital pins Traditional linear devices such as
Op-Amps, comparators and
regulators.
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ASL ASL 2000 ATE: Personal communications, A/D
Up to 32 analog instruments with and D/A converters as well as
expansion for up to 64 pins of multi-site test of traditional linear
digital and DSP instruments. devices.
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Radio RFx RFx ATE: Wireless communications IC
Frequency Up to 8 ports of 6GHz RF with such as Power amplifiers (PA),
(RF) Wireless Analog and digital instruments. Low Noise Amplifiers, Mixers
and synthesizers and Bluetooth
RF front-ends.
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Workcell Triton Memory ATE: ROM, EEPROM, EPROM, and
Kalos tester integrated into 8" Flash memories
wafer prober, without extending
outside the prober perimeter
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Product Series Models Market and Basic Features Typical Devices
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Software TDS tools Design to Generates tester specific files Tools apply to digital logic
Test from simulation (EDA) files. circuits
Verifies timing specification
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TDX tools Design for Verifies test vector quality. Tools apply to digital logic
Test Supports design for test strategies devices
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IMS Virtual VTS Accelerates the development and Tools apply to digital logic
Test debug of test programs devices
Software
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Opmaxx Design Maxx Design verification and Tools apply to analog and mixed-
sensitivity analysis evaluation signal devices
and optimization
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Opmaxx BISTMaxx BIST generation for digital, Tools apply to analog, high-
analog and mixed-signal devices speed digital and mixed-signal
devices
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Digital Products

SC. In fiscal 1997, we expanded the SC series by introducing and shipping
the SC 312, which runs at a higher speed (100 MHz) and has improved accuracy
over its predecessor, the SC 212. The SC Micro is a cost-reduced version of the
SC 312. This system offers our customers a full capability test system at a
price currently below $2,000 per digital pin channel. This per channel price
has previously been available only in test systems with reduced
functionality-requiring users to compromise the quality of their device
testing. The SC Micro retains the customer's test quality while lowering its
test costs. The purchase price of these testers typically ranges from $350,000
to $850,000 depending upon configuration.

IMS Vanguard. The IMS Vanguard, our flagship engineering validation test
product introduced by IMS in 1999, can send and receive data from integrated
circuits under test at up to 1 GHz and accounted for the majority of logic
family sales in 2000. The logic engineering validation test system family
includes the Vanguard 500, 330 and most recently introduced 550. The Vanguard
systems sell for between $0.7 million and $2.3 million, depending on the
configuration.

Mixed-Signal Products

Quartet. Quartet is our high performance mixed-signal product series. The
Quartet One was introduced in 1998 and started shipping in early fiscal 1999.
Quartet builds on the Duo series by addressing the needs of device
manufacturers serving the consumer mixed-signal, or CMS, marketplace. CMS
devices combine the power of digital processors with CD quality audio,
broadcast video and wireless communications onto a single, cost sensitive SoC.
The Quartet One, the first of the Quartet series, addresses all four of these
requirements in an integrated, ready for volume production package. With 200
MHz digital, 20 bit audio, 300 MHz video and 6GHz RF, Quartet One is designed
to meet the demands of the most complex SoC devices. With typical system prices
between $750,000 and $2,000,000 depending on configuration, the Quartet
provides a low cost of test required by the CMS market.

IMS Electra. Our mixed-signal engineering validation test systems are used
by customers to verify the designs of complex integrated circuits containing
both digital and analog functionality. These mixed-signal integrated circuits
are used in applications such as cable modems and to implement Sonet and ATM
technologies in high-speed networks. The IMS Electra is also used to test
selected functions of highly-integrated, or system-on-chip, designs. Depending
on the configuration, the system can send and receive data from integrated
circuits under test at up to 200 MHz. Our Electra series includes the Electra,
which can test mixed-signal integrated

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circuits with up to 224 pins, and the Electra MX, which can test mixed-signal
integrated circuits with up to 576 pins. Our Electra series systems sell for
between $300,000 and $2,100,000.

Memory Products

KALOS. Introduced in November 1997, the Kalos is a highly integrated,
parallel system designed to test flash memory. Running at 50 MHz, it provides
multi-site testing and is designed to lower the customer's cost of test. The
Kalos features a unique tester-on-a-card architecture, which places all test
functions for each site on a single card and thus reduces floor space and power
consumption while increasing performance. The typical purchase price of the
Kalos ranges from $400,000 to $800,000 depending on configuration.

KALOS xp. Introduced in fiscal 1999, the Kalos xp is based upon the Kalos
tester. The Kalos xp features a wider, 96 pin test site enabling testing of
high pin count NVM and flash memory core microcontroller devices. Kalos xp
provides up to eight site-in-parallel test capabilities in a small footprint
tester package.

KALOS xw. Introduced in fiscal 2000, the Kalos xw is based upon the Kalos
tester and features twice as many test sites as the Kalos or the Kalos xp, 32
or 16, respectively.

Personal KALOS. Personal Kalos is a desktop engineering version of the
high-throughput Kalos tester. The typical price for a Personal Kalos ranges
from $100,000 to $120,000 depending on configuration.

IMS ORION. The IMS Orion is used by our customers to verify the designs of
the most common types of memory integrated circuits, including complex SRAMs
and DRAMs. The Orion will send and receive data from integrated circuits under
test at speeds up to 200 MHz/400 Mbs. Depending on the configuration, these
memory validation systems sell for between $400,000 and $600,000.

Analog Test Products

The acquisition of TMT in fiscal 2000 extended the market that we serve to
include analog dominant ICs that are made up of traditional analog function
blocks such as amplifiers, regulators, switches and converters. The ASL product
line tests these traditional devices either as individual ICs or as larger
function ICs such as battery power management devices in portable electronics
devices.

ASL 1000. The ASL 1000 was introduced in fiscal 1996. This system is highly
configurable and targeted at testing the traditional analog building block ICs.
As the traditional analog or linear device manufactures move to more efficient
manufacturing, the multi-site test capability of the ASL 1000 has proven to be
very effective at reducing their cost of test. The purchase price of the ASL
1000 ranges from $100,000 to $250,000 and is highly dependant on configuration.

ASL 2000. Introduced in fiscal 2000, the ASL 2000 is an extension of the
ASL 1000 featuring an increased number of instruments, expansion to increased
digital capability, and DSP based mixed signal test. The ASL 2000 is capable of
testing more complex devices and more devices in parallel and targets a wide
range of ICs used in personal communications. The purchase price of the ASL
2000 ranges from $150,000 to $350,000 and is highly dependant on configuration.

RF Wireless Test Products

Our RF wireless test products provide tools to IC manufacturers for use in
characterization and production test of high performance, cost sensitive RF
devices.

RFx. The RFx, a product acquired through the TMT acquisition, was first
introduced in fiscal 1998 and provides a significantly better cost of test
advantage over many competitors. This system is made up of

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specialized RF test instruments combined with the analog instrumentation of the
ASL product line. The RF instruments are capable of testing up to 6GHz in
either the scalar or vector method of testing RF parameters. The RFx is
targeted at cost effective testing of RF front-end devices that are typically
manufactured in Gallium Arsenide (GaAs), Bi-polar or Bi-CMOS technology. The
devices, Power Amplifiers (PA), Low Noise Amplifiers (LNA), Synthesizers,
Mixers and Switches and combinations of these (Base band chips), are used in
both digital and analog cell phones. The purchase price of the RFx typically
ranges from $450,000 to $750,000 depending on configuration.

Workcell Products

In 1996, we established the Workcell product group. A Workcell enhances
manufacturing productivity by integrating previously distinct equipment into a
single, highly efficient tool. In fiscal 1997, we introduced our sophisticated
Triton series of wafer test systems. Triton Memory--the industry's first suite
of Workcell wafer test solutions--features a production-worthy wafer prober
integrated with a robust NVM ATE test system.

Triton Memory. Leveraging our tester-on-a-card architecture, Triton Memory
tests as many as 16 sites in parallel at speeds of 50 MHz. All functions
required to test a Flash memory device appear on one card. An inherently
parallel, high-performance system that improves throughput rates, the Triton
Memory tests each device asynchronously from one another--while embedded within
an 8" wafer prober. The tester is an integral part of the prober's structure,
minimizing independent vibrations associated with current interface concepts.
The typical price of a Triton memory ranges from $450,000 to $1,300,000
depending on configuration.

Matrix Test(TM). The Matrix Test was introduced in fiscal 1999 in
conjunction with Amkor Technology and FICO BV. The Matrix Test process is a
zero-footprint in-line flash memory test system and it integrates a Kalos
non-volatile memory test system with a Fico strip-based test handler to improve
the test process. This integrated solution is able to test a strip of flash
memory devices without singulating the parts, or separating them from the strip.

DCI. DCI offers comprehensive interface solutions for the semiconductor
test and development market including bench, application, demo, high
performance and ATE boards, engineering sockets and high performance
contactors. DCI provides one source for design, fabrication and assembly.

Software Products

Our software products provide tools to IC manufacturers to help create
detailed tests to ensure product quality and shorten time-to-market.

TDS. The TDS product line consists primarily of Converter, Conditioner, and
WaveBridge products. Converters take waveform data from simulator-specific
representations into an industry-standard representation. Conditioners modify
waveform data to enable it to fit specific tester environments. WaveBridge
modules generate the actual test programs. Converters are available to support
most commonly used simulators, and WaveBridge modules are available for a
variety of ATE models. Other programs that analyze waveform data and provide
other design-to-test functions are also included in the TDS product line.

TDX. The TDX product line allows the design engineer to verify complex
designs with full timing accuracy, device stress testing ("Iddq"), pattern
generation, scan generation and testability analysis.

IMS Virtual Test Software. To address the need for shorter test development
times, we provide software for test engineers, called Virtual Test Software,
that accelerates the development and debug of a test program, creates a model
of the test environment, develops and tests fixtures and documents the entire
test process. Our Virtual Test Software simulates the ATE environment which
enables test engineers to develop and debug test programs in parallel with the
design, prototype manufacture and engineering validation test processes. With

9



Virtual Test Software, test engineers begin test development work before device
design is completed. Through the use of tester modeling and simulation, both
the test itself and the testability of the design can be verified on a
workstation before first prototypes devices are delivered. software generates
built-in self-test logic for designs that use embedded memories.

Opmaxx. The Opmaxx product line provides a set of software tools for
testing digital, analog and mixed signal devices, as well as designing them for
testability. DesignMaxx provides analog design optimization, verification, and
sensitivity analysis. BISTMaxx generates built-in self-test for analog/mixed
signal device functionality both on-chip and off-chip.

Customers, Markets and Applications

We target digital logic, analog, mixed-signal, dynamic random access memory,
non-volatile memory device, RF and SoC manufacturers that serve a broad range
of growing end-user market segments. Our customers design, manufacture and test
semiconductors in high volume for use in applications such as automobiles,
appliances, personal computers, personal communications products, networking
products, digital televisions and multimedia hardware.

In addition to marketing our products to major semiconductor manufacturers,
we have developed relationships with numerous assembly and test services
companies. Semiconductor manufacturers and fabless semiconductor companies
utilize these subcontractors as a means of lowering their fixed production
costs, thus minimizing the effects of cyclicality inherent in the semiconductor
industry. As a result, these assembly and test services companies have become
an increasingly important segment of the ATE market.

We believe that our success depends in large part upon the success of our
major customers. The loss of, or any reduction in, orders by a significant
customer (including the potential for reductions in orders by assembly and test
services companies which that customer may utilize), including reductions due
to market, economic or competitive condition in the semiconductor industry or
in other industries that manufacture products utilizing semiconductors has
materially adversely affected, and may continue to materially adversely affect
our business, financial condition or results of operations. Our ability to
increase sales in the future will depend in part upon our ability to obtain
orders from new customers as well as upon the financial condition and success
of our customers and the general global economy. There can be no assurance that
our sales will not decrease in the future or that we will be able to retain
existing customers or to attract new ones.

For information on our geographic data and major customers, see Note 4 to
the Consolidated Financial Statements included elsewhere herein. Our
international sales are primarily denominated in United States dollars. We
anticipate that our international business will continue to account for a
significant portion of net sales in the foreseeable future.

We schedule production of our systems based upon order backlog and order
forecast. We include in our backlog only those customer orders for systems
(including upgrades) for which we have accepted purchase orders and assigned
shipment dates in approximately the following six months. Substantially all of
our orders are subject to cancellation or rescheduling by the customer with
limited or no penalties. Our backlog at any particular date may not necessarily
be representative of actual sales for any succeeding period due to orders
received for systems to be shipped in the same quarter, possible changes in
system delivery schedules, cancellation of orders and potential delays in
system shipments. As of October 31, 2001, our order backlog for systems,
exclusive of orders for software, spare parts, service and support, was
approximately $33.5 million plus an additional $20.5 million of deferred
revenue under SAB 101, as compared with $309.5 million of order backlog as of
October 31, 2000. We believe it is probable that order cancellations and
customer-requested shipment delays will continue to occur in the future.

10



Sales, Service and Support

We currently market and sell our products in the United States principally
through our direct sales organization, with direct sales employees and
representatives in over 14 locations. Outside the United States, we utilize
both direct sales employees and a broad network of distributors, with direct
sales employees and distributors in over 18 countries. Excluding the impact of
SAB 101, shipments through distributors represented approximately 44%, 54%, and
47% of net sales during fiscal years 2001, 2000, and 1999, respectively.

We and our distributors have sales and support centers located in the United
States, Europe, Israel, and throughout Asia from which both direct Credence
personnel and independent sales and service representatives sell and support
our products. We believe that field support is critical to our customers.
Support encompasses many of the components of the total cost of ownership for
test equipment. We seek to develop long-term relationships with major customers
through extensive support consisting of teams of professional sales,
applications, training and service personnel. These personnel are located in
close physical proximity to key customer sites in order to provide the required
support in a timely fashion. The sales process includes consultations with
customers to help them purchase the most cost-effective equipment for their
needs, to help develop custom test programs to optimize production throughput,
to assist in long-term self-sufficiency through training of customer test
engineering personnel and to provide the service capacity and preventive
maintenance to reduce downtime for customers' systems. Customer support
includes field personnel and in-house applications personnel who work closely
with design engineering groups to modify existing equipment to meet the latest
performance requirements.

In fiscal 2000 we purchased our European distribution companies from their
owner-managers. These subsidiaries provide sales, support and services to our
customers in Europe and Israel.

In Japan a wholly-owned subsidiary provides sales and service to our
customers. In addition, we have a relationship with Innotech Corporation, a
distributor of our products in Japan. In 1997, we formed a joint venture with
Innotech to engage in the customization and manufacture of ATE products for
sale by both companies. In March 1996, we established a service and support
subsidiary in Korea. We also have a relationship with Itek, Inc., a distributor
of our products in Korea.

We have an agreement with a captive leasing company. In addition to leasing
and financing activities, we also provide certain remarketing services to
customers. We have issued a guaranty in favor of a bank with respect to certain
obligations of the leasing company to the bank. Under this agreement, the
leasing company agreed to grant to us a security interest to secure the
obligations of the leasing company as a result of any payments by us pursuant
to the guaranty. At October 31, 2001 and 2000, the maximum allowable debt of
the leasing company subject to this guaranty, $8,750,000 and $4,750,000,
respectively, was outstanding.

Our standard policy is to warrant our new systems against defects in design,
materials and workmanship for one year for parts and labor. We offer customers
additional support after the warranty period in the form of maintenance
contracts for specified time periods. Such contracts include various options
such as board replacement, priority response, planned preventive maintenance,
scheduled one-on-one training, daily on-site support and monthly system and
performance analysis.

Research and Development

The engineering validation test and ATE markets are subject to rapid
technological change and new product introductions. Our ability to be
competitive in this market will depend in significant part upon our ability to
successfully develop and introduce new products, enhancements and related
software tools on a timely and cost-effective basis. This will enable customers
to integrate such products into their operations as they begin volume
manufacturing of the next generation of semiconductors.

11



We have pursued a technology acquisition strategy to complement our internal
research and development efforts, including:

. in 1988, we completed the acquisition of Axiom Technology Corporation,
which added mixed-signal testing capability;

. in 1989, we completed the acquisition of ASIX Systems Corporation, which
added one of our proprietary CMOS stabilization methods;

. in 1990, we acquired the STS Division of Tektronix Inc., which added a
second proprietary CMOS stabilization method;

. in 1993, we acquired various patents from Tektronix;

. in March 1995, we acquired EPRO, which added non-volatile memory testing
capability;

. in July 1997, we acquired, through our subsidiary Fluence, specified
assets and assumed specified liabilities of Test Systems Strategies, Inc.,
a wholly owned subsidiary of Summit Design, Inc.;

. in August 1997, we acquired through Test Systems Strategies fault
simulation and test program development products of Zycad;

. in June 1998, we purchased specified assets from Heuristics Physics Labs
(HPL) which added memory BIST design and test applications capability;

. in September 1999, we acquired Opmaxx through Fluence, which added analog
design optimization and fault analysis technology and BIST products;

. in May 2000, we acquired TMT, which added lower-end analog and mixed
signal testing capability, particularly in the communications segment;

. in August 2000, we acquired MI, which added radio frequency test
technology;

. in October 2000, we acquired NMS, which provides test strategies and
products including native test environments and targeted design for test
techniques;

. in January 2001, we acquired DCI, which provides interface solutions for
the semiconductor test and development market through ATE board designs
and test socket systems;

. in February 2001, we acquired the principal assets of Rabkin, which
provides interface solutions and test head positioning devices for the
semiconductor test market through patented solutions for high parallel
memory testing;

. in August 2001, we acquired IMS, which designs, manufactures, markets and
services high-performance integrated circuit engineering validation test
systems. These systems are used to test, at the prototype stage, complex
digital, mixed-signal and memory devices; and

. during fiscal 2001, we merged our wholly-owned subsidiary, Fluence, into
IMS.

Each of the CMOS stabilization methods we acquired provides a different
solution to the tendency of CMOS to experience timing drift as a function of
temperature and voltage variation. The first proprietary solution uses a timing
phase detection circuit combined with a voltage control mechanism to compensate
for thermal, voltage and process drift. The second uses a unique combination of
counters and heating circuits to provide stability through thermal means. These
methods allow our CMOS-based ICs to achieve the timing repeatability necessary
to meet the performance requirements of ATE and to realize the economic and
other advantages of CMOS technology over ECL technology. CMOS circuits use less
space than those based on ECL as the circuits require less power and can be
more closely packed together. In addition to these acquired stabilization
methods, we have also developed and continue to develop new and/or improved
stabilization techniques for our tester products.

12



During 1998, we enhanced our Duo/Quartet product line with new capabilities
including high performance audio testing, testing of analog circuitry for
wireless communication applications and higher performance digital testing.
These features enable single insertion SoC testing capability and resulted in
the Quartet product line that was introduced in 1999. We will continue to focus
research and development efforts on the Quartet product line to ensure ensuring
that our products have the ability to efficiently test state-off-the-art
customer devices which combine analog, high speed digital logic, and memory on
a single circuit.

Our ongoing research and development efforts also include focusing on
increased cycle speed, accuracy and pin counts of our testers. In addition, we
are working on a software development program that is intended to provide for
upward compatibility through our products. We will also continue to focus
efforts on providing software solutions which allow more rapid, cost-effective
development of ATE test programs which reduce time-to-market of customer
integrated circuit designs. We currently intend to continue to invest
significant resources in the development of new products and enhancements for
the foreseeable future.

Research and development expenses were $86.4 million in fiscal 2001, $77.9
million in fiscal 2000, (excluding $11.8 million charged for acquired
in-process research and development or "IPR&D") and $45.3 million in fiscal
1999, (excluding a $0.9 million charge for acquired IPR&D).

Proprietary Rights

We currently hold 112 United States patents, which expire over time through
July 2020. In addition, we currently have 26 foreign patents, which expire over
time through January 2014. The two United States patents, acquired from ASIX
and Tektronix underlying our proprietary CMOS stabilization methods expire in
February 2007 and December 2007, respectively.

In 1993, we granted a license to Tektronix with respect to patents obtained
in the acquisition of the STS Division of Textronix, and certain other
intellectual property rights, the Tektronix Rights, including a patent covering
one of our proprietary CMOS stabilization technologies, that were assigned to
us by Tektronix in 1993. Tektronix has a worldwide, perpetual, irrevocable,
non-exclusive, royalty free, fully-paid, sublicensable and transferable license
to the Tektronix Rights. Tektronix may not grant rights under the Tektronix
Rights to make, use, sell or otherwise distribute ATE for testing ICs to any
entity other than a Tektronix joint venture affiliate and to a
successor-in-interest to Tektronix. Tektronix may not grant or assign such
rights to any other party that is a Credence competitor. In addition, Tektronix
may not knowingly sell components incorporating the Tektronix Rights to any
other party. We and Tektronix have granted to each other a worldwide,
perpetual, irrevocable, non-exclusive, royalty free, fully-paid, sublicensable
and transferable license to all improvements, enhancements, modifications or
derivative works created before August 1996, or the Improvements, of
intellectual property that was licensed or assigned pursuant to a Technology
Agreement dated December 31, 1990, as amended on August 12, 1993, including the
Tektronix Rights, to make, use and sell ATE for testing ICs. Tektronix's
license to the Improvements is subject to the same restrictions as its license
to the Tektronix Rights.

We attempt to protect our intellectual property rights through patents,
copyrights, trademarks and maintenance of trade secrets and other measures.
There can be no assurance that others will not independently develop equivalent
intellectual property or that we can meaningfully protect our intellectual
property. There can be no assurance that any patent we own will not be
invalidated, circumvented or challenged, that the rights granted thereunder
will provide competitive advantages to us or that any of our pending patent
applications will be issued. Furthermore, there can be no assurance that others
will not develop similar products, duplicate our products or design around the
patents owned by us. In addition, litigation has been and may continue to be
necessary to enforce our patents and other intellectual property rights, to
protect our trade secrets, to determine the validity and scope of the
proprietary rights of others, or to defend against claims of infringement or
invalidity. For additional information with respect to our intellectual
property, review the information set forth under "Risk Factors--If the
protection of proprietary rights is inadequate, our business could be harmed"
and "--Our business may be harmed if we are found to infringe proprietary
rights of others."

13



Manufacturing and Suppliers

Our manufacturing objective is to produce engineering validation test
systems and ATE that conforms to our customers' requirements at the lowest
commercially practical manufacturing cost. We rely on outside vendors to
manufacture certain components and subassemblies including several custom
integrated circuits. We seek to manage our inventory levels through agreements
with both suppliers and subcontractors that provide just-in-time delivery of
these components and subassemblies. We assemble these components and
subassemblies to create finished testers in the configuration specified by our
customers. In general, we use standard components and prefabricated parts
available from numerous suppliers. However, some components and subassemblies
necessary for the manufacture of our testers are obtained from a sole supplier
or a limited group of suppliers and we are in the process of qualifying a
second source for some of those components. There can be no assurance that such
alternative source will be qualified or available. Our reliance on a sole or a
limited group of suppliers and on outside subcontractors involves certain
risks, including a potential inability to obtain an adequate supply of required
components, and reduced control over pricing and timely delivery of components.
See "Risk Factors--There are limitations on our ability to find the supplies
and services necessary to run our business."

Competition

The ATE industry is intensely competitive. We face substantial competition
throughout the world, primarily from ATE manufacturers located in the United
States, Europe and Japan, as well as from some of our customers. Our
competitors in the digital semiconductor testing market include:

. Advantest Corporation;

. Ando Electric Co. Ltd.;

. LTX Corporation;

. Schlumberger Ltd.;

. Agilent Technologies, Inc.; and

. Teradyne, Inc.

In the mixed-signal and analog semiconductor testing market our competitors
include:

. Teradyne, Inc.

. LTX;

. Agilent;

. Schlumberger;

. Advantest;

. SZ Systems; and

. Eagle Test Systems.

In the non-volatile memory testing market our competitors include:

. Teradyne;

. Nextest, Inc.;

. Agilent; and

. Advantest.

In the dynamic random access memory testing market our competitors include:

. Mosaid.

14



In the RF wireless device testing market our competitors include:

. Teradyne;

. Advantest;

. LTX;

. Agilent;

. Eagle Test Systems;

. Roos Instruments; and

. Rohde and Schwarz.

IMS's principal competitors in the software design to test market are:

. Simutest, Inc.; and

. in-house applications developed by companies in the semiconductor industry.

The competitors in the software design for test and BIST market place include:

. Mentor Graphics, Inc.; and

. LogicVision, Inc.

In addition to the competitors listed above, we face competition from
various start-up companies in our markets. The principal elements of
competition in our markets and the basis upon which our customers select
engineering validation testers and ATE include throughput, tools for reducing
customer product time-to-market, product performance and total cost of
ownership. We believe that we compete favorably with respect to these factors.
See "Risk Factors--The ATE industry is intensely competitive which can
adversely affect our revenue growth."

Employees

As of October 31, 2001, we had a total of 1,310 permanent employees and 61
temporary or contract employees. Of this total, 289 are engaged in
manufacturing, 360 are in research and development, 87 in applications, 382 in
sales, marketing and service, and 184 in general administration. There are 69
employees in our IMS Design and Test Software division, primarily engaged in
the development, sales and marketing of software products. Our employees are
highly skilled, and we believe our future results of operations will depend in
large part on our ability to attract and retain such employees. None of our
employees are represented by a labor union, and we have not experienced any
work stoppages. We consider our employee relations to be good.

15



RISK FACTORS

Our operating results have fluctuated significantly which has and may continue
to adversely affect our stock price.



[CHART]





1999 2000 2001
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Net Sales 37 51 67 97 136 178 221 222 136 75.6 52.8 37
Net Income (loss) (7)(4) 5 11 (6) 38 43 45 14 (36.5)(15.6) (59.3)





A variety of factors affect our results of operations. The above graph
illustrates that our quarterly net sales and operating results have fluctuated
significantly. We believe they will continue to fluctuate for several reasons,
including:

. economic conditions in the semiconductor industry in general and capital
equipment industry specifically;

. manufacturing capacity and ability to volume produce systems, including
our newest systems, and meet customer requirements;

. timing of new product announcements and new product releases by us or our
competitors;

. market acceptance of our new products and enhanced versions of existing
products;

. manufacturing inefficiencies associated with the start-up of our new
products, changes in our pricing or payment terms and cycles, and those of
our competitors, customers and suppliers;

. write-offs of excess and obsolete inventories and accounts receivable that
are not collectible;

. supply constraints;

. patterns of capital spending by our customers, delays, cancellations or
reschedulings of customer orders due to customer financial difficulties or
otherwise;

. changes in overhead absorption levels due to changes in the number of
systems manufactured, the timing and shipment of orders, availability of
components including custom ICs, subassemblies and services, customization
and reconfiguration of our systems and product reliability;

. expenses associated with acquisitions and alliances;

16



. operating expense reductions associated with cyclical industry downturns,
including costs relating to facilities consolidations and related expenses;

. the proportion of our direct sales and sales through third parties,
including distributors and OEMS, the mix of products sold, the length of
manufacturing and sales cycles, and product discounts;

. natural disasters, political and economic instability, currency
fluctuations, regulatory changes and outbreaks of hostilities; and

. our ability to attract and retain qualified employees in a competitive
market.

We intend to introduce new products and product enhancements in the future,
the timing and success of which will affect our business, financial condition
and results of operations. Our gross margins on system sales have varied
significantly and will continue to vary significantly based on a variety of
factors including:

. manufacturing inefficiencies;

. pricing concessions by us and our competitors and pricing by our suppliers;

. hardware and software product sales mix;

. inventory write-downs;

. manufacturing volumes;

. new product introductions;

. product reliability;

. absorption levels and the rate of capacity utilization;

. customization and reconfiguration of systems;

. international and domestic sales mix and field service margins; and

. facility relocations and closures.

New and enhanced products typically have lower gross margins in the early
stages of commercial introduction and production. Although we have recorded and
continue to record accounts receivable allowances, product warranty costs, and
deferred revenue, we cannot be certain that our estimates will be adequate.

We cannot forecast with any certainty the impact of these and other factors
on our sales and operating results in any future period. Results of operations
in any period, therefore, should not be considered indicative of the results to
be expected for any future period. Because of this difficulty in predicting
future performance, our operating results may fall below the expectations of
securities analysts or investors in some future quarter or quarters. Our
failure to meet these expectations would likely adversely affect the market
price of our common stock. In addition, our need for continued significant
expenditures for research and development, marketing and other expenses for new
products, capital equipment purchases and worldwide training and customer
service and support will impact our sales and operations results in the future.
Other significant expenditures may make it difficult for us to reduce our
significant fixed expenses in a particular period if we do not meet our net
sales goals for that period. These other expenditures include:

. research and development;

. support costs for the distribution channels;

. marketing and other expenses for new products;

. capital equipment purchases and world-wide training; and

. customer support and service.

As a result, we cannot be certain that we will be profitable in the future.

17



Significant delays can occur between the time we introduce a system and the
time we are able to produce that system in volume.

We have in the past experienced significant delays in the introduction,
volume production and sales of our new systems and related feature
enhancements. In the past, we experienced significant delays in the
introduction of our ValStar 2000 and Kalos series testers as well as certain
enhancements to our existing testers. These delays have been primarily related
to our inability to successfully complete product hardware and software
engineering within the time frame originally anticipated, including design
errors and redesigns of ICs. As a result, some customers have experienced
significant delays in receiving and using our testers in production. In
addition, under the new revenue recognition policy that is in accordance with
Staff Accounting Bulletin 101 ("SAB 101"), we will be deferring revenue for
transactions that involve newly introduced products or when customers specify
acceptance criteria that cannot be demonstrated prior to the shipment. This
will result in a delay in the recognition of revenue as compared to the
historic norm of generally recognizing revenue upon shipment. We currently
anticipate introducing several new systems in fiscal 2002. Delays in
introducing a product or delays in our ability to obtain customer acceptance,
if they occur in the future, will delay the recognition of revenue and gross
profit by us. We cannot be certain that these or additional difficulties will
not continue to arise or that delays will not continue to materially adversely
affect customer relationships and future sales. Moreover, we cannot be certain
that we will not encounter these or other difficulties that could delay future
introductions or volume production or sales of our systems or enhancements and
related software tools. In the past, we have incurred and we may continue to
incur substantial unanticipated costs to ensure the functionality and
reliability of our testers and to increase feature sets. If our systems have
reliability, quality or other problems, or the market perceives our products to
be feature deficient, we may suffer reduced orders, higher manufacturing costs,
delays in collecting accounts receivable and higher service, support and
warranty expenses, and/or inventory write-offs, among other effects. Our
failure to have a competitive tester and related software tools available when
required by a customer could make it substantially more difficult for us to
sell testers to that customer for a number of years. We believe that the
continued acceptance, volume production, timely delivery and customer
satisfaction of our newer digital, mixed signal and non-volatile memory testers
are of critical importance to our future financial results. As a result, our
inability to correct any technical, reliability, parts shortages or other
difficulties associated with our systems or to manufacture and ship the systems
on a timely basis to meet customer requirements could damage our relationships
with current and prospective customers and would continue to materially
adversely affect our business, financial condition and results of operations.

The ATE market is subject to rapid technological change.

Our ability to compete in the ATE market depends upon our ability to
successfully develop and introduce new hardware and software products and
enhancements and related software tools with greater features on a timely and
cost-effective basis, including products under development internally as well
as products obtained in acquisitions. Our customers require testers and
software products with additional features and higher performance and other
capabilities. Therefore, it is necessary for us to enhance the performance and
other capabilities of our existing systems and software products and related
software tools, or develop new systems and software products and related
software tools, to adequately address these requirements. Any success we may
have in developing new and enhanced systems and software products and new
features to our existing systems and software products will depend upon a
variety of factors, including:

. product selection;

. timely and efficient completion of product design;

. implementation of manufacturing and assembly processes;

. successful coding and debugging of software;

. product performance;

. reliability in the field; and

. effective sales and marketing.

18



Because we must make new product development commitments well in advance of
sales, new product decisions must anticipate both future demand and the
availability of technology to satisfy that demand. We cannot be certain that we
will be successful in selecting, developing, manufacturing and marketing new
hardware and software products or enhancements and related software tools. Our
inability to introduce new products and related software tools that contribute
significantly to net sales, gross margins and net income would have a material
adverse effect on our business, financial condition and results of operations.
New product or technology introductions by our competitors could cause a
decline in sales or loss of market acceptance of our existing products. In
addition, if we introduce new products, existing customers may curtail
purchases of the older products and delay new product purchases. In addition,
weakness in demand may have caused integrated device manufacturers ("IDM") to
pull testing back in-house versus using outsource test houses. Because less of
our market share is from the IDMs, this trend may reduce the demand for our
products. Any decline in demand for our hardware or software products could
have a materially adverse effect on our business, financial condition or
results of operations.

We have a limited backlog and obtain most of our net sales from a relatively
few number of system sales transactions, which can result in fluctuations of
quarterly results.

Other than certain memory products and software products, for which the
price range is typically below $50,000, we obtain most of our net sales from
the sale of a relatively few number of systems that typically range in price
from $200,000 to $2.0 million. This has resulted and could continue to result
in our net sales and operating results for a particular period being
significantly impacted by the timing of recognition of revenue from a single
transaction. Our net sales and operating results for a particular period could
also be materially adversely affected if an anticipated order from just one
customer is not received in time to permit shipment during that period. Backlog
at the beginning of a quarter typically does not include all orders necessary
to achieve our sales objectives for that quarter. Orders in backlog are subject
to cancellation, delay, deferral or rescheduling by customers with limited or
no penalties. In fiscal 2001, we experienced customer-requested shipment delays
and order cancellations, and we believe it is probable that orders will be
canceled in the future. Consequently, our quarterly net sales and operating
results have in the past and will in the future, depend upon our obtaining
orders for systems to be shipped in the same quarter in which the order is
received.

In the past, some of our customers have placed orders with us for more
systems than they ultimately required. We believe that in the future some of
our customers may, from time to time, place orders with us for more systems
than they will ultimately require, or they will order a more rapid delivery
than they will ultimately require. For this reason, our backlog may include
customer orders in excess of those that will actually be delivered to them or
other customers.

Furthermore, we generally ship products generating most of our net sales
near the end of each quarter. Accordingly, our failure to receive an
anticipated order or a delay or rescheduling in a shipment near the end of a
particular period or a delay in receiving customer acceptance from a customer
may cause net sales in a particular period to fall significantly below
expectations, which could have a material adverse effect on our business,
financial condition or results of operations. The relatively long manufacturing
cycle of many of our testers has caused and could continue to cause future
shipments of testers to be delayed from one quarter to the next. Furthermore,
as we and our competitors announce new products and technologies, customers may
defer or cancel purchases of our existing systems. We cannot forecast the
impact of these and other factors on our sales and operating results.

The semiconductor industry has been cyclical.

Revenue growth has slowed in the test and assembly sector of the
semiconductor equipment industry during what we believe is a cyclical downturn
in the industry. There is uncertainty as to if and when the next cyclical
growth phase will occur. Our belief regarding the downturn is based on weakened
order activity, order cancellation activity, and customer-requested shipment
delays from our existing backlog. This business weakness

19



is worldwide but we see it in particular with customers in Asia. Until such
time as we return to a growth period, we expect a continuing weakness in order
activity and therefore expect that the January 31, 2002 fiscal quarter's
revenue will be flat or declining from the levels we experienced during the
fourth quarter of fiscal 2001 and revenues may continue to decline throughout
fiscal 2002. We reduced our worldwide workforce during fiscal 2001 by
approximately 23%, or about 400 people. We took a charge related to this
reduction in force of approximately $2.0 million in our second fiscal quarter,
$1.0 million in our third fiscal quarter and another $0.2 million in the fourth
fiscal quarter of 2001. Additionally, remaining employees were required to take
time off in the second, third and fourth quarters of fiscal 2001, as well as
the first quarter of fiscal 2002. Other initiatives, including a domestic pay
cut, a four day work week for most manufacturing and some operating employees,
the consolidation and reorganization of certain functions and operations, and
the curtailment of discretionary expenses, were also implemented. If we
continue to reduce our workforce, it may adversely impact our ability to
respond rapidly to any renewed growth opportunities in the future.

With the dramatic decline in revenue during this downturn, we continue to
monitor our inventory levels in light of product development changes and a
possible eventual upturn. We recorded a charge of $45.0 million in the second
fiscal quarter of 2001 and a charge of $38.0 million in the fourth fiscal
quarter of 2001 for the write-down of excess inventories. We may be required to
take additional charges for excess and obsolete inventory if the industry
downturn causes further reductions to our current inventory valuations or
changes our current product development plans.

Our business and results of operations depend largely upon the capital
expenditures of manufacturers of semiconductors and companies that specialize
in contract packaging and/or testing of semiconductors. This includes
manufacturers and contractors that are opening new or expanding existing
fabrication facilities or upgrading existing equipment, which in turn depend
upon the current and anticipated market demand for semiconductors and products
incorporating semiconductors. The semiconductor industry has been highly
cyclical with recurring periods of oversupply, which often has had a severe
effect on the semiconductor industry's demand for test equipment, including the
systems we manufacture and market. We believe that the markets for newer
generations of semiconductors will also be subject to similar fluctuations.

We have experienced shipment delays, delays in commitments and restructured
purchase orders by customers and we expect this activity to continue.
Accordingly, we cannot be certain that we will be able to achieve or maintain
our current or prior level of sales or rate of growth. In addition, sales are
expected to be sequentially flat or down in the next fiscal quarter and
possibly in the upcoming quarters. We anticipate that a significant portion of
new orders may depend upon demand from semiconductor device manufacturers
building or expanding fabrication facilities and new device testing
requirements that are not addressable by currently installed test equipment,
and there can be no assurance that such demand will develop to a significant
degree, or at all. In addition, our business, financial condition or results of
operations may be adversely affected by any factor adversely affecting the
semiconductor industry in general or particular segments within the
semiconductor industry. For example, both the 1997/1998 Asian financial crisis
and the current economic downturn have contributed to widespread uncertainty
and a slowdown in the semiconductor industry. This slowdown in the
semiconductor industry resulted in reduced spending for semiconductor capital
equipment, including ATE which we sell. This industry slowdown had, and similar
slowdowns may in the future have, a material adverse effect on our product
backlog, balance sheet, financial condition and results of operations.
Therefore, there can be no assurance that our operating results will not be
materially adversely affected if downturns or slowdowns in the semiconductor
industry occur again in the future.

Over the last several years we have experienced significant fluctuations in our
operating results and an increased scale of operations.

In the fourth fiscal quarter of fiscal 2001, our net sales fell 73% from
those recorded in the first quarter of fiscal 2001. In fiscal 2000, we
generated revenue of $136.3 million in the first quarter and $221.7 million in
the fourth quarter, an increase of 63%. In fiscal 1999, we generated revenue of
$37.7 million in the first quarter and

20



$97.0 million in the fourth quarter, an increase of 157%. Since 1993, except
for the current cost-cutting efforts and those during fiscal 1998 and the first
half of fiscal 1999, we have overall significantly increased the scale of our
operations in general to support periods of generally increased sales levels
and expanded product offerings and have expanded operations to address critical
infrastructure and other requirements, including the hiring of additional
personnel, significant investments in research and development to support
product development, acquisition of the new facilities in Oregon, further
investments in our ERP system and numerous acquisitions. These fluctuations in
our sales and operations have placed and are continuing to place a considerable
strain on our management, financial, manufacturing and other resources. In
order to effectively deal with the changes brought on by the cyclical nature of
the industry, we have been required to implement and improve a variety of
highly flexible operating, financial and other systems, procedures and controls
capable of expanding, or contracting consistent with our business. However, we
cannot be certain that any existing or new systems, procedures or controls,
including our ERP system, will be adequate to support fluctuations in our
operations or that our systems, procedures and controls will be cost-effective
or timely. Any failure to implement, improve and expand or contract such
systems, procedures and controls efficiently and at a pace consistent with our
business could have a material adverse effect on our business, financial
condition or results of operations.

We are expanding and intend to continue the expansion of our product lines.

We are currently devoting and intend to continue to devote significant
resources to the development, production and commercialization of new products
and technologies. During fiscal 2001 we have primarily introduced products that
are either evolutions or derivatives of existing products. Under the new
revenue recognition policy that is in accordance with SAB 101, we will be
deferring revenue for transactions that involve newly introduced products or
when customers specify acceptance criteria that cannot be demonstrated prior to
the shipment. This will result in a delay in the recognition of revenue as
compared to the historic norm of recognizing revenue upon shipment. Product
introduction delays, if they occur in the future, will delay the recognition of
revenue and gross profit by us. In fiscal 2002, we currently anticipate
introducing new products as well as evolutions and derivatives of current
products. In late fiscal 1999 and into 2000, we shipped three major new
products. We invested and continue to invest significant resources in plant and
equipment, leased facilities, inventory, personnel and other costs to begin or
prepare to increase production of these products. A significant portion of
these investments will provide the marketing, administration and after-sales
service and support required for these new hardware and software products.
Accordingly, we cannot be certain that gross profit margin and inventory levels
will not be adversely impacted by delays in new product introductions or
start-up costs associated with the initial production and installation of these
new product lines. We also cannot be certain that we can manufacture these
systems per the time and quantity required by our customers. The start-up costs
include additional manufacturing overhead, additional inventory and warranty
reserve requirements and the enhancement of after-sales service and support
organizations. In addition, the increases in inventory on hand for new product
development and customer support requirements have increased and will continue
to increase the risk of inventory write-offs. We cannot be certain that our net
sales will increase or remain at historical levels or that any new products
will be successfully commercialized or contribute to revenue growth or that any
of our additional costs will be covered.

There are limitations on our ability to find the supplies and services
necessary to run our business.

We obtain certain components, subassemblies and services necessary for the
manufacture of our testers from a limited group of suppliers. We do not
maintain long-term supply agreements with most of our vendors and we purchase
most of our components and subassemblies through individual purchase orders.
The manufacture of certain of our components and subassemblies is an extremely
complex process. We also rely on outside vendors to manufacture certain
components and subassemblies and to provide certain services. We have
experienced and continue to experience significant reliability, quality and
timeliness problems with several critical components including certain custom
integrated circuits. We cannot be certain that these or other problems will not
continue to occur in the future with our suppliers or outside subcontractors.
Our reliance on a limited group of suppliers and on outside subcontractors
involves several risks, including an inability to obtain an

21



adequate supply of required components, subassemblies and services and reduced
control over the price, timely delivery, reliability and quality of components,
subassemblies and services. Shortages, delays, disruptions or terminations of
the sources for these components and subassemblies have delayed and could
continue to delay shipments of our systems and new products and could continue
to have a material adverse effect on our business. Our continuing inability to
obtain adequate yields or timely deliveries or any other circumstance that
would require us to seek alternative sources of supply or to manufacture such
components internally could also have a material adverse effect on our
business, financial condition or results of operations. Such delays, shortages
and disruptions would also damage relationships with current and prospective
customers and have and could continue to allow competitors to penetrate our
customer accounts. We cannot be certain that our internal manufacturing
capacity or that of our suppliers and subcontractors will be sufficient to meet
customer requirements.

The ATE industry is intensely competitive which can adversely affect our
revenue growth.

With the substantial investment required to develop test application
software and interfaces, we believe that once a semiconductor manufacturer has
selected a particular ATE vendor's tester, the manufacturer is likely to use
that tester for a majority of its testing requirements for the market life of
that semiconductor and, to the extent possible, subsequent generations of
similar products. As a result, once an ATE customer chooses a system for the
testing of a particular device, it is difficult for competing vendors to
achieve significant ATE sales to such customer for similar use. Our inability
to penetrate any large ATE customer or achieve significant sales to any ATE
customer could have a material adverse effect on our business, financial
condition or results of operations.

We face substantial competition from ATE manufacturers throughout the world,
as well as several of our customers. We do not currently compete in the testing
of high-end microprocessors, linear ICs or DRAMs. Moreover, a substantial
portion of our net sales is derived from sales of mixed-signal testers. Many
competitors have substantially greater financial and other resources with which
to pursue engineering, manufacturing, marketing and distribution of their
products. Certain competitors have introduced or announced new products with
certain performance or price characteristics equal or superior to products we
currently offer. These competitors have introduced products that compete
directly against our products. We believe that if the ATE industry continues to
consolidate through strategic alliances or acquisitions, we will continue to
face significant additional competition from larger competitors that may offer
product lines and services more complete than ours. Our competitors are
continuing to improve the performance of their current products and to
introduce new products, enhancements and new technologies that provide improved
cost of ownership and performance characteristics. New product introductions by
our competitors could cause a decline in our sales or loss of market acceptance
of our existing products.

Moreover, our business, financial condition or results of operations could
continue to be materially adversely affected by increased competitive pressure
and continued intense price-based competition. We have experienced and continue
to experience significant price competition in the sale of our products. In
addition, pricing pressures typically become more intense at the end of a
product's life cycle and as competitors introduce more technologically advanced
products. We believe that, to be competitive, we must continue to expend
significant financial resources in order to, among other things, invest in new
product development and enhancements and to maintain customer service and
support centers worldwide. We cannot be certain that we will be able to compete
successfully in the future.

We may not be able to deliver custom hardware options and software applications
to satisfy specific customer needs in a timely manner.

We must develop and deliver customized hardware and software to meet our
customers' specific test requirements. The market requires us to manufacture
these systems on a timely basis. Our test equipment may fail to meet our
customers' technical or cost requirements and may be replaced by competitive
equipment or an alternative technology solution. Our inability to meet such
hardware and software requirements could impact our ability to recognize
revenue on the related equipment. Our inability to provide a test system that
meets requested

22



performance criteria when required by a device manufacturer would severely
damage our reputation with that customer. This loss of reputation may make it
substantially more difficult for us to sell test systems to that manufacturer
for a number of years.

We rely on Spirox Corporation and customers in Taiwan for a significant portion
of our revenues and the termination of this distribution relationship would
materially adversely affect our business.

Spirox Corporation, a distributor in Taiwan that sells to end-user customers
in Taiwan and China, accounted for approximately 13%, 42%, and 30% of our net
sales in fiscal years 2001, 2000 and 1999, respectively. Our agreement with
Spirox can be terminated for any reason on 90 days prior written notice. The
semiconductor industry is highly concentrated, and a small number of
semiconductor device manufacturers and contract assemblers account for a
substantial portion of the purchases of semiconductor test equipment generally,
including our test equipment. Our top ten end user customers have recently
accounted for a substantial portion of our net sales. Consequently, our
business, financial condition and results of operations could be materially
adversely affected by the loss of or any reduction in orders by Spirox, any
termination of the Spirox relationship, or any other significant customer,
including the potential for reductions in orders by assembly and tester service
companies which that customer may utilize or reductions due to continuing or
other technical, manufacturing or reliability problems with our products or
continued slow-downs in the semiconductor industry or in other industries that
manufacture products utilizing semiconductors. Our ability to maintain or
increase sales levels will depend upon:

. our ability to obtain orders from existing and new customers;

. our ability to manufacture systems on a timely and cost-effective basis;

. our ability to timely complete the development of our new hardware and
software products;

. our customers' financial condition and success;

. general economic conditions; and

. our ability to meet increasingly stringent customer performance and other
requirements and shipment delivery dates.

Our long and variable sales cycle depends upon factors outside of our control
and could cause us to expend significant time and resources prior to earning
associated revenues.

Sales of our systems depend in part upon the decision of semiconductor
manufacturers to develop and manufacture new semiconductor devices or to
increase manufacturing capacity. As a result, sales of our products are subject
to a variety of factors we cannot control. The decision to purchase our
products generally involves a significant commitment of capital, with the
attendant delays frequently associated with significant capital expenditures.
For these and other reasons, our systems have lengthy sales cycles during which
we may expend substantial funds and management effort to secure a sale,
subjecting us to a number of significant risks. We cannot be certain that we
will be able to maintain or increase net sales in the future or that we will be
able to retain existing customers or attract new ones.

If we engage in acquisitions, we will incur a variety of costs, and the
anticipated benefits of the acquisitions may never be realized.

We have developed in significant part through mergers and acquisitions of
other companies and businesses. We intend in the future to pursue additional
acquisitions of complementary product lines, technologies and businesses. We
may have to issue debt or equity securities to pay for future acquisitions,
which could be dilutive to then current stockholders. We have also incurred and
may continue to incur certain liabilities or other expenses in connection with
acquisitions, which have and could continue to materially adversely affect our
business, financial condition and results of operations.

23



In addition, acquisitions involve numerous other risks, including:

. difficulties assimilating the operations, personnel, technologies and
products of the acquired companies;

. diversion of our management's attention from other business concerns;

. increased complexity and costs associated with internal management
structures;

. risks of entering markets in which we have no or limited experience; and

. the potential loss of key employees of the acquired companies.

For these reasons, we cannot be certain what effect future acquisitions may
have on our business, financial condition and results of operations.

Changes to financial accounting standards may affect our reported results of
operations.

We prepare our financial statements to conform with generally accepted
accounting principles, or GAAP. GAAP are subject to interpretation by the
American Institute of Certified Public Accountants, the SEC and various bodies
formed to interpret and create appropriate accounting policies. A change in
those policies can have a significant effect on our reported results and may
even affect our reporting of transactions completed before a change is
announced. Accounting rules affecting many aspects of our business, including
rules relating to purchase and pooling-of-interests accounting for business
combinations, in-process research and development charges, asset impairment,
revenue recognition, employee stock purchase plans and stock option grants have
recently been revised or are currently under review. Changes to those rules or
current interpretation of those rules may have a material adverse effect on our
reported financial results or on the way we conduct our business. For example,
in the fourth quarter of fiscal 2001, we implemented SAB 101. Adoption of SAB
101 required us to restate our quarterly results for the seven fiscal quarters
ended July 31, 2001 (see Notes 1 and 13 of the Notes to the Consolidated
Financial Statements for further discussion). In addition, the preparation of
our financial statements in accordance with GAAP requires that we make
estimates and assumptions that affect the recorded amounts of assets and
liabilities, disclosure of those assets and liabilities at the date of the
financial statements and the recorded amounts of expenses during the reporting
period. A change in the facts and circumstances surrounding those estimates
could result in a change to our estimates and could impact our future operating
results.

Our executive officers and certain key personnel are critical to our business.

Our future operating results depend substantially upon the continued service
of our executive officers and key personnel, none of whom are bound by an
employment or non-competition agreement. Our future operating results also
depend in significant part upon our ability to attract and retain qualified
management, manufacturing, technical, engineering, marketing, sales and support
personnel. Competition for qualified personnel is intense, and we cannot ensure
success in attracting or retaining qualified personnel. There may be only a
limited number of persons with the requisite skills to serve in these positions
and it may be increasingly difficult for us to hire personnel over time. Our
business, financial condition and results of operations could be materially
adversely affected by the loss of any of our key employees, by the failure of
any key employee to perform in his or her current position, or by our inability
to attract and retain skilled employees.

Our international business exposes us to additional risks.

International sales accounted for approximately 61%, 74%, and 55% of our
total net sales for fiscal 2001, 2000 and 1999, respectively. As a result, we
anticipate that international sales will continue to account for a significant
portion of our total net sales in the foreseeable future. These international
sales will continue to be subject to certain risks, including:

. changes in regulatory requirements;

24



. tariffs and other barriers;

. political and economic instability;

. an outbreak of hostilities;

. integration and management of foreign operations of acquired businesses;

. foreign currency exchange rate fluctuations;

. difficulties with distributors, joint venture partners, original equipment
manufacturers, foreign subsidiaries and branch operations;

. potentially adverse tax consequences; and

. the possibility of difficulty in accounts receivable collection.

We are also subject to the risks associated with the imposition of domestic
and foreign legislation and regulations relating to the import or export of
semiconductor equipment and software products. We cannot predict whether the
import and export of our products will be subject to quotas, duties, taxes or
other charges or restrictions imposed by the United States or any other country
in the future. Any of these factors or the adoption of restrictive policies
could have a material adverse effect on our business, financial condition or
results of operations. Net sales to the Asia-Pacific region accounted for
approximately 38%, 66%, and 47% of our total net sales in fiscal 2001, 2000 and
1999, respectively, and thus demand for our products is subject to the risk of
economic instability in that region and could continue to be materially
adversely affected. Countries in the Asia-Pacific region, including Korea and
Japan, have experienced weaknesses in their currency, banking and equity
markets in the recent past. These weaknesses could continue to adversely affect
demand for our products, the availability and supply of our product components
and our consolidated results of operations. The 1997/1998 Asian financial
crisis contributed to widespread uncertainty and a slowdown in the
semiconductor industry. This slowdown resulted in reduced spending on
semiconductor capital equipment, including ATE, and has had, and may in the
future have, a material adverse effect on our product backlog, balance sheet
and results of operations. Further, many of our customers in the Asia-Pacific
region built up capacity in ATE during fiscal 2000 in anticipation of a steep
ramp up in wafer fabrication. However, this steep ramp up in output has not
fully materialized leaving some customers with excess capacity.

Two end-user customers headquartered in Europe accounted for approximately
13% and 11% respectively, of our net sales in fiscal 2001 and one end-user
customer headquartered in Taiwan accounted for 17% of our net sales in fiscal
2000.

In addition, one of our major distributors, Spirox Corporation, is a
Taiwan-based company. This subjects a significant portion of our receivables
and future revenues to the risks associated with doing business in a foreign
country, including political and economic instability, currency exchange rate
fluctuations and regulatory changes. Disruption of business in Asia caused by
the previously mentioned factors could continue to have a material impact on
our business, financial condition or results of operations.

If the protection of proprietary rights is inadequate, our business could be
harmed.

We attempt to protect our intellectual property rights through patents,
copyrights, trademarks, maintenance of trade secrets and other measures,
including entering into confidentiality agreements. However, we cannot be
certain that others will not independently develop substantially equivalent
intellectual property or that we can meaningfully protect our intellectual
property. Nor can we be certain that our patents will not be invalidated,
deemed unenforceable, circumvented or challenged, or that the rights granted
thereunder will provide us with competitive advantages, or that any of our
pending or future patent applications will be issued with claims of the scope
we seek, if at all. Furthermore, we cannot be certain that others will not
develop similar products, duplicate our products or design around our patents,
or that foreign intellectual property laws, or agreements into which we

25



have entered will protect our intellectual property rights. Inability or
failure to protect our intellectual property rights could have a material
adverse effect upon our business, financial condition and results of
operations. We have been involved in extensive, expensive and time-consuming
reviews of, and litigation concerning, patent infringement claims.

Our business may be harmed if we are found to infringe proprietary rights of
others.

We have at times been notified that we may be infringing intellectual
property rights of third parties and we have litigated patent infringement
claims in the past. We expect to continue to receive notice of such claims in
the future. In July 1998, inTEST alleged in writing that certain of our
products are infringing a patent held by inTEST. We have since then engaged in
sporadic discussions with inTEST concerning this matter. On December 15, 2000,
inTEST filed a complaint in the U.S. District Court for the District of
Delaware against us, alleging infringement of inTEST U.S. patent number
4,589,815 and seeking damages and injunctive relief. In April 2001, we were
served with the complaint and since that date discovery has commenced. We may
also be obligated to other third parties relating to this allegation. We
currently intend to vigorously defend ourselves against this claim and we
believe we have meritorious defenses to the claims. However, we cannot be
certain of success in defending this patent infringement claim or claims for
indemnification resulting from infringement claims.

Some of our customers have received notices from Mr. Jerome Lemelson
alleging that the manufacture of semiconductor products and/or the equipment
used to manufacture semiconductor products infringes certain patents issued to
Mr. Lemelson. We have been notified by customers that we may be obligated to
defend or settle claims that our products infringe Mr. Lemelson's patents, and
that if it is determined that the customers infringe Mr. Lemelson's patents,
that customers intend to seek indemnification from us for damages and other
related expenses.

We cannot be certain of success in defending current or future patent or
other infringement claims or claims for indemnification resulting from
infringement claims. Our business, financial condition and results of
operations could be materially adversely affected if we must pay damages to a
third party or suffer an injunction or if we expend significant amounts in
defending any such action, regardless of the outcome. With respect to any
claims, we may seek to obtain a license under the third party's intellectual
property rights. We cannot be certain, however, that the third party will grant
us a license on reasonable terms or at all. We could decide, in the
alternative, to continue litigating such claims. Litigation has been and could
continue to be extremely expensive and time consuming, and could materially
adversely affect our business, financial condition or results of operations,
regardless of the outcome.

A variety of factors may cause the price of our stock to be volatile.

In recent years, the stock market in general, and the market for shares of
high-tech companies in particular, including ours, have experienced extreme
price fluctuations, which have often been unrelated to the operating
performance of affected companies. For example, in fiscal 2000, the price of
our common stock has ranged from a closing high of $74.59 to a closing low of
$16.13. In fiscal 2001 and through December 2001, the price of our common stock
has ranged from a closing high of $29.50 to a closing low of $11.26. The market
price of our common stock is likely to continue to fluctuate significantly in
the future, including fluctuations unrelated to our performance. We believe
that fluctuations of our stock price may be caused by a variety of factors,
including:

. announcements of developments related to our business;

. fluctuations in our financial results;

. general conditions in the stock market or around the world, terrorism, or
developments in the semiconductor and capital equipment industry and the
general economy;

. sales or purchases of our common stock in the marketplace;

26



. announcements of our technological innovations or new products or
enhancements or those of our competitors;

. developments in patents or other intellectual property rights;

. developments in our relationships with customers and suppliers;

. a shortfall or changes in revenue, gross margins or earnings or other
financial results from analysts' expectations or an outbreak of
hostilities or natural disasters; or

. acquisition or merger activity and the success in implementing such
acquisitions or other business combinations.

Terrorist attacks and threats, and government responses thereto, may negatively
impact all aspects of our operations, revenues, costs and stock price.

The recent terrorist attacks in the United States, the U.S. retaliation for
these attacks and the related decline in consumer confidence and continued
economic weakness have had a substantial adverse impact on the economy. If
consumer confidence does not recover, our revenues and profitability may be
adversely impacted in the first fiscal quarter of 2002 and beyond.

In addition, any similar future events may disrupt our operations or those
of our customers and suppliers. In addition, these events have had and may
continue to have an adverse impact on the U.S. and world economy in general and
consumer confidence and spending in particular, which could harm our sales. Any
of these events could increase volatility in the U.S. and world financial
markets which could harm our stock price and may limit the capital resources
available to us and our customers or suppliers. This could have a significant
impact on our operating results, revenues and costs and may result in increased
volatility in the market price of our common stock.

We are subject to anti-takeover provisions that could delay or prevent an
acquisition of our company.

Provisions of our amended and restated certificate of incorporation,
shareholders rights plan, equity incentive plans, bylaws and Delaware law may
discourage transactions involving a change in corporate control. In addition to
the foregoing, our classified board of directors, the stockholdings of our
officers, directors and persons or entities that may be deemed affiliates, our
shareholder rights plan and the ability of our board of directors to issue
preferred stock without further stockholder approval could have the effect of
delaying, deferring or preventing a third party to acquire us and may adversely
affect the voting and other rights of holders of our common stock.

Item 2. Properties

We maintain our corporate headquarters in Fremont, California. This leased
facility, comprised of four buildings totaling 165,600 square feet, contains
corporate administration, sales, marketing, applications, engineering, local
customer support and memory products manufacturing. Approximately 26,000 square
feet of one of the buildings has been subleased until February 2005 when the
lease on this facility expires.

Our digital and mixed signal manufacturing facilities, as well as additional
administration, marketing, applications, engineering and customer support
functions, are located in a 180,000 square foot facility, comprised of two
buildings in Hillsboro, Oregon. This property is on approximately twenty-nine
acres of land and was purchased during fiscal 2000. In addition, the Company
purchased approximately eighteen acres of land less than a mile from the
Hillsboro facility. The IMS facilities, which also house our software business,
are located in a 90,000 square foot facility in Beaverton, Oregon. The lease on
this building expires in February 2004. We maintain various remote sales and
service offices in the United States including approximately 27,000 square feet
in Austin, Texas and 26,000 square feet in Colorado Springs, Colorado. We also
lease various smaller facilities worldwide for our sales offices and an IMS
European manufacturing and design center.

27



Item 3. Legal Proceedings

In July 1998, we received a written allegation from inTEST IP Corp., or with
its patent licensee inTEST Corporation, inTEST, that we were infringing on a
patent held by inTEST. We have since then engaged in sporadic discussions with
inTEST concerning this matter. On December 15, 2000, inTEST filed a complaint
in the U.S. District Court for the District of Delaware against us, alleging
infringement of inTEST U.S. patent number 4,589,815 and seeking damages and
injunctive relief. In April 2001 we were served with the complaint and since
that date discovery has commenced. In addition to direct costs and diversion of
resources which may result, we may be obligated to indemnify third parties for
costs related to this allegation. We are involved in other various claims
arising in the ordinary course of business, none of which, in the opinion of
management, if determined adversely against us, will have a material adverse
effect on our business, financial condition or results of operations.

Item 4. Submission of Matters to a Vote of Securityholders

None.

28



EXECUTIVE OFFICERS AND KEY EMPLOYEES

Our executive officers and key employees and their ages and positions as of
December 31, 2001, are as follows:



Name Age Position
---- --- --------

Executive Officers
Dr. Graham J. Siddall 55 Chairman of the Board and Chief Executive Officer
David A. Ranhoff..... 46 President and Chief Operating Officer
Keith L. Barnes...... 50 Executive Vice President; President and CEO of IMS
John R. Detwiler..... 41 Senior Vice President, Chief Financial Officer, and Secretary
Fred Hall............ 52 Senior Vice President, Human Resources

Key Employees
George W. DeGeer..... 55 Senior Vice President & GM, Consumer Mixed Signal Division
Bart Freedman........ 44 Senior Vice President, Worldwide Field Operations
Gary Smith........... 55 Vice President & GM, Industrial, Communications and
Entertainment Test Division
Paul Sakamoto........ 47 Vice President & GM, Memory Products Division
Debra Moberly........ 47 Vice President, Operations
Glyn Davies.......... 39 Vice President, Corporate Marketing
Byron Milstead....... 45 Vice President and General Counsel
Sheila Franzen....... 31 Vice President, Information Technology
W. Barry Baril....... 50 Corporate Chief Technology Officer


Dr. Graham J. Siddall has served as the Chairman of the Board and Chief
Executive Officer since August 2001 and prior to that was our President, Chief
Executive Officer and a Director from July 1999 to August 2001. His current
term as a Director ends in 2002. Dr. Siddall joined us from KLA-Tencor where he
had been Executive Vice President of the Wafer Inspection Group from May 1997
to May 1999. From December 1995 until May 1997, he served as Executive Vice
President and chief operating officer of Tencor Instruments, Inc. Previously
Dr. Siddall served as Senior Vice President for the Tencor Wafer Inspection
Division from November 1994 to December 1995. He joined Tencor as a vice
president in 1988. Prior to joining Tencor, Dr. Siddall served in a number of
key roles at GCA Corporation, Hewlett Packard Laboratories and Rank Taylor
Hobson.

David A. Ranhoff has served as President and Chief Operating Officer since
August 2001 and prior to that he was our Executive Vice President and Chief
Operating Officer since November 1999. Mr. Ranhoff was Executive Vice
President, Sales and Marketing from January 1997 to November 1999 and was named
to the Office of the President from December 1998 until July 1999. Mr. Ranhoff
served as Senior Vice President Sales and Marketing from July 1996 to January
1997, as Senior Vice President, Sales, Marketing and Service from July 1995 to
June 1996, as Senior Vice President, Sales and Service from August 1993 to July
1995 and as Vice President, Sales from January 1993 to August 1993. He served
as Vice President, European Operations from July 1990 to December 1992. From
March 1988 to June 1990, Mr. Ranhoff served as Managing Director of Eu