Back to GetFilings.com



UNITED STATES
SECURITIES AND EXCHANGE COMMISSION

Washington, D.C. 20549


FORM 10-K

[X] ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d)
OF THE SECURITIES EXCHANGE ACT OF 1934

For the Fiscal Year Ended September 30, 2003

OR

[ ] TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d)
OF THE SECURITIES EXCHANGE ACT OF 1934

For the Transition Period From ___________ to ____________

Commission File Number 0-25424


SEMITOOL, INC.
(Exact Name of Registrant as Specifited in Its Charter)

Montana 81-0384392
(State or other jurisdiction of
incorporation or organization)
(I.R.S. Employer
Identification No.)

Semitool, Inc.
655 West Reserve Drive, Kalispell, Montana 59901
(406) 752-2107

(Address, including zip code, and telephone number, including
area code, of registrant's principal executive offices)

Securities registered pursuant to Section 12(b) of the Act: None

Securities registered pursuant to Section 12(g) of the Act: Common Stock, no par value

Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. Yes [X] No [ ]

Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K. [ ]

Indicate by check mark whether the registrant is an accelerated filer (as defined in Rule 12b-2 of the Exchange Act). Yes [ ] No [X]

The approximate aggregate market value of the voting stock held by non-affiliates of the registrant on March 31, 2003 (based on the last reported sale price on the Nasdaq National Market as of such date) was $67,329,515.

The number of shares of the registrant’s Common Stock, no par value, outstanding as of December 11, 2003 was 28,481,027.

DOCUMENTS INCORPORATED BY REFERENCE

There is incorporated by reference in Part III of this Annual Report on Form 10-K the information contained in the registrant’s definitive proxy statement for its annual meeting of shareholders to be held February 17, 2004.

PART I

Introduction – Forward-Looking Statements

        Statements contained in this Annual Report on Form 10-K which are not purely historical facts are forward-looking statements within the meaning of Section 27A of the Securities Act of 1933, as amended, and Section 21E of the Securities Exchange Act of 1934. Forward-looking statements are included in the discussion of our business, properties and legal matters and include, without limitation, statements regarding:

        Other forward-looking statements made below under the heading “Management’s Discussion and Analysis of Financial Condition and Results of Operations” and elsewhere include statements relating to:

        Management cautions that forward-looking statements are subject to risks and uncertainties that could cause our actual results to differ materially from those projected in such forward-looking statements. These risks and uncertainties are detailed under the heading “Factors That Might Affect Our Future Financial Results and Stock Price” and elsewhere in this Annual Report on Form 10-K. We undertake no obligation to update forward-looking statements to reflect subsequent events, changed circumstances, or the occurrence of unanticipated events.

Item 1. Business

Overview

        We design, manufacture, install and service highly engineered equipment for use in the fabrication of semiconductor devices. Our products are focused on the wet chemical process steps in integrated circuit, or IC, manufacturing and include systems for electrochemical deposition, wafer surface preparation and wafer transport container cleaning. Our electrochemical deposition systems are used for plating copper and gold for the IC’s internal wiring, or interconnects; solder and gold bumps for wafer level packaging applications; and other metals for various semiconductor and related applications. Our surface preparation systems are designed for wet cleaning, stripping and etching processes, including photoresist and polymer removal and metal etching. Typically, there are hundreds of manufacturing steps in fabricating semiconductor devices and after many of these steps a wet cleaning, stripping or etching process is required. Our customers include many of the major semiconductor device and wafer level packaging manufacturers worldwide.

        Semitool, a Montana corporation, was founded in 1979 and is headquartered in Kalispell, Montana. Our mailing address is 655 West Reserve Drive, Kalispell, MT 59901 and our telephone number is 406-752-2107. Additional information about the Company is available on our website at http://www.semitool.com. On our Investor Relations page on our website, we post the following filings as soon as practicable after they are electronically filed with or furnished to the Securities and Exchange Commission: our annual report on Form 10-K, our quarterly reports on Form 10-Q, our current reports on Form 8-K and any amendments to those reports filed or furnished pursuant to Sections 13(a) or 15(d) of the Securities Exchange Act of 1934. All such filings on our own Investor Relations web page are available to be viewed on this page free of charge. Information contained on our website is not part of this annual report on Form 10-K or our other filings with the Securities and Exchange Commission. We assume no obligation to update or revise any forward-looking statements in this annual report on Form 10-K, whether as a result of new information, future events or otherwise, unless we are required to do so by law. Our Form 10-K and other filings also are available at the Securities and Exchange Commission’s website at http://www.sec.gov.

Industry Background

        The semiconductor industry produces microelectronic devices that are used in a broad array of consumer and industrial products such as computers, cellular phones, televisions, audio systems and automobiles. The semiconductor equipment industry, of which we are a part, serves the semiconductor industry.

        Microelectronic devices consist of millions of microscopic transistors and other components that store information and allow the execution of instructions. These components are connected together with metal wiring to form the functional IC. Fabrication of an IC involves hundreds of complex and repetitive process steps, involving an array of sophisticated manufacturing equipment and chemical media. ICs are fabricated on substrates, or wafers, made of a semiconductor material, most commonly silicon. The fabrication process involves, among others, the deposition of multiple layers of dielectric or insulating films and electrically conducting metal films and repeated cleaning, stripping and etching processes to prepare the surface for the next step. When completed, the wafer may contain several hundred ICs. Traditionally, the individual ICs are separated from the wafer by a process involving sawing, or dicing, after which the wafer is cleaved into separate ICs. The IC is then packaged by connecting it to pins via metal wires or contacts and encapsulating the IC in a polymer. Some manufacturers are using a newer process that allows for packaging the ICs before they are separated from the wafer. The packaged microelectronic devices are then placed into an electronic product, such as a computer or cellular phone.

        Cleaning, stripping, etching or otherwise conditioning the surface of the wafer are steps repeated throughout the semiconductor fabrication process. These processes are important, since the integrity of the next step may depend strongly on the effectiveness of the cleaning, stripping, or etching step. In addition, process reliability and particle contamination are increasingly critical, as shrinking device dimensions link ever-smaller contaminants and lower contamination levels to IC failure. Relatively new materials such as copper and low-K dielectrics are changing the manner in which deposition processes are performed, and these fundamental material changes influence the direction of process development.

        There are two fundamental means by which surface preparation wet process steps are performed, spray and immersion. Immersion processes, or wet benches, use a series of liquid-filled tanks in which wafers are immersed. The wafers are transported from one tank to another tank by robots or human operators. Spray delivery systems subject wafers to sequential spray applications of chemicals while the wafers are spun on their axis inside an enclosed process chamber, where the chemical is brought to the wafers instead of the wafers to the chemical. Spray technology utilizes the chemical reaction, the mechanical force of the spray and the centrifugal force from spinning to remove contaminants and dry the wafers. Spray systems can be configured to process wafers in a batch or single-wafer mode.

        The semiconductor industry is showing an increased interest in spray processing systems in both single-wafer and batch formats. Reasons for this include the more aggressive nature of a spray process when compared to an immersion process and the reduced footprint, which saves costly clean room space. Spray systems, especially in a single-wafer format, may offer a greater potential for efficiently processing wafers containing ICs with smaller feature sizes on large substrates as they offer greater control of the process.

        Newer packaging technologies have been developed and are being adopted by the industry to enable smaller personal products such as PDAs and mobile phones. These technologies are called wafer level or chip-scale packaging. This method packages the IC’s while they are still in the wafer-state, so that upon separation from the wafer the IC can be directly placed into an electronic product. Wafer level packaging is an enabling technology for the semiconductor industry, as it allows the integration of more computing and information processing power in a smaller space than conventional packaging technology. Wafer level packaging uses fabrication processes similar to IC fabrication and includes, among others, electrochemical deposition for connective solder and gold bumps, photoresist stripping and under-bump metal etching.

        Reducing the size of each IC increases the number of ICs that can be fabricated on any size wafer. This reduces the cost per device on a given wafer and, in addition, provides a potential for increased capacity on existing equipment. To further reduce costs, the industry has begun a migration to the 300mm, or 12 inch, diameter wafer from the common 200mm, or 8 inch, wafer size. Most 300mm processing cannot be performed on previous generations of equipment, necessitating the purchase of new systems. While new 200mm fabs continue to be built, most new fabs are now 300mm. As 300mm fabs cost more to build and provide greater capacity, it is possible that fewer will be built as compared to 200mm fabs.

        The semiconductor industry has experienced significant growth in semiconductor foundry capacity. A foundry is a manufacturer that fabricates devices on a contract basis for IC designers that typically do not have a fabrication capability or may not have sufficient capacity to meet their own needs. Most of the foundry growth has been in Asia, particularly Taiwan. It is anticipated that China may provide a base of further expansion of foundries, which is expected to provide a substantial market for semiconductor equipment.

        Despite broad-based markets, the semiconductor industry experiences business cycles that are punctuated by periods of either under or over supply. In general, in periods of under supply, semiconductor manufacturers increase capital equipment spending and, conversely, in periods of over supply reduce their capital equipment spending. However, the market for semiconductor equipment also is characterized by rapid technological development and product innovation. As a result, to meet new technological advancements, manufacturers may purchase new equipment despite the timing of the market cycle.

The Semitool Solutions

        We leverage our extensive experience to provide equipment and process solutions for the electrochemical deposition, wafer surface preparation, cleaning, stripping and etching segments of the semiconductor equipment market.

        Electrochemical Deposition Solutions. Our electrochemical deposition, or ECD, systems incorporate proprietary electroplating technology on a platform that processes one wafer at a time in multiple process chambers. Our leading single-wafer design is modular, with process chambers arranged in a linear orientation, providing flexibility in system configuration. Typically, these systems include a combination of ECD and surface preparation process chambers to address a customer’s specific application. ECD applications include copper interconnect and seed layer repair for logic and power ICs, gold bumps for high speed communication ICs, and solder bumps for advanced wafer level packaging. These systems are available to accommodate wafer diameters from 100mm to 300mm and can be scaled for customers’ capacity requirements. We introduced our first electroplating system in 1993 and continue to be a technological leader in electroplating applications for the semiconductor industry. Selling prices of these systems typically range from approximately $1.5 to $2.8 million.

        Single-Wafer Surface Preparation Solutions. Our single-wafer processing systems for wet cleaning, stripping and etching are available to accommodate 150mm, 200mm and 300mm wafer sizes. These systems share a common platform with our ECD equipment and are designed with a linear arrangement of the processing chambers for high volume production. In addition, our patented Capsule process chamber provides selectable processing for each side of the wafer. Selling prices for these systems range from $1.5 to $2.6 million.

        Batch Wafer Surface Preparation Solutions. Our batch systems for wet cleaning, stripping and etching applications include fully and semi-automated systems for 150mm, 200mm and 300mm wafer processing in up to 50 wafer batches. These systems use proprietary spray technology to deliver the chemicals, deionized water and gases to the wafer surface in an enclosed chamber. The wafers are spun on their axis and exposed to a sequenced spray of chemicals and dry nitrogen gas to process and dry the wafers. This technology enables precise and uniform application of process chemicals and enhances process reliability and cost effectiveness through reduced particle contamination and process cycle time. Our cost-effective ozone and water based cleaning process, called HydrOzone, is available on selected systems. This environmentally friendly process can replace traditional processes using sulfuric acid and other hazardous chemicals resulting in lower costs, reduced process cycle time and water consumption. Selling prices for these systems range from under $15,000 to $2.0 million.

Strategy

        Our objective is to increase our worldwide market share in electrochemical deposition, surface preparation, wafer level packaging and ancillary applications used by the semiconductor and related industries. Our business strategy incorporates the following key elements:

        Maintain and Expand Technology Leadership. We intend to continue investing in research and development to maintain and expand our position as a technological leader in surface preparation and electrochemical deposition. Our focus is on delivering leading-edge technical innovation and system reliability with yield enhancement and low cost of ownership. We believe these factors are the leading drivers for market acceptance of semiconductor processing equipment.

        Offer a Broad Range of Products Incorporating Innovative Wet Processing Technologies. We offer a broad range of differentiated products for use in diverse process applications to broaden our opportunity in the semiconductor related markets and with each customer.

        Integrate Design and Manufacturing Expertise. Our strategy is one of close integration of design and manufacturing, coupled with selective vertical manufacturing integration to achieve innovative solutions, cost and quality advantages and to reduce the time to market for new products and product enhancements.

        Expansion of Asian Market Presence. Over the past several years, we have expanded our presence in the Asian market and revenue from that region is a significant part of consolidated net revenues. We believe the Asian region, including China, has the potential for additional significant long-term growth. It is our sales, marketing and service strategy to expand our installed base of equipment in this region.

Products

        Our broad product suite of highly engineered, innovative processing systems leverages our core wet chemical processing expertise, and more than two decades of experience building and supporting production-proven semiconductor manufacturing equipment. Our primary wet chemical processing solutions are electrochemical deposition equipment, primarily for the plating of copper, gold and solder, multi-wafer batch and single-wafer cleaning, stripping and etching equipment and wafer transport container cleaning equipment. All of these solutions leverage and extend our original spin-spray technologies.

        Electrochemical Deposition (ECD) Products

RAIDER ECD
        The Raider ECD is an automated single-wafer processor for high volume electrochemical deposition. The specific configuration of its multiple processing chambers determines which semiconductor IC and advanced packaging markets the Raider ECD serves. For copper interconnect, several process steps can be integrated onto a single system such as ECD seed layer repair, ECD fill, wafer backside clean, bevel-edge clean, film thickness metrology and rapid thermal anneal. The tool uses our proprietary computational fluid dynamics, or CFD, designed processing chamber arranged in a linear format. This CFD chamber allows the user to optimize plating profiles for downstream operations such as better matching of film characteristics to chemical-mechanical planarization equipment, resulting in reduced processing time and cost. Our proprietary Capsule cleaning chamber, which is also used in our Raider SP, is integrated into the tool for bevel-edge and other cleaning processes. The modularity of the platform provides our customers with the flexibility to configure the chamber mix to meet their specific needs. The primary applications for the Raider ECD are copper, gold, nickel, platinum and solder depositions. It is available to accommodate 150mm, 200mm and 300mm wafer sizes.

ACMS
        The Advanced Chemical Management System, or ACMS, is an automated electroplating bath control unit. It maintains the desired chemical balance in the plating baths by automatically analyzing and replenishing the chemical constituents using our proprietary technology. Fully integrated with the Company’s ECD systems, the primary applications are copper and solder deposition.

        Single-Wafer Surface Preparation Products

RAIDER SP
        The Raider SP is a fully automated system with up to ten single-wafer process chambers for high volume production. The flexibility of its linear design makes it one of the most versatile wet cleaning, stripping and etching platforms in the industry. The tool can be equipped with our proprietary Capsule chamber, which allows side selectable processing. In addition, the system can be equipped with spray, immersion, megasonic, or vapor process chambers. Applications include wafer backside, bevel and edge clean for removal of unwanted copper and other contamination, post-etch polymer removal, critical pre-deposition cleans, and metal etching. The Raider SP is available to accommodate 150mm, 200mm & 300mm wafer sizes.

        Batch Wafer Surface Preparation Products

SIRIUS
        Introduced to the market during fiscal 2002, the Sirius was designed specifically to deliver our patented HydrOzone process. HydrOzone, using a minimal amount of deionized water and ozone is a low cost, low environmental impact process option in comparison to the typical processes used for photoresist stripping, photolithography rework and organic cleans as it does not require the use of sulfuric acid with its related used, disposal and delivery costs. The Sirius is a manually loaded semi-automated system with a 50 wafer capacity spray processing chamber. The system is available to accommodate either 200mm or 300mm wafer sizes.

SPECTRUM & SPECTRUM HO
        The Spectrum is an advanced automated batch processing system for cleaning, stripping and etching applications. Its compact modular design features high throughput, flexible process formats and precise control for low cost of ownership. In addition to our proprietary spray processing modules, the Spectrum can be equipped with immersion and surface tension gradient dry capabilities. It can be configured to use either corrosives, solvents or our proprietary hydrozone (Spectrum HO) based processes for polymer removal, photoresist strip and critical cleaning applications. The Spectrum is available to accommodate both 200mm and 300mm wafer sizes.

SAT
        The Spray Acid Tool, or SAT, is a manually loaded semi-automated system for performing sequential processing of 25 wafers per spray process chamber. The SAT is designed for wafer processing using highly caustic and corrosive media for an array of cleaning, stripping and etching applications. The system can be equipped with up to three 200mm process chambers and is ideal for medium to low production volumes and research and development activity.

SST
        The Spray Solvent Tool, or SST, is a manually loaded semi-automated system for performing sequential processing of 25 wafers per spray process chamber. The SST is designed for wafer processing using flammable solvents for removal of photoresist, etch polymers, polyimides and organic contaminants. The system can be equipped with up to two 200mm process chambers and is ideal for medium to low production volumes and research and development activity.

SRD
        The Spin Rinser/Dryer, or SRD, is a high efficiency cleaning system utilizing deionized water to remove water soluble contaminants, chemical residue and particulate matter. The SRD is available with up to three 25 wafer spray process chambers in a single system. It is available to accommodate wafer sizes up to 300mm in diameter.

SCEPTER
        The Scepter series is an advancement of our semi-automated products, the SATs, SSTs, and SRDs, that offers double the productivity of the 25 wafer capacity tools by processing 50 wafers at a time in nearly the same system footprint. The Scepter can process wafer sizes up to 200mm in diameter.

        Wafer Transport Container Cleaning

STORM
        The Storm is designed to clean the containers used to transport the wafers from process step to process step. A key factor in achieving high manufacturing yields is controlling contamination from these reusable containers. Our system processes multiple containers simultaneously, offering high productivity in a small footprint and is available to accommodate either 200mm or 300mm wafer sizes.

Customers, Sales and Marketing

        Our customers include leading worldwide semiconductor manufacturers. The following is a representative list in alphabetical order of our largest United States and international customers:

Advanced Micro Devices
Agilent Technologies
Anadigics
Cree
Headway Technologies
Hewlett Packard
IBM
Infineon
              Intel
Maxim Integrated Products
Micron Technology
Motorola
National Semiconductor
NEC
Sandia National Laboratories
Sanyo
              Seagate
Semiconductor Mfg. Intl. Corp.
Siliconware Precision Industries
STMicroelectronics
Taiwan Semiconductor Mfg. Co. LTD
Texas Instruments
United Microelectronics Corporation
United Monolithic Semiconductors

        Our top ten customers accounted for 58.4%, 58.6% and 38.7% of net sales in fiscal 2003, 2002 and 2001. Advanced Micro Devices accounted for 19.4% and 21.2% of our net sales in fiscal 2003 and fiscal 2002, respectively. No customer accounted for over 10% of net sales in fiscal 2001.

        International sales, primarily in Europe, Asia and Japan, accounted for approximately 61.4% of consolidated net sales in fiscal 2003, 62.6% of consolidated net sales in fiscal 2002 and 63.8% of consolidated net sales for fiscal 2001. While the relative proportion of international sales to total consolidated sales is nearly unchanged from fiscal 2002 to 2003, the geographic mix has shifted. On a combined basis, sales in Japan and Korea declined nearly 17% year-over-year, while the rest of Asia and Europe declined by lesser amounts. We have direct sales and customer support organizations located in Europe, Japan, Singapore and Korea, and for some products, an independent distributor serves Japan. Independent sales representatives serve Taiwan and China. We market and sell our products in the United States through our sales organization, which includes direct sales personnel and a limited use of independent sales representatives for specific products.

        Field service personnel and application engineers located in the United States, Europe, Japan and Asia, provide warranty service, post-warranty service and equipment installation. Field service engineers are located at over 40 sites throughout the world, including dedicated site-specific engineers at certain customer locations pursuant to customer agreements. We also provide service and maintenance training, as well as process application training for our customers’ personnel on a fee basis. Spare parts inventories are maintained in 19 outsourced locations throughout the world, which allows us to offer same day or overnight delivery in most instances.

Backlog and Deferred Revenue

        Consolidated orders backlog was $19.9 million at September 30, 2003, down 27.9% from $27.6 million at September 30, 2002. Semiconductor equipment orders represented 100% of consolidated orders backlog at September 30, 2003 and September 30, 2002.

        We include in backlog those customer orders for which we have written customer authorization and for which shipment is scheduled within the next twelve months. Orders are generally subject to cancellation or rescheduling by customers with limited or no cancellation fees. During periods of downturns in the semiconductor industry, we have experienced significant cancellations and delays.

        Our deferred revenue relates to equipment already shipped to customers and equipment subject to installation that will be recognized as sales when acceptance is received from the customer. At September 30, 2003, deferred revenue was $10.7 million, a decrease of 72.1% as compared to deferred revenues of $38.3 million at September 30, 2002. The associated deferred profit was also lower at September 30, 2003. Deferred revenue is not included in orders backlog.

        As a result of systems ordered and shipped in the same quarter, possible changes in customer delivery dates, cancellations and shipment delays, and acceptances of shipped equipment carried in deferred revenue, the backlog at any particular date and the orders bookings for any particular period are not necessarily indicative of actual revenue for any succeeding period.

Manufacturing

        Most of our manufacturing is conducted at our facilities located in Kalispell, Montana. Our manufacturing operations are selectively vertically integrated to include metals and plastics fabrication and finishing capabilities, component parts and final product assembly, and extensive product development capabilities. Manufacturing personnel work closely with product development engineers to enhance manufacturability and facilitate the transition from prototype to full-scale production. Our high-volume manufacturing line provides responsive lead time delivery of our products. Component and product prototyping typically is performed internally, reducing the time to market for new products and product enhancements.

Research and Development

        We believe that timely development of products is necessary to remain competitive in an equipment market characterized by rapid technological change and product innovation. We devote significant resources to programs directed at developing new and enhanced products, as well as new applications for existing products. We maintain extensive demonstration and process development laboratories at our facilities in Montana, including two clean rooms for demonstrating, testing and developing products. Research and development personnel work directly with customers, vendors, and research institutes to develop new processes and to design and evaluate new equipment.

        Expenditures for research and development, which are expensed as incurred, were approximately $18.1 million in fiscal 2003, $23.1 million in fiscal 2002 and $27.5 million in fiscal 2001. These expenditures, as a percentage of our net sales, represented approximately 15.5%, 18.7% and 10.7% in each of these fiscal years.

Competition

        The semiconductor equipment industry is an intensively competitive market place marked by constant technological change. Significant competitive factors in the semiconductor equipment and related markets in which we compete include: system performance, quality and reliability, cost of using our equipment, ability to ship products in the time required, timeliness and quality of technical support service, our success in developing new and enhanced products, pricing and payment terms. We face substantial competition from established competitors, some of which have greater financial, marketing, technical and other resources, broader and integrated product lines, more extensive customer support capabilities, and larger sales organizations and installed customer bases. Our primary competitors in electrochemical deposition include Applied Materials, Inc., Novellus Systems, Inc., and Ebara Corporation. In wet surface preparation applications, our competition includes Applied Materials, Inc., FSI International, Inc., Mattson Technology, Inc., SEZ Holding, AG, Tokyo Electron, Ltd. and wet bench manufacturers. We believe that we compete favorably with these manufacturers. We may also face competition from new market entrants.

        In order to remain competitive, we must maintain a high level of investment in research and development, marketing and customer service while controlling operating expenses. There can be no assurance that we will have sufficient resources to continue to make such investments or that our products will continue to be viewed as competitive as a result of technological advances by competitors or changes in semiconductor processing technology. Such competitive pressures may necessitate significant price reductions by us or result in lost orders, which could harm our business, financial condition, results of operations and cash flows.

        Moreover, there has been significant merger and acquisition activity among our competitors and potential competitors. These combinations may provide such competitors and potential competitors with a competitive advantage over us by enabling them to more rapidly expand their product offerings and service capabilities to meet a broader range of customer needs. Many of our customers and potential customers are relatively large companies that require global support and service for their semiconductor manufacturing equipment. Our larger competitors have more extensive infrastructures, which could place us at a disadvantage when competing for the business of global semiconductor device manufacturers.

        We expect our competitors to continue to improve the design and performance of their products. There can be no assurance that our competitors will not develop enhancements to, or future generations of, competitive products that will offer superior price, performance and/or cost of ownership features, or that new processes or technologies will not emerge that render our products less competitive or obsolete. As a result of the substantial investment required to integrate capital equipment into a production line, we believe that once a manufacturer has selected certain capital equipment from a particular vendor, there is a tendency for the manufacturer to rely upon that vendor to provide equipment for that specific production line application and may seek to rely upon that vendor to meet other capital equipment requirements. Accordingly, we may be at a competitive disadvantage for a protracted period of time with respect to a particular customer if that customer utilizes a competitor’s manufacturing equipment.

Patents and Other Intellectual Property

        We place a strong emphasis on the innovative features of our products and, where available, we generally seek patent protection for those features. We currently hold 215 U.S. patents, some with pending foreign counterparts, have 190 U.S. patent applications pending and intend to file additional patent applications, as we deem appropriate. There can be no assurance that patents will issue from any of our pending applications or that existing or future patents will be sufficiently broad to protect our technology. While we attempt to protect our intellectual property rights through patents, copyrights and non-disclosure agreements there can be no assurance that we will be able to protect our technology, or that competitors will not be able to develop similar technology independently. In addition, the laws of certain foreign countries may not protect our intellectual property to the same extent as the laws of the United States. Moreover, there can be no assurance that our existing or future patents will not be challenged, invalidated or circumvented, or that the rights granted thereunder will provide meaningful competitive advantages to us. In any of such events, our business, financial condition, results of operations and cash flows could be harmed.

        There has been substantial litigation regarding patent and other intellectual property rights in semiconductor related industries. We currently are involved in patent litigation, which is described in Item 3, Legal Proceedings. Although we are not aware of any potential infringement by our products of any patents or proprietary rights of others, other than as alleged by Novellus, Inc., which is described in Item 3, Legal Proceedings, further commercialization of our products could provoke claims of infringement from third parties.

        In addition, we rely on trade secret protection for our technology, in part through confidentiality agreements with our employees, consultants and third parties. However, these agreements may be breached and we may not have adequate remedies. In any case, others may come to know about or determine our trade secrets through a variety of methods.

        From time to time, we receive invitations to take a license to other parties’ patents or to grant a license on our technology. We evaluate these potential transactions on a case-by-case basis. Offers to us to take a license that are rejected by us could lead to an offeror making a claim of infringement.

        Now and in the future, litigation may be necessary to enforce patents issued to us, to protect trade secrets or know-how owned by us or to defend us against claimed infringement of the rights of others and to determine the scope and validity of the proprietary rights of others. Any such litigation, including the litigation in which we currently are engaged, could result in substantial cost and diversion of effort by us, which by itself could have a material adverse effect on our financial condition, results of operations and cash flows. Further, adverse determinations in such litigation could result in our loss of proprietary rights, subject us to significant liabilities and damages to third parties, require us to seek licenses from third parties or prevent us from manufacturing or selling our products, any of which could harm our business, financial condition, results of operations and cash flows.

Employees

        At September 30, 2003, we had 701 full-time and temporary employees worldwide. None of our employees are represented by a labor union, and we have never experienced a work stoppage or strike. We consider our employee relations to be good.

Environmental Matters

        We are subject to a variety of governmental regulations related to the discharge or disposal of toxic, volatile or otherwise hazardous waste. Our compliance with federal, state and local provisions regulating the discharge of materials into the environment, and the remedial actions we have taken with respect to environmental regulations, have not had, and are not expected to have, a material effect on our business, financial condition, result of operations and cash flows.

Executive Officers of the Registrant

The following table sets forth certain information with respect to the executive officers of the Company:

Name Age Position
Raymon F. Thompson (1)      62   Chairman of the Board, President and Chief Executive Officer    
Timothy C. Dodkin (2)    54   Executive Vice President  
Larry A. Viano (3)    49   Vice President and Chief Financial Officer  
Dana R. Scranton (4)    48   Vice President, Surface Preparation Technology  
Richard P. Schuster (5)    47   Vice President, Global Service  

(1)     Raymon F. Thompson founded Semitool in 1979 and serves as our Chairman, President and Chief Executive Officer. In 1979, Mr. Thompson designed, patented and introduced the first on-axis spin rinser/dryer for the semiconductor industry.

(2)     Timothy C. Dodkin has been employed by us since 1985 and has served on our Board of Directors since 1998. Mr. Dodkin has held a number of sales-related positions including Senior Vice President, Global Sales and Marketing and, since June 2003, has served as Executive Vice President. Prior to joining us, Mr. Dodkin worked at Cambridge Instruments, a semiconductor equipment manufacturer, for ten years in national and international sales.

(3)     Larry A. Viano joined us in 1985 and has served as our Vice President and Chief Financial Officer since May 2003. He also serves as our Secretary, Treasurer, Principal Accounting Officer and Controller. He is a Certified Public Accountant.

(4)     Dana R. Scranton has served as our Vice President, Surface Preparation Technology since September 2001. Mr. Scranton has 11 years of experience with Semitool in the areas of engineering, product management and marketing. Mr. Scranton has a total of 16 years experience in the semiconductor capital equipment business.

(5)     Richard P. Schuster joined us in 1984 and has served as our Vice President, Global Service since February 2002.

The executive officers are elected each year by the Board of Directors to serve for a one-year term of office.

Item 2. Properties

        We have two manufacturing facilities located on sites in Kalispell, Montana with approximately 200,000 square feet in the aggregate. We also own a building and land located in Coopersburg, Pennsylvania, which serves as a manufacturing facility for our Rhetech, Inc. subsidiary. We believe that our existing manufacturing facilities will be adequate to meet our requirements for the foreseeable future and that suitable additional or substitute space will be available as needed. During fiscal 2001, we sold land and buildings that we owned in Cambridge, UK and during fiscal 2002, construction was completed on an office building on land retained at that location. We also lease 13 other smaller facilities worldwide, which are used as sales and customer service centers.

        We are subject to a variety of governmental regulations related to the discharge or disposal of toxic, volatile, or otherwise hazardous chemicals used on Semitool’s premises. We believe that we are in material compliance with these regulations and that we have obtained all necessary environmental permits to conduct our business. Nevertheless, current or future regulations could require us to purchase expensive equipment or to incur other substantial expenses to comply with environmental regulations. Any failure by us to control the use of, or adequately restrict the discharge or disposal of, hazardous substances could subject us to future liabilities, result in fines being imposed on us, or result in the suspension of production or cessation of our manufacturing operations.

Item 3. Legal Proceedings

        On January 16, 2002, we filed suit against Tokyo Electron, Ltd. and its subsidiaries, Tokyo Electron Kyushu Ltd. and Tokyo Electron America, Inc., referred to collectively as TEL, in the United States District Court for the Northern District of California (Case No. C-02-0288 EMC). The suit alleged infringement of our U.S. Patent 5,784,797 entitled “Carrierless Centrifugal Semiconductor Processing System (‘797 Patent), relating to the centrifugal cleaning and processing of semiconductor wafers. The defendants answered the complaint denying the claim and seeking to have the patent declared invalid. In addition, the defendants asserted counterclaims alleging our infringement of three patents: U.S. Patent 4,985,722 entitled “Apparatus for Coating a Photo-Resist Film and/or Developing it After Being Exposed”; U.S. Patent 5,446,416 entitled “Resist Processing Method”; and U.S. Patent 5,740,053 entitled “Method of Controlling Monitor Used in Cleaning Machine and Object Processing Machine and Monitor Apparatus”. After reaching an out-of-court settlement, on October 17, 2003 the court entered an order dismissing the claims and counterclaims of both parties. The terms of the settlement are confidential, except that there was no exchange of monetary compensation.

        In June 2001, we filed separate suits against Applied Materials, Inc., (Case No. CV-01-1066 AS), Novellus Systems, Inc. (Case No. CV-01-874 KI) and Ebara Corporation and Ebara Technologies, Inc. (Case No. CV-01-873 BR). The suits against all three parties are in the United States District Court for the District of Oregon. The suits allege infringement of Semitool’s U.S. Patent 6,197,181 (Chen) “Apparatus and Method for Electrolytically Depositing a Metal on a Microelectronic Workpiece” (‘181 Patent) and seek injunctive relief, damages for past infringement and increased damages for willful infringement. Each defendant has answered our complaints denying the claims and seeking to have the patent declared invalid. In addition, Novellus has counterclaimed for infringement of four of their patents: viz., U.S. Patent 6,179,983 “Method and Apparatus for Treating Surface Including Virtual Anode”; U.S. Patent 6,074,544 “Method of Electroplating Semiconductor Wafer Using Variable Currents and Mass Transfer to Obtain Uniform Plated Layer”; U.S. Patent 6,110,346 “Method of Electroplating Semiconductor Wafer Using Variable Currents and Mass Transfer to Obtain Uniform Plated Layer”; and U.S. Patent 6,162,344 “Method of Electroplating Semiconductor Wafer Using Variable Currents and Mass Transfer to Obtain Uniform Plated Layer”. On July 22, 2002, the District Court dismissed with prejudice Novellus’ counterclaim for infringement of U.S. Patent 6,179,983. The remaining counterclaims seek injunctive relief, damages for past infringement, increased damages for willful infringement and attorneys’ fees. We believe that the remaining counterclaims are without merit and we are contesting the actions vigorously. A trial date has been set for the suit against Applied Materials in February 2004, and in November 2004 for Novellus and Ebara. Given the inherent uncertainty of litigation, there can be no assurance that the ultimate outcome will be in our favor. If Novellus were to prevail in its counterclaims, it could have a material adverse effect on our business, financial condition, results of operations and cash flows. Further, regardless of the ultimate outcome, there can be no assurance that the diversion of management’s attention, and any costs associated with any of the lawsuits, will not have a material adverse effect on our business, financial condition, results of operations and cash flows.

        We are subject to other legal proceedings and claims which have arisen in the ordinary course of our business and have not been finally adjudicated. Although there can be no assurance as to the ultimate disposition of these matters, it is the opinion of our management, based upon the information available at this time, that the currently expected outcome of these matters, individually or in the aggregate, will not have a material adverse effect on our business, financial condition, results of operations and cash flows.

Item 4. Submission of Matters to a Vote of Security Holders

        No matters were submitted to the shareholders for a vote during the fourth quarter of the fiscal year.

PART II

Item 5. Market for Our Common Stock and Related Shareholder Matters

Our Common Stock is traded under the symbol “SMTL” principally on the Nasdaq National Market. The approximate number of shareholders of record at December 11, 2003 was 146 and the reported last sale price on that date of our common stock on the Nasdaq National Market was $10.98. The high and low sales prices for our common stock reported by the Nasdaq National Market are shown below.

Common Stock Price Range
Fiscal Year
Ended September 30,
2003 2002
                                                                   High     Low             High     Low
First Quarter   $7.29   $4.29       $13.08   $8.14
Second Quarter   $7.09   $4.09       $13.47   $9.05
Third Quarter   $6.00   $3.98       $15.20   $7.39
Fourth Quarter   $9.59   $4.84       $8.68   $4.40

Since our initial public offering of Common Stock in February of 1995, we have never declared or paid any cash dividend and we have no intent to do so in the near future.

Item 6. Selected Financial Data

This summary should be read in conjunction with the consolidated financial statements and related notes included elsewhere in this Annual Report on Form 10-K.

Summary Consolidated Financial Information
(in thousands, except per share data)

Year Ended SeptembEr 30,
2003 2002 2001 2000 1999
Statement of Operations Data:                        
Net sales    $117,048    $123,687    $256,467    $239,447    $122,528  
Gross profit (1)    35,254    59,083    128,092    126,701    57,648  
Income (loss) from operations    (35,269 )  (24,463 )  32,509    36,669    (12,741 )
Gain on sale of subsidiary (2)    --    --    31,054    --    --  
Net income (loss) before cumulative effect of  
  change in accounting principle    (21,151 )  (14,238 )  43,258    24,426    (6,745 )
Cumulative effect of change in accounting  
  principle (net of tax) (3)    --    --    (17,645 )  --    --  
Net income (loss)    (21,151 )  (14,238 )  25,613    24,426    (6,745 )
Basic earnings (loss) per share    (0.74 )  (0.50 )  0.90    0.87    (0.24 )
Diluted earnings (loss) per share    (0.74 )  (0.50 )  0.89    0.85    (0.24 )
Average number of basic common shares    28,446    28,410    28,333    28,062    27,594  
Average number of diluted common shares    28,446    28,410    28,769    28,783    27,594  
   
Balance Sheet Data:  
Cash, cash equivalents and marketable securities    27,935    40,840    46,837    6,711    4,789  
Working capital (1)    73,108    90,997    106,730    79,498    52,308  
Total assets    138,774    183,663    200,090    202,660    131,884  
Short-term debt    228    435    1,192    21,724    10,541  
Long-term debt and capital leases    2,322    2,912    3,265    3,653    3,911  
Shareholders' equity    100,677    121,422    133,199    108,632    81,025  

(1) In the fourth quarter of fiscal 2003, we wrote down inventory by $19.1 million primarily due to a change in forecasted demand for certain of our products due to the successful introduction of our new Raider platform.
(2) We sold our wholly-owned subsidiary, Semy Engineering, Inc., on February 16, 2001.
(3) The cumulative effect is the result of our adopting the Securities and Exchange Commission’s Staff Accounting Bulletin 101 (SAB 101), “Revenue Recognition in Financial Statements.” Data to reflect the change in accounting principle in accordance with SAB 101 are not available to restate financial information for fiscal years prior to 2001.

Item 7. Management’s Discussion and Analysis of Financial Condition andResults of Operations

        We design, manufacture, market, install and service our highly engineered equipment for use in the fabrication of semiconductor devices. Our products are focused on the wet chemical process steps in integrated circuit (IC) manufacturing and include systems for electrochemical deposition, wafer surface preparation and cleaning of wafer containers. Our electrochemical deposition systems are used for plating copper and gold for the IC’s internal wiring, or interconnects, solder and gold bumps for wafer level packaging applications and other metals for various semiconductor and related applications. The surface preparation systems are designed for wet cleaning, stripping and etching processes, including photoresist and polymer removal and metal etch. Typically, there are hundreds of manufacturing steps in fabricating semiconductor devices and after many of these steps a wet cleaning, stripping or etching process is required. Our customers include many of the major semiconductor device and wafer level packaging manufacturers worldwide.

        We provide worldwide sales, service and support primarily through our employees located in regional offices in the United States, Europe, Japan, Korea, and Singapore and through independent sales organizations for certain products in Taiwan, Japan and China. We expect that international sales will continue to account for a significant portion of net sales, particularly in Asia with the industry trend to outsourcing IC device manufacturing to foundries in that region, although the percentage of international sales and the geographic distribution may fluctuate from period to period.

CRITICAL ACCOUNTING POLICIES AND ESTIMATES

        Our discussion and analysis of our financial condition and results of operations is based upon our consolidated financial statements, which have been prepared in accordance with accounting principles generally accepted in the United States. The preparation of these financial statements requires us to make estimates and judgments that affect the reported amounts of assets, liabilities, revenues and expenses, and related disclosure of contingent assets and liabilities. On an on-going basis, we evaluate our estimates, including those related to revenue recognition, inventories, warranty obligations, bad debts, investments, intangible assets, income taxes, financing operations, contingencies and litigation. We base our estimates on historical experience and on various other assumptions that are believed to be reasonable under the circumstances, the results of which form the basis for making judgments about the carrying values of assets and liabilities that are not readily apparent from other sources. Actual results may differ from these estimates under different assumptions or conditions.

        We believe the following critical accounting policies affect our more significant judgments and estimates used in the preparation of our consolidated financial statements.

Revenue Recognition
        Our revenue recognition policy, as discussed in Note 1 to the financial statements located in Item 8 below, is significant because revenue is a key component of our results of operations. In addition, revenue recognition determines the timing of certain expenses, such as cost of sales, installation, warranty and commission expenses. We follow specific guidelines in measuring revenue; however, certain judgments such as the definition of a new customer environment and new acceptance criteria or if installation is perfunctory may be required in the application of our revenue policy.

Inventories
        We write down the carrying value of inventories for estimated obsolescence and marketability based upon assumptions about future use, demand and market conditions. If actual future use, demand or market conditions are less favorable than those projected by us, additional inventory valuation write-downs may be required, as they were during fiscal 2003, when the introduction of a new product rendered certain inventory obsolete.

Warranty Obligations
        We provide for the estimated cost of product warranties at the time revenue is recognized. While we engage in extensive product quality programs and processes, including actively monitoring and evaluating the quality of our component suppliers, our warranty obligation is affected by product failure rates, material usage and service delivery costs incurred in correcting a product failure. Should actual product failure rates, material usage or service delivery costs differ from our estimates, revisions to the estimated warranty liability would be required.

Allowance for Doubtful Accounts
        We maintain allowances for doubtful accounts for estimated losses resulting from the inability of our customers to make required payments. If the financial condition of our customers were to deteriorate, due to the cyclicality of the industries we serve or for other reasons, resulting in an impairment of their ability to make payments, additional allowances may be required.

Impairment of Investments
        We record an investment impairment charge when we believe an investment has experienced a decline in value that is other than temporary. Future adverse changes in market conditions or poor operating results of underlying investments could result in losses or an inability to recover the carrying value of the investments that may not be reflected in an investment’s current carrying value, thereby possibly requiring an impairment charge in the future.

Deferred Tax Assets
        We make estimates to determine the amount of our deferred tax assets that we believe is more likely than not to be realized. We consider future taxable income and ongoing prudent tax planning strategies in assessing the need for a valuation allowance; however, should we determine that we will not be able to realize all or part of our net deferred tax asset in the future, a decrease in the deferred tax asset would negatively impact our results of operations in the period such determination was made.

Results of Operations

        The following table sets forth our consolidated results of operations for the periods indicated expressed as a percentage of net sales:

Year Ended September 30,
2003
2002
2001
Statement of Operations Data:                
     Net sales    100 .0%  100 .0%  100 .0%
     Cost of sales (1)    69 .9  52 .2  50 .1

     Gross profit    30 .1  47 .8  49