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UNITED STATES
SECURITIES AND EXCHANGE COMMISSION

FORM 10-K

(Mark One)

For the fiscal year ended December 31, 2002

OR

For the transition period from         to    

Commission File Number 000-17157

NOVELLUS SYSTEMS, INC.

4000 North First Street, San Jose, California 95134
(Address of principal executive offices including Zip code)

(408) 943-9700
(Registrant’s telephone number, including area code)

Securities registered pursuant to Section 12(b) of the Act: None

Securities registered pursuant to Section 12(g) of the Act:

Common Stock, no par value

Indicate by check mark whether the Registrant (1) has filed all reports required to be filed by Section 13 or 15 (d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the Registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. YES [X]   NO [  ]

Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of Registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K. [X]

Indicate by check mark whether the Registrant is an accelerated filer (as defined in Exchange Act Rule 12b-2). YES [X]  NO [  ]

As of June 28, 2002 the aggregate market value of voting and non-voting stock held by non-affiliates of the Registrant was approximately $5,064,390,563, based on the average of the high and low prices of the Common Stock as reported on the NASDAQ National Market on such date. Shares of Common Stock held by officers, directors and holders of more than 5% of the outstanding Common Stock have been excluded from this calculation because such persons may be deemed to be affiliates. This determination of affiliate status is not necessarily a conclusive determination for other purposes.

The number of shares of the Registrant’s Common Stock outstanding on February 26, 2003 was 149,575,876.

Documents Incorporated by Reference: Part III of this Form 10-K incorporates information by reference from the Registrant’s Proxy Statement for its 2003 Annual Meeting of Shareholders.

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NOVELLUS SYSTEMS, INC.

2002 ANNUAL REPORT ON FORM 10-K

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CAUTIONARY STATEMENT REGARDING FORWARD-LOOKING STATEMENTS

This Annual Report on Form 10-K and certain information incorporated herein by reference contain forward-looking statements within the “safe harbor” provisions of the Private Securities Litigation Reform Act of 1995. All statements included or incorporated by reference in this Annual Report on Form 10-K, other than statements that are purely historical, are forward-looking statements. Words such as “anticipates,” “expects,” “intends,” “plans,” “believes,” “seeks,” “estimates” and similar expressions also identify forward-looking statements. Forward-looking statements are not guarantees of future performance and are subject to risks and uncertainties that could cause actual results to differ materially from the results contemplated by the forward-looking statements. Forward-looking statements in this Annual Report on Form 10-K include, without limitation:

•		Statements about the growth of the semiconductor industry; market size, share and demand; product performance; our expectations, objectives, anticipations, intentions and strategies regarding the future; expected operating results, revenues and earnings; and current and potential litigation, which statements are subject to various uncertainties, including, without limitation, those discussed in “Item 7. Management’s Discussion and Analysis of Financial Condition and Results of Operations – Risk Factors”;
•		The statements under the heading “Item 1. Business” concerning (1) the semiconductor industry’s migration to the use of copper and low-k dielectrics and (2) the growing importance of the surface preparation and CMP manufacturing steps, which statements are subject to various risks and uncertainties, including, without limitation, the failure of our expectations regarding the future direction of the semiconductor industry and our failure to combine the recently-acquired product offerings of GaSonics International Corporation and SpeedFam-IPEC, Inc. with our offerings;
•		The statements under the heading “Item 1. Business – Industry Background” regarding our beliefs that (1) unit demand for semiconductor devices will continue to increase; (2) the next generation of chips will likely see line widths as small as 90 nanometer and below; (3) there will be a transition from aluminum to copper conductive material; (4) there will be a transition from silicon oxide films to low-k dielectric insulators; and (5) there is a trend toward larger wafer sizes, which statements are subject to various risks and uncertainties, including, without limitation, periodic downturns in the semiconductor industry, slowdowns in the rate of capital investment by semiconductor manufacturers, shifts in demand from expensive, high-performance products to lower priced, conventional products, and the failure of our expectations regarding the future direction of the semiconductor industry;
•		The statements under the heading “Item 1. Business – Strategy,” concerning (1) our objective to increase our market share in the interconnect manufacturing market and strengthen our position as a leading supplier of semiconductor processing equipment; (2) our emphasis on high-productivity systems; (3) our focus on reducing customer costs; (4) our service differentiation philosophy; (5) our goal to lead in our target markets; (6) our goal to broaden our interconnect offerings; (7) our focus on major semiconductor manufacturers; (8) our intention to expand our market presence in Asia; and (9) our intention to leverage our low manufacturing cost structure, which statements are subject to various risks and uncertainties, including, without limitation, shifts in demand from expensive, high-performance products to lower priced, conventional products, resulting in reduced profit for semiconductor manufacturers, the current and other periodic downturns in the semiconductor industry and the economy in general, slowdowns in the rate of capital investment by semiconductor manufacturers and future product developments, introductions by competitors, increased competition in the

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		semiconductor equipment industry and risks and uncertainties associated with international operations, including economic downturns, trade balance issues, political instability, banking issues, fluctuations in interest and foreign currency exchange rates and slower economic development in Asia;
•		The statements under the heading “Item 1. Business – Products” of our beliefs regarding our products, including (1) that Concept Two enables increased production throughput and system capability; (2) that Concept Three offers greater throughput in 300mm wafer-manufacturing applications; (3) that Concept Three SPEED offers minimal risk to our customers in making the transition from 200mm to 300mm volume chipmaking; (4) that Concept Two ALTUS is ideal for meeting the requirements of high-volume, automated 200mm wafer fabs producing semiconductor devices at 0.18 micron and below; (5) that the INOVA 200mm system will continue to gain market acceptance based on barrier seed step coverage performance; (6) that the 300 mm INOVA XT with Hollow Cathode Magnetron or HCM will continue to offer superior barrier performance; (7) that our Electrofill products are highly reliable and cost-effective; (8) the increasing importance of photoresist strip and clean processes; (9) that IRIDIA offers the highest productivity of any 200 mm dry-clean system currently on the market; (10) that SIERRA yields significantly higher capital productivity and significantly lower cost-of-ownership advantages than competing dry-clean systems; (11) that the opportunity to integrate and optimize the planarization, deposition and surface preparation steps gives us an important advantage in extending copper/low-k processes to advanced semiconductor devices; and (12) that MOMENTUM allows for maximum manufacturing flexibility, which statements are subject to various risks and uncertainties, including, among others, the inaccuracy of our assessment of the capabilities of our products, the greater financial, marketing, technical or other resources, broader product lines, greater customer service capabilities and larger and more established sales organizations and customer bases that some of our competitors possess, future competition from new market entrants, our competitors’ improvement of the design and performance of their products that may offer superior price or performance features over our products, and difficulties in selecting, developing, manufacturing and marketing our new products or enhancing our existing products;
•		The statements under the heading “Item 1. Business – Marketing, Sales and Service” of our beliefs that (1) our strategy of supporting our installed base through customer support and R&D groups has accelerated penetration of certain key accounts; (2) our marketing efforts are enhanced by the technical expertise of our R&D personnel; and (3) our customer service is enhanced by the design simplicity of our systems, which statements are subject to certain risks and uncertainties, including, without limitation, that during periods of rapid growth, we may not be able to hire, assimilate and retain a sufficient number of qualified people and our failure to design simple, streamlined systems;
•		The statement under the heading “Item 1. Business – Research and Development” regarding our expectation that research and development expenditures will continue to represent a substantial percentage of sales, which statement is subject to certain risks and uncertainties, including, among others, that we may be unable to allocate substantial resources to research and development;
•		The statements under the heading “Item 1. Business – Manufacturing” regarding (1) our belief that our outsourcing strategy enables us to minimize our fixed costs and capital expenditures while also

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		providing the flexibility to increase capacity as needed and allows us to focus on product differentiation through system design and quality control; (2) our belief that the use of manufacturing specialists for our subsystems incorporate the most advanced technologies in robotics, gas panels and microcomputers; (3) our goal to work with suppliers to achieve mutual cost reduction through joint design efforts; and (4) our goal of reduced dependence on limited suppliers for certain key parts, which statements are subject to various risks and uncertainties, including, without limitation, the possible occurrence of a disruption or termination of certain limited source suppliers, our prolonged inability to obtain certain components, our failure to work efficiently with suppliers, and our inability to establish relationships with alternative suppliers of key parts;
•		The statement under the heading “Item 1. Business – Competition” regarding our belief as to our favorable competitiveness in our market segments, which statement is subject to various risks and uncertainties, including, among others, the greater financial, marketing, technical or other resources, broader product lines, greater customer service capabilities and larger and more established sales organizations and customer bases that some of our competitors possess, future competition from new market entrants from overseas and domestic sources, our competitors’ improvement of the design and performance of their products that may offer superior price or performance features as compared to our products, and our success in selecting, developing, manufacturing and marketing our new products or enhancing our existing products;
•		The statements under the heading “Item 1. Business – Patents and Proprietary Rights” regarding our beliefs and intentions (1) to pursue the legal protection of our technology primarily through patent and trade secret protection; (2) to file additional patent applications; (3) to vigorously protect our intellectual property rights; (4) that the outcomes of current litigation will not have a material impact on our business; and (5) that in the future, litigation may be necessary to enforce patents issued to us, to protect trade secrets or know-how owned by us or to defend us against claimed infringement of the rights of others and to determine the scope and validity of the proprietary rights of others, which statements are subject to various risks and uncertainties, including, without limitation, the absence of assurance that patents will be issued from any of our pending applications or that any claims allowed from existing or pending patents will be sufficiently broad to protect our technology, the fact that litigation could result in substantial cost and diversion of our effort and the fact that adverse litigation determinations could result in a loss of our proprietary rights, subject us to significant liabilities to third parties, require us to seek licenses from third parties or prevent us from manufacturing or selling our products;
•		The statements under the heading “Item 1. Business – Employees” that our success depends upon (1) our ability to recruit and retain engineers and technicians, marketing, sales, service and other key personnel and (2) the retention of a limited number of key employees and other members of our senior management, which statements are subject to risks and uncertainties, including, among others, our inability to successfully retain or recruit key personnel and our inability to effectively manage growth;
•		The statement under the heading “Item 1. Business – Environmental Matters” that neither compliance with federal, state and local provisions regulating discharge of materials into the environment nor remedial agreements or other environmental actions is expected to have a material affect on our capital expenditures, financial condition, results of operations or competitive position, which statement is subject to various risks and uncertainties, including, among others, that we have inaccurately assessed the compliance requirements of environmental provisions;
•		The statement under the heading “Item 2. Properties” of our belief that our current properties will be sufficient to meet our requirements for the foreseeable future is subject to various risks and uncertainties, including, without limitation, growth in net sales placing unexpected strains on our resources and properties;
•		The statements under the headings “Item 3. Legal Proceedings” and “Item 8. Financial Statements and Supplementary Data – Notes to Consolidated Financial Statements – Note 11. Litigation” of our beliefs (1) that there are meritorious defenses in the Applied Materials, Inc., Semitool, Inc., Plasma Physics Corporation, Solar Physics Corporation and Linear Technology Corporation litigation matters, and

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		(2)  regarding the impact and outcome of the Applied, Semitool, Plasma Physics, Solar Physics and Linear Technology litigation matters, which statements are subject to various uncertainties, including, without limitation, our inability to accurately predict the determination of complex issues of fact and law;
•		The statements under the heading “Item 7. Management’s Discussion and Analysis of Financial Condition and Results of Operations – Results of Operations” regarding calculation of allowances, reserves, and other estimates that are based on historical experience, the judgment of management, and various other assumptions that are believed to be reasonable under the circumstances, the results of which form the basis for making judgments about the carrying values of assets and liabilities that are not readily apparent from other sources, our beliefs about critical accounting policies, and the significant judgments and estimates used in the preparation of our consolidated financial statements, which statements are subject to certain risks, including, among others, the inaccuracy of our beliefs regarding critical accounting policies and that actual product failure rates, material usage, installation costs, customer reserves or other estimates may be different from our estimates, requiring revisions to our estimated allowance for doubtful accounts, additional inventory write-downs, restructuring charges, litigation, warranty, and other reserves;
•		The statements under the heading “Item 7. Management’s Discussion and Analysis of Financial Condition and Results of Operations – Results of Operations” of our strategies, beliefs, plans, expectations, anticipations and hopes with respect to Net Sales, Gross Profit, Selling, General and Administrative, Research and Development, Acquired In-Process Research and Development, Restructuring and Other Charges, Bad Debt (Recovery) Write-off, Other Income, net, Provision for Income Taxes, Deferred Tax Assets, Foreign Currency Accounting and Foreign Exchange Contracts including, without limitation, (1) our plan to continue our R&D commitment to improvement of new and existing technologies; (2) our belief that substantial investment in R&D is required to remain competitive; (3) management’s beliefs regarding the realization of deferred tax assets; and (4) the belief that our forward foreign exchange contracts do not subject us to speculative risk that would otherwise result from changes in currency exchange rates; and our strategies, beliefs, plans, expectations, anticipations and hopes with respect to Liquidity and Capital Resources set forth under “Item 7. Management’s Discussion and Analysis of Financial Condition and Results of Operations – Liquidity and Capital Resources,” including, without limitation, (1) our beliefs regarding the impact of the adoption of SFAS Nos. 143, 145 and 146; (2) our intention to continue our participation in synthetic leases in 2003; (3) our beliefs regarding our exposure in connection with the residual value guarantees related to our synthetic leases; (4) our belief that the fair market value of each of the properties subject to the synthetic leases exceeds the purchase option price for each property; (5) our beliefs regarding the impact to liquidity if we must purchase the properties subject to the synthetic leases; (6) our expectations regarding our actions if the lessor under the synthetic leases is deemed to be a voting interest entity versus a variable interest entity; (7) our belief that the additional taxes, losses and expenses associated with our maximum loss exposure on the synthetic leases would be immaterial; and (8) our belief that our current cash position, cash generated through operations and equity offerings, and available borrowings will be sufficient to meet our needs through at least the next twelve months, which statements are subject to numerous risks and uncertainties, including, without limitation, our inability to allocate substantial resources to R&D programs, the inaccuracy of our beliefs regarding taxes, foreign exchange contracts, the impact of certain accounting standards and our synthetic leases, that the semiconductor industry will continue to experience this or another periodic downturn, which could have a material adverse effect on the semiconductor industry’s demand for semiconductor processing equipment, including equipment we manufacture and market, and our success in selecting, developing, manufacturing and marketing our new products, or enhancing our existing products;
•		The statement under the heading “Item 7A. Quantitative and Qualitative Disclosures About Market Risk – Interest Rate Risk” that we believe that an immediate change to interest rates to variable short-term borrowings will not have a material effect on our results is subject to the risk, among other risks, that we have inaccurately assessed our future borrowing needs; and

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•

The statement in “Item 8. Financial Statements and Supplementary Data – Notes to Consolidated Financial Statements – Note 2. Significant Accounting Policies – Concentration of Credit and Other Risks” that we do not believe that there is a significant risk of nonperformance by counterparties on foreign exchange contracts is subject to the risk, among other risks, that we may fail to continuously monitor our positions and the credit ratings of counterparties.

The forward-looking statements in this Annual Report on Form 10-K are subject to additional risks and uncertainties further discussed under “Item 7. Management’s Discussion and Analysis of Financial Condition and Results of Operations – Risk Factors” and are based on information available to us on the date hereof. We assume no obligation to update any forward-looking statements. Readers are cautioned not to place undue reliance on forward-looking statements, which speak only as of the date of this Annual Report on Form 10-K. Readers should also consult the cautionary statements and risk factors listed from time to time in our Reports on Forms 10-Q, 8-K, 10-K and in our Annual Reports to Shareholders.

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PART I

ITEM 1. BUSINESS

Novellus Systems, Inc., a California corporation organized in 1984, develops, manufactures, sells and supports systems used in the fabrication of integrated circuits. The customers for these products are manufacturers of semiconductor integrated circuits, or chips, who either incorporate the chips they manufacture in their own products or sell them to other companies for use in electronic products.

Integrated circuits are generally built on a silicon wafer base and include a large number of different components, such as transistors, capacitors and other electronic devices that are connected by multiple layers of wiring or interconnects. To build an integrated circuit, transistors are first created on the surface of the silicon wafer. The wiring and insulating structures are then added as multiple thin-film layers through a series of processes. Typically, a first layer of dielectric, or insulating material is deposited on top of the formed transistors. That layer is then etched to create patterns that are subsequently filled with conductive metal (traditionally aluminum, but increasingly, copper is used). In copper dual damascene, a chemical mechanical planarization, or polishing, step follows to remove excess copper. The sequence is then repeated to create the multiple layers of wiring needed to connect the transistors and form the integrated circuit. Advanced chip designs require as many as 500 steps involving these and other manufacturing processes.

Novellus operates in a single industry segment for the manufacture, marketing and support of semiconductor fabrication equipment. Our product offerings are centered on the advanced systems used to deposit the films of conducting and insulating material, using chemical vapor deposition (CVD), physical vapor deposition (PVD) and electroplating or Electrofill^TM, commonly known in the industry as electrochemical deposition (ECD) processes, to form the layers of wiring and insulation, known as the “interconnect,” in semiconductor devices. Our High-Density Plasma CVD (HDP) and Plasma-Enhanced CVD (PECVD) systems employ a chemical plasma to deposit all of the dielectric or insulating layers and some of the metal or conductive layers on the surface of a semiconductor wafer. Our PVD systems use direct-current power to deposit conductive metal layers by sputtering metallic atoms from the surface of a target source. Our Electrofill systems are used for depositing conductive layers of copper on wafers in an electroplating or “damascene” process.

Building on our historical strength in deposition technologies, in 2001 we expanded into the area of wafer surface preparation by acquiring GaSonics International Corporation, a manufacturer of systems used to clean and prepare a wafer surface after the manufacturing steps that precede deposition. More recently, in December 2002 we completed the acquisition of SpeedFam-IPEC, Inc., a manufacturer of chemical mechanical planarization (CMP) products. As the semiconductor industry migrates to the use of copper and low-k (low-capacitance) dielectrics in semiconductors, the manufacturing steps for surface preparation and CMP are becoming increasingly important.

Our headquarters are located at 4000 North First Street, San Jose, California 95134. The telephone number is (408) 943-9700.

Additional information about Novellus is available on our web site at www.novellus.com. Novellus makes available free of charge on its web site its Annual Reports on Form 10-K, its Quarterly Reports on Form 10-Q, its Current Reports on Form 8-K and amendments to those Reports filed or furnished pursuant to Section 13(a) or 15(d) of the Securities Exchange Act of 1934, as amended, as soon as reasonably practicable after we electronically file them with or furnish them to the Securities and Exchange Commission, or the SEC. Information contained on our web site is not part of this Annual Report on Form 10-K or our other filings with the SEC.

Industry Background

Over the past twenty years, the semiconductor industry has grown rapidly as a result of increasing demand for personal computers, the expansion of the Internet and the telecommunications industry, and the emergence of new applications in consumer electronics. More recently, growth has slowed, and there are signs that the industry may be beginning to mature. While unit demand for semiconductor devices continues to rise, the average selling prices are declining. There is increasing pressure on chipmakers to reduce manufacturing costs while increasing the value of their products at the same time. The semiconductor industry has also been cyclical in nature over its history, with periods of rapid expansion followed by periods of over-capacity.

Several technological trends characterize semiconductor manufacturing. Perhaps the most prominent of these trends is increasing density. Moore’s Law, first postulated in the mid-1960s and still accurate almost 40 years later, states that the density of circuitry on an individual semiconductor chip doubles every 18 months. Today’s advanced devices are being manufactured with line widths as small as 0.13 micron and with up to eight layers of interconnect circuitry. By increasing circuit density, manufacturers can pack more electronic components on a chip and thereby provide higher performance and value. The next generation of chips will likely see line widths as small as 90 nanometer (0.09 micron) and below, requiring even more sophisticated interconnect wiring to keep pace.

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Another trend worth noting is the transition to copper wiring in place of aluminum as the primary conductive material in semiconductor devices. Copper has a lower electrical resistance value than aluminum, and this provides a number of performance advantages. Because of the superior properties of copper, a chip made with copper may need only half as many metal layers as one made with aluminum. This provides a significant reduction in manufacturing cost. In addition, copper wiring produces a significant improvement in device performance and a significant reduction in power requirements as compared to aluminum.

A similar transition is underway to low-k dielectric insulators, which are replacing traditional silicon oxide films. Low-k dielectrics are better at limiting the capacitance that occurs between metal lines in a device. This quality is important to the goal of smaller line widths and increasing component density. However, low-k materials are also less stable than silicon oxide, and this poses a host of new challenges to the semiconductor industry in pursuing its goals of increased circuit density and, at the same time, lower cost of manufacture and higher performance and value of the manufactured product.

Another important trend is the move to larger wafer sizes. Chipmakers are migrating to larger, 300mm wafers because of the potential manufacturing cost advantages these larger wafers provide (through the production of more integrated circuits on each individual wafer) compared to the 200mm wafers that have been the industry standard for approximately the past ten years.

These trends shape the equipment and process demands that our customers place on us. Our customers generally measure the cost and performance of their production equipment in terms of “cost per wafer,” a ratio determined by factoring in the costs for acquisition and installation of a system, operating costs, and net throughput rate. A system with higher net throughput allows a manufacturer to recover the purchase price over a greater number of wafers, thereby reducing the cost of ownership of the system on a per-wafer basis. Yield and film qualities are also significant factors in selecting processing equipment. The higher costs of larger and more complex semiconductor wafers have made high yields extremely important to our customers. To achieve higher yields and better film quality, systems must be able to repeat a process consistently and reliably. This characteristic, known as repeatability, is critical in achieving commercially acceptable yields. Systems that operate at desired throughput rates without approaching critical tolerance limits can achieve repeatability more easily.

Strategy

Our business objective at Novellus is to use our core expertise to increase our market share in the interconnect manufacturing arena and strengthen our position as a leading supplier of semiconductor processing equipment. The following are the key elements of our strategy:

Emphasize High-Productivity Systems – We established our current position in the industry by emphasizing high productivity as the principal benefit that our products and technologies deliver to customers. Our unique multi-chamber system for continuous PECVD processing illustrates our commitment to productivity. This multi-chamber design enables our PECVD systems to attain very high levels of wafer throughput, yield and film quality. The simple architecture of our systems also takes up less space in the fab and requires less downtime than other system designs. We intend to retain our historical focus on productivity by applying our multi-chamber and continuous processing architecture in product enhancements and new product offerings.

Focus on Reducing Customer Costs – Cost is an important component when measuring overall productivity. To that end, we strive to provide products and technologies that reduce our customers’ overall cost of ownership. We pursue these advantages by offering chipmakers a number of process improvements and process differentiators, as well as by providing highly reliable systems that require less servicing than competing alternatives in the market.

Differentiate our Service Philosophy – We do not view our customer service operations as a profit center and source of revenue generation. Our philosophy is to develop reliable products that do not break down as often or require as much servicing as competing alternatives. In addition, we strive to provide support that minimizes the downtime and service costs that our customers’ experience.

Lead in our Target Markets – Our goal is to command a leadership position in each of our target market areas. Historically, we have aimed to be the leader or the second or third largest provider in each of the subsets that comprise the served available market for our deposition products: HDP, CVD, PECVD, PVD and ECD. Due to our 2001 acquisition of GaSonics and subsequent internal product development efforts, we are one of the leading providers of surface preparation products. Our 2002 acquisition of SpeedFam-IPEC has enabled us to become one of the industry’s top suppliers of CMP products. We intend to aggressively pursue a leadership position in CMP similar to those we have achieved in other market segments.

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Broaden our Interconnect Offerings – As semiconductor manufacturing technology becomes more complex, the interconnect structures on a chip take on a greater importance in the manufacturing process. We believe that by expanding beyond our historical focus on deposition products we can add value in related interconnect manufacturing process steps. The acquisitions of GaSonics and SpeedFam-IPEC — which enabled Novellus to enter the surface preparation and CMP product arenas, respectively — are examples of this strategy in action.

Focus on Major Semiconductor Manufacturers – We have sold one or more systems to each of the 2002 world’s top 20 semiconductor manufacturing equipment capital spenders. Our sales objective is to work closely with our customers as they expand existing facilities, retrofit older manufacturing plants with new equipment, and build new fabrication facilities. We strive to build customer loyalty and achieve a high level of repeat business by offering high-reliability products, comprehensive field support, and a responsive parts replacement and service program.

Expand Market Presence in Asia – While we derive a significant percentage of net sales from Asia, we believe that substantial additional growth potential exists in the region over the long term. Japan, Taiwan and Korea continue to represent a disproportionate share of the world’s capacity for semiconductor manufacturing, and China is rapidly becoming a major manufacturing region for the industry. Our local presence in Asia includes sales and support offices throughout Japan. In addition, we maintain five offices in Korea, three in China, two each in Taiwan, Malaysia and Singapore, and one office in India. We plan to continue our efforts to better serve this region.

Leverage our Low Manufacturing Cost Structure – We do all system design, assembly and testing in-house, and outsource the manufacture of major subassemblies. This strategy allows us to minimize our fixed costs and capital expenditures and gives us the flexibility to increase capacity as needed. Outsourcing also allows us to focus on product differentiation through system design and quality control and helps to ensure that our subsystems incorporate the latest third-party technologies in robotics, gas panels and microcomputers. We work closely with our suppliers to achieve mutual cost reduction through joint design projects.

Products

Deposition Products

Our historical strength is rooted in deposition products, where we have consistently maintained a leadership position in the industry. We currently offer products that address the needs of manufacturers across a number of different deposition technologies — CVD, PVD and ECD.

Since the introduction of our Concept One dielectric platform in 1987, we have offered a range of processing systems for dielectric and metal deposition. In 1991, we introduced the Concept Two platform — a modular, integrated production system capable of depositing both dielectric and conductive metal layers by combining one or more processing chambers with a common, automated wafer handler. The Concept Two enables chipmakers to increase production throughput and system capability, as required in 200mm wafer manufacturing applications, by adding process modules without having to replace existing equipment. In 1997, we introduced the Concept Three platform, which builds on the foundation of its predecessor to offer greater throughput in 300mm wafer-manufacturing applications.

HDP CVD Products

In the CVD process, manufacturers place wafers in a reaction chamber, introduce a variety of pure and precisely metered gases into the chamber, and then add some form of energy to activate a chemical reaction that deposits a film on the wafer. The CVD process is the traditional method used to deposit dielectric (insulating) films on wafers. Manufacturers also use CVD to deposit conductive metal layers, particularly tungsten, as it is difficult to deposit such layers on devices with very small features using conventional PVD or other deposition technologies.

Concept Two SPEED^® – Introduced in 1996, Concept Two SPEED was the semiconductor industry’s first high-density plasma system capable of high-volume manufacturing, and today it is one of the top two leading systems in the HDP CVD marketplace. Concept Two SPEED is a single-wafer processing system for 200mm substrates. It is targeted for depositing dielectric material in aluminum interconnect manufacturing processes, as well as for deposition of pre-metal layers in copper manufacturing processes.

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Concept Three SPEED – The Concept Three SPEED is designed for applying dielectric material in 300mm wafer manufacturing processes. Because it is based on our production-proven Concept Two products, Concept Three SPEED offers minimal risk to our customers in making the transition from 200mm to 300mm wafer size in their high-volume integrated circuit manufacturing processes.

CVD Products

Concept Two ALTUS – In 1994, we introduced the Concept Two ALTUS, used to deposit the tungsten plugs and vias that connect aluminum interconnect lines in aluminum-based chips. The Concept Two ALTUS combines the modular architecture of the Concept Two with an advanced tungsten CVD dual-process chamber. The system is ideal for meeting the requirements of high-volume, automated 200mm wafer fabs producing semiconductor devices at 0.18 micron and below.

Concept Three ALTUS – The Concept Three ALTUS, introduced in 1997, brings the same advantages to 300mm wafer tungsten deposition as our Concept Two ALTUS predecessor provides for 200mm wafer applications.

PECVD Products

Concept Two SEQUEL Express^® – Introduced in 1999, the Concept Two SEQUEL Express is designed to deposit our CORAL^® family of low-k dielectric films, as well as other advanced films required for manufacturing 0.18 micron-and-smaller semiconductor devices. With a throughput in excess of 110 wafers per hour, Concept Two SEQUEL Express delivers up to 40 percent higher capital productivity and 40 percent lower cost of ownership than competing PECVD systems.

VECTOR^® – Introduced in 2000, VECTOR is a PECVD system for depositing dielectric films on 300mm wafers. VECTOR delivers a fully integrated low-k dielectric structure at 0.10-micron-and-smaller design rules. With approximately two-thirds the footprint of the nearest competitor, 40 percent fewer critical subassemblies and a throughput of 120 wafers per hour, VECTOR delivers higher capital productivity than any other PECVD system currently on the market.

PVD Products

PVD, also known as “sputtering,” is a process where ions of an inert gas such as argon are electrically accelerated in a high vacuum toward a target of pure metal, such as tantalum or copper. Upon impact, the argon ions sputter off the target material, which is then deposited as a thin film on the silicon wafer. PVD processes are used to create the barrier and seed layers in copper damascene interconnect applications. We entered the PVD marketplace with the acquisition of Varian Associates’ Thin Film Systems Division in 1998.

INOVA^® – The INOVA 200mm system was introduced in 1998 with a multi-chamber, single-wafer processing design. The Hollow Cathode Magnetron or HCM ionized PVD source continues to gain market acceptance based on barrier seed step coverage performance.

INOVA xT – In 2000, we introduced the 300mm INOVA xT with HCM technology. The product continues to offer superior barrier performance leading to low via resistance and improved device reliability.

Electrofill Products

Our Electrofill products are used to produce the primary copper conductive layers in advanced integrated circuits. Electrofill uses copper to fill a structure created within the circuit’s insulating layers, in a manufacturing process called copper damascene. Damascene manufacturing reverses the manufacturing process used with aluminum, where the metal is deposited first, then etched to create lines and vias, and finally filled with insulating layers between the metal lines. Our highly reliable and cost-effective Electrofill products employ liquid chemistries and electrolytic principles to deposit the copper wiring into the dielectric structure.

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SABRE – The SABRE copper Electrofill system, introduced in 1998, is one of the most reliable and technologically advanced copper ECD system available on the market. SABRE meets today’s technology requirements for copper metal layers all the way down to 90 nanometer (0.09 micron) line widths and beyond. It employs a proprietary electrofilling cell that eliminates contamination of the back of the wafer with copper. It features a unique plating cell design that improves the repeatability of the copper fill. The simplicity of SABRE’s design is the key to the system’s high reliability and manufacturing availability. Coupled with the INOVA PVD system, SABRE provides a complete system for depositing advanced copper interconnects.

SABRE xT – The second generation SABRE xT, introduced in 1999, is the industry’s leading ECD platform at both 200 mm and 300 mm wafer sizes. New features on the xT that were not found on the original SABRE include programmable electrical waveforms, advanced plating chemistries, an integrated anneal module and closed-loop chemical monitoring.

Surface Preparation Products

Photoresist strip and clean processes represent an area of semiconductor manufacturing that is becoming increasingly important with the industry’s migration to copper interconnects. Chipmakers use surface preparation products to remove photoresist and other potential contaminants from a wafer before proceeding with the next deposition step in the manufacturing process. We entered this application arena by acquiring GaSonics in 2001, and today we are one of the industry’s leading suppliers of dry-clean surface preparation products.

GAMMA^™ 2100 – The GAMMA 2100 200mm photoresist removal system uses a plasma source to strip photoresist. The GAMMA architecture features a multi-station sequential processing design with six strip stations, resulting in high wafer throughput with a minimal number of critical subsystems.

GAMMA 2130 – The GAMMA 2130 system is a front-end-of-line (FEOL) photoresist strip system for 300mm wafers. Our multi-station sequential processing architecture incorporates six stations within a single process chamber, enabling a 30 percent higher throughput rate when compared to that of the closest competitor.

PEP IRIDIA^® – The PEP IRIDIA is an advanced cleaning system designed for sub-0.18-micron 200mm wafer applications. The IRIDIA’s modular architecture allows manufacturers to configure the system for both front and back-end-of-line cleaning applications down to 90 nanometer device geometries. Targeted at critical steps in copper and low-k manufacturing processes, the IRIDIA offers the highest productivity of any 200mm dry-clean system currently on the market.

SIERRA^® – The SIERRA system is an advanced dry-clean system for 300mm wafer manufacturing processes. It delivers photoresist and residue removal for today’s most advanced applications. The SIERRA system is designed specifically to address the intricate cleaning challenges associated with the industry’s migration to copper metallization and low-k dielectrics. It yields significantly higher capital productivity and significantly lower cost-of-ownership advantages than competing dry-clean systems.

CMP Products

CMP systems polish the surface of a wafer after a deposition process to create a flat topography before moving on to subsequent manufacturing steps. Because copper is more difficult to polish and smooth than previous-generation aluminum interconnects, and because low-k dielectrics are much more porous than their predecessors, CMP has been elevated to the forefront of enabling technology required in a copper damascene manufacturing process. In recognition of this trend, in 2002, we completed the acquisition of SpeedFam-IPEC, a global supplier of CMP systems used in the fabrication of advanced copper interconnects. We believe that the opportunity to integrate the planarization, deposition and surface preparation steps and optimize them for overall performance gives us an important advantage in extending copper/low-k processes to advanced semiconductor devices.

MOMENTUM^™ – MOMENTUM is a high-throughput, dry-in/dry-out CMP system for all 200mm-wafer process applications. Designed with extendibility to accommodate future reductions in line widths, the MOMENTUM has four independent wafer-polishing platens that allow for maximum manufacturing flexibility. It also employs a patented orbital polishing motion that minimizes surface dishing and erosion and a slurry delivery system that results in more efficient consumption of polishing chemicals.

MOMENTUM 300 – Our MOMENTUM 300 is a highly flexible, dry-in/dry-out CMP system that provides a transition for manufacturers moving from 200mm to 300mm wafer processing. The system is unique in that it combines a number of advanced

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planarization and in-line inspection technologies to produce highly effective throughput, yield management, superior process capabilities and low cost of ownership.

Marketing, Sales and Service

We market products worldwide to manufacturers of semiconductor devices. In North America, we sell our products through a direct sales force that operates out of ten sales and support offices. In Europe, we sell our products predominantly through our sales and support facilities in France and Scotland. We also maintain sales and service support offices in the Netherlands, Germany, Ireland and Italy. In Asia, we sell our products directly in China, Japan, Korea, Malaysia, Singapore and Taiwan. Our Japanese operations, with headquarters near Tokyo, include ten sales offices throughout Japan.

The ability to provide prompt and effective field support is critical to our sales efforts, and we believe the support that we provide to our installed base has accelerated the penetration of certain key accounts. We also believe that our marketing efforts are enhanced by the technical expertise of our research and development personnel, who provide customer process applications support and participate in a number of industry forums such as conferences and technical symposia.

Equally significant, we believe that the design simplicity of our systems substantially enhances our ability to support our customers. In 1992, we became the first semiconductor equipment manufacturer to extend our warranty up to 24 months from shipment, and in 1993 we began to include the cost of consumable parts on some systems and preventative maintenance parts under warranty. We offer maintenance contracts as an additional service to customers.

For the year ended December 31, 2002, Samsung Electronics, Intel Corporation, Taiwan Semiconductor Manufacturing Company and International Business Machines Corporation accounted for 17%, 11%, 11% and 10% of our net sales, respectively. For the year ended December 31, 2001, Intel Corporation accounted for 16% of our net sales. For the year ended December 31, 2000, Intel Corporation and Taiwan Semiconductor Manufacturing Company accounted for 14% and 10% of our net sales, respectively. Historically, we have sold a significant proportion of systems in any particular period to a limited number of customers. Sales to our ten largest customers in 2002, 2001 and 2000 accounted for 79%, 61% and 71% of our net sales, respectively. We expect that sales of our products to relatively few customers — none of which has entered into a long-term agreement requiring it to purchase our products — will continue to account for a high percentage of our net sales in the foreseeable future.

Export sales — including sales by our Japanese subsidiary — for the year ended December 31, 2002 were approximately $513.6 million, or 61% of net sales. For the year ended December 31, 2001, export sales were $733.9 million, or 55% of net sales, while export sales for the year ended December 31, 2000 were approximately $834.5 million, or 63% of net sales.

Backlog

As of December 31, 2002, our backlog was $304.4 million, with no cancellations in the period subsequent to December 31, 2002 to the date of this Annual Report on Form 10-K, compared to a backlog of $266.5 million as of December 31, 2001, with approximately $81.8 million of cancellations subsequent to December 31, 2001. Our backlog includes only those customer orders for which we have accepted purchase orders and assigned shipment dates within twelve months. All orders are subject to cancellation or rescheduling by customers, with limited or no penalties. Some products are shipped in the same quarter in which the order was received. For this reason, and because of possible changes in delivery schedules, cancellations of orders and delays in shipments, our backlog as of any particular date is not necessarily a reliable indicator of actual sales for any succeeding period.

Research and Development

The highly cyclical semiconductor manufacturing industry is subject to rapid technological change and continual new product introductions and enhancements. Our ability to remain competitive depends in large part on our success in developing new and enhanced systems and introducing them at competitive prices on a timely basis. For this reason, we devote a significant portion of our personnel and financial resources to research and development programs.

Our current research and development efforts are directed at the development of new systems and processes and the improvement of the capabilities of existing systems. Research and development programs include advanced PVD systems, advanced gap fill technology, primary conductor metals, low-k dielectric materials, CMP systems, and additional advanced deposition and surface

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preparation technologies for the next generation of smaller-geometry fabrication lines. All new systems under development are capable of processing 300mm wafers.

Expenditures for research and development during 2002, 2001 and 2000 were $222.3 million, $272.0 million and $198.3 million, respectively. These investments represented approximately 26%, 20% and 15% of our net sales in 2002, 2001 and 2000, respectively. We believe that research and development expenditures will continue to represent a substantial percentage of our net sales in the future.

Manufacturing

Our manufacturing activities consist primarily of assembling and testing components and subassemblies that we acquire from third-party vendors and then integrate into a finished system. We utilize an outsourcing strategy for the manufacture of major subassemblies, and we perform all system design, assembly and testing in-house. Our outsourcing strategy enables us to minimize fixed costs and capital expenditures as well as provide the flexibility to increase production capacity. This strategy also allows us to focus on product differentiation through system design and quality control. We believe that our use of outsourced product specialists enables our subsystems to incorporate the latest and most advanced technologies in robotics, gas panels and microcomputers without the need for in-house expertise. We strive to work as closely as possible with all of our suppliers to achieve mutual cost reduction through joint design efforts.

Although we make reasonable efforts to ensure that such parts are available from multiple suppliers, certain key parts may only be obtained from a single or limited source. These suppliers are in some cases thinly capitalized, independent companies that generate significant portions of their business from us and/or a small group of other companies in the semiconductor industry. We seek to reduce our dependence on single or limited source suppliers. However, disruptions in parts delivery or termination of certain of these suppliers may occur. Such disruptions and terminations could have an adverse effect on our operations. A prolonged inability to obtain certain parts could have a material adverse effect on our business, financial condition or results of operations, and could result in our inability to meet customer demands on time.

We manufacture our systems in clean room environments similar to those used by semiconductor manufacturers for wafer fabrication. This helps to minimize the amount of particulates and other contaminants in the final assembled system, which in turn improves yields and reduces the level of contaminants for our customers. Following assembly, we package our completed systems in plastic shrink-wraps to maintain clean room standards during shipment.

Competition

Significant competitive factors in the semiconductor equipment market include system performance and flexibility, cost, the size of each manufacturer’s installed customer base, customer support capability and the breadth of a company’s product line. We believe that we compete favorably in all of the market segments we serve because of the fundamental advantages associated with our system performance and flexibility, low cost of ownership, high wafer yields and customer support. However, we face substantial competition from both established competitors and potential new entrants in each of these markets. Installing and integrating capital equipment into a semiconductor production line represents a substantial investment. For this reason, once a manufacturer chooses a particular vendor’s capital equipment, experience has shown that the manufacturer will generally rely upon that equipment for the useful life of the specific application. As a result, all of today’s semiconductor equipment makers typically have difficulty in selling a product to a particular customer to replace or substitute for a competitor’s product previously chosen or qualified by that customer.

In the CVD, PECVD and PVD markets, our principal competitor is Applied Materials, Inc., a major supplier of systems which has established a substantial base of installed equipment among today’s leading semiconductor manufacturers. In the ECD market, our principal competitors are Semitool, which has a large base of installed equipment, and Applied, which entered the market in 1999. Our principal competitors in the surface preparation product arena are Mattson Technologies and Axcelis Technologies. In the CMP market, which we entered at the end of 2002, our major competitors are Applied and Ebara.

Patents and Proprietary Rights

We intend to continue to pursue the legal protection of our technology primarily through patent and trade secret protection. We currently hold over 300 patents. We have many pending patent applications, and we intend to file additional patent applications as appropriate. There can be no assurance that patents will be issued from any of these pending applications or future filings, or that any

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claims allowed from existing patents or pending or future patent applications will be sufficiently broad to protect our technology. While we intend to vigorously protect our intellectual property rights, there can be no assurance that any patents we hold will not be challenged, invalidated or circumvented, or that the rights granted thereunder will provide competitive advantages to us. See Item 3. Legal Proceedings for further discussions.

We also rely on trade secrets and proprietary technology that we protect through confidentiality agreements with employees, consultants, and other parties. There can be no assurance that these parties will not breach these agreements, that we will have adequate remedies for any breach, or that our trade secrets will not otherwise become known to or independently developed by others.

There has been substantial litigation regarding patent and other intellectual property rights in semiconductor-related industries. We are currently involved in such litigation. Except as set forth in Item 3. Legal Proceedings, we are not aware of any significant claim of infringement by our products of any patent or proprietary rights of others; however, we could become involved in additional litigation in the future. Although we do not believe the outcome of the current litigation will have a material impact on our business, financial condition or results of operations, no assurances can be given that this litigation or future litigation will not have such an impact. For further discussion see Item 3. Legal Proceedings.

In addition to the current litigation, our operations—including the further commercialization of our products—could provoke additional claims of infringement from third parties. In the future, litigation may be necessary to enforce patents issued to us, to protect trade secrets or know-how that we own, to defend ourselves against claimed infringement of the rights of others, or to determine the scope and validity of the proprietary rights of others. Any such litigation could result in substantial cost and diversion of our effort and could have a material adverse effect on our financial condition or operating results. In addition, adverse determinations in such litigation could result in our loss of proprietary rights, subject us to significant liabilities to third parties, require us to seek licenses from third parties, or prevent us from manufacturing or selling our products. Any of these occurrences could have a material adverse effect on our business, financial condition or results of operations.

Employees

On December 31, 2002, we had 3,228 full-time and temporary employees. None of our employees are represented by a labor union, and we have never experienced a work stoppage, slowdown or strike. We consider our employee relations to be good.

The success of our future operations depends in large part on our ability to recruit and retain senior management, engineers, technicians, marketing, sales and service professionals and other key personnel. Qualified people are in great demand across each of these industry disciplines, and there can be no assurance that we will be successful in retaining or recruiting key personnel.

Business Combinations

We acquired SpeedFam-IPEC on December 6, 2002 in a stock-for-stock acquisition whereby each share of SpeedFam-IPEC common stock and options outstanding as of the closing date were converted into 0.1818 of a share of Novellus common stock or options on a fixed exchange ratio basis.

We acquired GaSonics in a stock-for-stock acquisition on January 10, 2001, with all outstanding shares of GaSonics capital stock converted into approximately 9,240,000 shares of Novellus’ common stock. In addition, all outstanding options to purchase shares of GaSonics capital stock were automatically converted into options to purchase approximately 1,400,000 shares of Novellus’ common stock. For further discussion of business combinations, see Note 7 to the Consolidated Financial Statements.

Environmental Matters

Neither compliance with federal, state and local provisions regulating discharge of materials into the environment, nor remedial agreements or other actions relating to the environment, has had — or is expected to have — a material effect on our capital expenditures, financial condition, results of operations or competitive position.

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ITEM 2. PROPERTIES

Our operations are conducted primarily in 13 buildings with approximately 1,109,000 square feet of space. Eight buildings totaling approximately 559,000 square feet are located in the San Jose, California area, and four buildings totaling approximately 442,000 square feet are located in the Portland, Oregon area. In addition, we occupy one building of approximately 108,000 square feet in Chandler, Arizona, which served as the corporate headquarters of SpeedFam-IPEC prior to the December 2002 acquisition.

We lease buildings in San Jose under agreements that expire in 2006. These leases have options to extend for three one-year renewal periods with the lessor’s consent. These buildings house three manufacturing operations, a research and development facility, an applications demonstration lab, various administrative and customer support offices, and our headquarters.

Our properties in the Portland area consist of four buildings in the city of Tualatin. These buildings are located on 58 acres of owned land. Under a long-term ground lease, we lease a portion of the land consisting of 23 acres to the lessor of the buildings which have been constructed thereon. One building totaling approximately 65,000 square feet is owned by Novellus and provides manufacturing, research and development, and customer support for the SABRE, our Electrofill product. The remaining three buildings totaling approximately 377,000 square feet are leased under an agreement that expires in 2006 and contains an option to extend for three one-year renewal periods with the lessor’s consent. These buildings consist of manufacturing, research and development, engineering and training facilities.

Our Chandler facility consists of one building leased under an operating lease that expires in 2017. This building houses our CMP operations, including manufacturing, research and development and engineering.

We lease several field office sites domestically totaling approximately 94,000 square feet of space. In addition, we own one building totaling approximately 41,000 square feet in the Chicago, Illinois area, which we acquired in conjunction with the SpeedFam-IPEC acquisition in December 2002. We also sublease, or have available for sublease, approximately 778,000 square feet of space in and around the San Jose, California and Chandler, Arizona areas. We lease several sites outside of the United States which we use as sales and customer service centers. These sites total approximately 201,000 square feet of space.

Our European offices occupy approximately 38,000 square feet of space in various countries throughout Europe, including France, Germany, Italy, Ireland, the Netherlands and the United Kingdom. Our Asian offices occupy approximately 173,000 square feet of space in various countries throughout Asia, including China, India, Japan, Korea, Malaysia, Singapore and Taiwan.

We believe that our current facilities are sufficient to meet our requirements for the foreseeable future.

ITEM 3. LEGAL PROCEEDINGS

Applied Materials, Inc.

On June 13, 1997, we agreed to purchase the Thin Film Systems (“TFS”) business of Varian Associates, Inc. On the same day, Applied Materials, Inc. sued Varian in the United States District Court (the “Court”) for the Northern District of California for alleged infringement by TFS of several of Applied’s physical vapor deposition (PVD) patents (the “Applied Patents”).

On June 23, 1997, we sued Applied in the United States District Court for the Northern District of California, claiming infringement by Applied of several of our PVD patents acquired from Varian in the TFS purchase. Applied has filed counterclaims in this suit, alleging that we infringe Applied’s patents. We seek an injunction against future infringement by Applied, damages for past infringement and treble damages for willful infringement.

On July 7, 1997, Applied amended its complaint in its suit against Varian to add Novellus as a defendant. We have requested that the Court dismiss us as a defendant in this suit. The Court has not yet ruled on the request or required us to file an answer in this lawsuit.

The relief requested by Applied in both suits includes a permanent injunction against future infringement, damages for alleged past infringement and treble damages for alleged willful infringement.

We believe that we have meritorious claims against Applied. We also believe that there are meritorious defenses to Applied’s allegations, including the defense that our operations and products (including TFS products and systems) do not infringe the Applied Patents, and that the Applied Patents are invalid, unenforceable or both. As a result of court rulings adverse to Applied—and in light of

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certain indemnity obligations undertaken by Varian, which include reimbursement of certain legal expenses and a portion of any losses incurred from this litigation — we do not believe that Applied’s claims will have a material adverse effect on our business, financial condition or results of operations.

Semitool, Inc.

On August 10, 1998, Semitool, Inc. sued Novellus for patent infringement in the United States District Court for the Northern District of California. Semitool alleges patent infringement concerning several patents related to our SABRE and SABRE xT systems for depositing copper layers on semiconductor wafers. Semitool seeks an injunction against the manufacturing and sale of the SABRE and SABRE xT systems by Novellus, and damages for alleged past infringement. Semitool also seeks treble damages for alleged willful infringement.

On March 17, 2000, the District Court granted our motion for summary judgment and ruled that our SABRE and SABRE xT systems do not infringe Semitool’s patents. On May 15, 2000, Semitool appealed this ruling to the United States Court of Appeals for the Federal Circuit. On June 8, 2001, the Court of Appeals affirmed the judgment of non-infringement. On September 6, 2001, Semitool then filed a petition with the United States Supreme Court to review the judgment of the Court of Appeals. The Supreme Court vacated the opinion of the Court of Appeals and remanded the case to the Court of Appeals for further consideration. On July 23, 2002, the Court of Appeals again affirmed the District Court’s judgment of non-infringement.

On June 11, 2001, Semitool again sued Novellus for patent infringement in the United States District Court for the District of Oregon. In this second lawsuit, Semitool alleges that our SABRE and SABRE xT systems infringe one of Semitool’s patents. Semitool seeks an injunction against future infringement by Novellus, damages for alleged past infringement and treble damages for alleged willful infringement.

On November 13, 2001, we countersued Semitool for patent infringement in the United States District Court for the District of Oregon. We allege that Semitool infringes certain Novellus patents related to the SABRE and SABRE xT systems. We seek an injunction against Semitool, damages for past infringement, and treble damages for willful infringement by Semitool.

This litigation is in its early stages and therefore is inherently difficult to assess. We believe that we have meritorious claims against Semitool, and that this litigation will not have a material adverse impact on our business, financial condition or results of operations. However, the outcome of patent disputes is often affected by uncertainty in the resolution of complex issues of fact and law. If Semitool were to prevail against us, the adverse effect on our business, financial condition or results of operations could be material.

Plasma Physics Corporation and Solar Physics Corporation

On June 14, 2002, certain of our customers — including Agilent Technologies, Inc., Micron Technology, Inc., Agere Systems, Inc., National Semiconductor Corporation, Koninklijke Philips Electronics N.V., Texas Instruments, Inc., ST Microelectronics, Inc., LSI Logic Corporation, International Business Machines Corporation, Conexant Systems, Inc., Motorola, Inc., Advanced Micro Devices, Inc. and Analog Devices Inc. were sued for patent infringement by Plasma Physics Corporation and Solar Physics Corporation. We have not been sued by Plasma Physics, Solar Physics, or any other party in connection with any allegation of patent infringement by Plasma Physics or Solar Physics. Certain defendants in the case have notified us that they believe that we have indemnification obligations and liability relating to these lawsuits. We believe that this matter will not have a material adverse impact on our business, financial condition or results of operations. There can be no assurance, however, that we will not be sued in the future in connection with the allegations made by Plasma Physics and Solar Physics or that, if we are sued, we will prevail in any such lawsuit. If a party were to file such a lawsuit and prevail against us, the adverse impact on our business, financial condition or results of operations could be material.

Linear Technology Corporation

On March 12, 2002, Linear Technology Corporation filed a complaint against Novellus, among other parties, in the Superior Court of the State of California for the County of Santa Clara. The complaint seeks damages (including punitive damages) and injunctions for causes of actions involving alleged breach of contract, fraud, unfair competition, breach of warranty and declaratory relief. We filed a demurrer to Linear’s complaint.

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This litigation is in its early stages and is therefore inherently difficult to assess. We believe that this litigation will not have a material adverse impact on our business, financial condition or results of operations. However, the outcome of patent disputes is often affected by uncertainty in the resolution of complex issues of fact and law. If Linear were to prevail against us, the adverse effect on our business, financial condition or results of operations could be material.

Other Litigation

We are a defendant or plaintiff in various actions that have arisen in the normal course of business. We believe that the ultimate disposition of these matters will not have a material adverse effect on our business, financial condition or results of operations.

ITEM 4. SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS

Not applicable.

PART II

ITEM 5. MARKET FOR REGISTRANT’S COMMON EQUITY AND RELATED SHAREHOLDER MATTERS

Stock Information

Novellus’ common stock is traded on the NASDAQ Stock Market and is quoted on the NASDAQ National Market under the symbol “NVLS.” The following table sets forth the high and low prices of our common stock as reported by the NASDAQ National Market for the periods indicated:

We have not paid cash dividends on our common stock since inception, and our Board of Directors presently plans to reinvest our earnings in the business. Accordingly, it is anticipated that no cash dividends will be paid to holders of common stock in the foreseeable future. As of February 26, 2003, there were 1,179 holders of record of our common stock.

ITEM 6. SELECTED FINANCIAL DATA

Set forth below is a summary of certain consolidated financial information with respect to Novellus as of the dates and for the periods indicated. The consolidated statements of operations data set forth below for the fiscal years ended December 31, 2002, 2001, 2000, 1999 and 1998 and the consolidated balance sheet data as of December 31, 2002, 2001, 2000, 1999 and 1998 have been derived from our consolidated financial statements, which have been audited. We acquired GaSonics on January 10, 2001, in a transaction accounted for as a pooling-of-interests. The selected financial data includes the operating results and financial data of Novellus and GaSonics for all periods. We acquired SpeedFam-IPEC on December 6, 2002, in a transaction accounted for as a purchase business combination. The selected financial data includes the operating results and financial data of SpeedFam-IPEC from December 6, 2002.

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Selected Consolidated Financial Data
(in thousands, except per share data)