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(Mark One)

For the fiscal year ended September 30, 2002

For the transition period from ____________ to ______________.

Commission file number 000-31089

47100 Bayside Parkway, Fremont, California 94538
(Address of principal executive offices)

Registrants’ telephone number, including area code: (510) 360-8000

Securities registered pursuant to section 12(b) of the Act:
None

Securities registered pursuant to section 12(g) of the Act:
Common stock, $.001 Par Value
(Title of class)

     Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. Yes [X] No [   ]

     Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this form 10-K or any amendment to this Form 10-K. [   ]

     Indicate by a check whether the registrant is an accelerated filer (as defined in Rule 12b-2 of the Act). Yes [X] No [   ]

     Aggregate market value of the registrant’s common stock held by non-affiliates of the Registrant as of November 30, 2002 was approximately $100 million based upon the closing price reported for such date on the Nasdaq National Market. For purposes of this disclosure, shares of common stock held by persons who hold more than 5% of the outstanding shares of common stock and shares held by officers and directors of the Registrant have been excluded because such persons may be deemed to be affiliates. This determination of affiliate status is not necessarily a conclusive determination for other purposes.

     The number of shares of the registrant’s Common Stock outstanding as of November 30, 2002 was 20,971,173.

Documents incorporated by reference

     Portions of the registrant’s proxy statement for its 2003 Annual Meeting of Stockholders are incorporated by reference into Part III of this Annual Report on Form 10-K.

Table of Contents

Virage Logic Corporation
Index to
Annual Report on Form 10-K
For Year Ended September 30, 2002

TABLE OF CONTENTS

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PART I

Item 1. Business

General

     Virage Logic Corporation provides application-optimized semiconductor intellectual property (semiconductor IP) platforms based on memory, logic and design tools that are silicon proven and production ready. With the recent addition of the logic products to our semiconductor IP platform, our goal is to offer our customers additional components of semiconductor IP for their system-on-a-chip design and to position the company to capture additional “real estate” on the chip. We believe this will enable us to pursue greater market opportunities. These various forms of intellectual property are utilized by our customers to design and manufacture system-on-a-chip (SOC) integrated circuits that power today’s Internet and high-speed communications, computer and consumer products, such as cellular and digital phones, pagers, digital cameras, DVD players, switches and modems. Our semiconductor intellectual property consists of (1) embedded memories and logic elements, (2) compilers that allow chip designers to configure our memories into different sizes and shapes on a single silicon chip, (3) memory test processor and fuse box components for embedded test and repair of defective memory cells, and (4) software development tools that can be used to build memory compilers. We also provide custom design services. Our customers include leading fabless semiconductor companies such as ATI Technologies, AMCC, PMC-Sierra, TranSwitch, and Vitesse Semiconductor, as well as leading integrated device manufacturers such as Agere, Conexant, IBM, Infineon, Intel, NEC, Philips Electronics, Sony, STMicroelectronics and Toshiba.

     We develop our logic elements, memories and compilers to comply with the manufacturing processes used to create the silicon chips for our customers’ products. For our integrated device manufacturer customers, we develop our products to comply with the processes used by their internal manufacturing facilities. For our fabless semiconductor customers, we develop our products to comply with the processes of the third-party semiconductor manufacturing facilities, or foundries, that these companies rely on to manufacture the silicon chips for their products. We also pre-test our products before their release on the market by having actual chips containing our semiconductor IP produced by third-party foundries, so that we can provide our customers with test data and assurance that chips produced using our intellectual property will be manufacturable, while producing optimal silicon wafer yields. Our products are certified for production by several of the leading third-party foundries used by fabless semiconductor companies, these include Taiwan Semiconductor Manufacturing Company (TSMC), United Microelectronics Company (UMC), Chartered Semiconductor Manufacturing (Chartered) and Tower Semiconductor, Ltd. (Tower). Because our customers do not need to deal with design issues concerning manufacturing processes when they use our intellectual property, our customers can have shorter design time for new product development and can reduce design and manufacturing costs.

Corporate Information

     We incorporated in California on November 27, 1995. We reincorporated in Delaware on July 25, 2002. Our principal executive offices are located at 47100 Bayside Parkway, Fremont, California 94538. Our telephone number is (510) 360-8000. Our website address is www.viragelogic.com. Information on our website, and websites linked to it, is not intended to be part of this report.

Industry Background

     The growth of the Internet and the development of optical and wireless communications infrastructure are creating demand for communications equipment and digital appliances that can utilize the increases in available bandwidths. The system designers of these products are seeking technologies that will permit them to decrease the size, reduce manufacturing costs and enhance the performance of their products. In response to this demand, semiconductor companies have developed technologies that permit entire electronic systems, including the microprocessor, communications, logic, graphics and memory elements, to be contained on a single silicon chip, called a system-on-a-chip, rather than on a circuit board.

     System-on-a-chip design depends upon the reliable integration of the various components of the chip. Each component must comply with the manufacturing standards of the manufacturing facility that will produce the chip. Since different technical expertise and intellectual property is required for each component of a system-on-a-chip, it is difficult for many companies to internally develop the various intellectual property needed for these components. In addition, the designers of products that use system-on-a-chip are facing increased market pressure to rapidly introduce new products, which shortens the time available for research and development involved in the design of a system-on-a-chip. In order to accommodate the continuously increasing technical expertise required for the design of system-on-a-chip and the timing constraints involved in such design, many semiconductor companies are

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increasingly relying on external sources for the technical expertise and intellectual property for various components of their system-on-a-chip designs. The use of proven third-party intellectual property components allows semiconductor companies to meet market pressures while continuing to focus on the components of the system-on-a-chip that constitute their core competencies.

     The demand for high-performance computing and communications applications and the availability of increased bandwidth for Internet applications has made memory an increasingly critical element of the overall operation of system-on-a-chip used for these applications. Historically, integrated circuit designs were dominated by the logic function, while memory storage was usually provided in separate, external devices. In order to achieve increased speeds, chip designs now require closer physical proximity and better integration between the logic and memory functions and require more customized memory functions. The need for this proximity, as well as advances in semiconductor technology and the ability to customize the size and configuration of memory functions within a system-on-a-chip, is creating increased demand for embedded memory. It is now common for a system-on-a-chip to contain many memories with different functions configured in different sizes and shapes to optimize the area and functionality of the chip. We estimate that memory functions typically comprise between 30-50% of the chip area in a system-on-a-chip design and believe that this percentage will increase with the growth of memory-intensive applications.

     Semiconductor companies face significant challenges designing high-performance memories that can be easily integrated with other components, including logic, for their system-on-a-chip devices. Due to continuing advancements in the semiconductor manufacturing processes, new designs have generally been required every one to two years. The internal design teams of semiconductor companies typically lack the dedicated resources necessary to keep pace with rapidly evolving memory designs. Suppliers of stand-alone memories for personal computers and other devices that include memory as a separate element on a circuit board often lack sufficient design expertise and software tools to provide custom high-performance memory for system-on-a-chip designs. Similarly, suppliers of stand-alone logic components generally lack the focus and expertise necessary to develop embedded logic elements for system-on-a-chip. These factors have created a market need for third-party providers of highly reliable, high-performance memory and logic intellectual property for system-on-a-chip design.

The Virage Logic Solution

     We provide intellectual property for high-performance memories and logic elements used in system-on-a-chip designs, as well as software development tools and custom design services. We offer customers embedded memories that are optimized for area, low power consumption and speed and that are available for the manufacturing processes of leading third- party semiconductor foundries. Recently, we began offering embedded logic semiconductor IP, based on technology that we assumed after acquiring In-Chip Systems, Inc. (In-Chip) in May 2002. Key benefits of our solution include:

	•		Memory Design Expertise. Our memory design expertise allows us to provide our customers with leading-edge memory technologies for advanced manufacturing processes. We have assembled a global team of over 170 engineers focused exclusively on memory design. This team includes senior level engineers with significant expertise in various types of memory design, including SRAM, DRAM, Flash and EPROM.
	•		Logic Design Expertise. Our historical design expertise in carefully integrating large amounts of memory with advanced logic designs allows us to provide our customers with logic technologies for advanced manufacturing processes. Through our acquisition of In-Chip, we currently have a design team of over 15 engineers focused exclusively on logic design.
	•		Broad Product Line. We offer multiple types of memory and compilers for advanced 0.25 micron, 0.18 micron, 0.15 micron and 0.13 micron processes and most recently introduced embedded memories on the 90 nanometer process. Our compilers allow our customers to generate the exact configuration of embedded memory needed for their system-on-a-chip designs. In October 2002, we launched our Area, Speed and Power (ASAP) Logic™ product line, marking our first foray into the area of logic components. We are

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			currently introducing embedded logic components on the 0.13 micron process and developing the embedded logic components on the 90 nanometer process.
	•		Manufacturing-Tested Solutions. Each of our embedded memories has been customized, verified and tested for a particular manufacturing process on a silicon chip, or silicon-proven, before being delivered to a customer. This verification substantially reduces the risk that the memory element will be defective and thereby reduces costly development delays our customers might experience from using in-house or other third-party designs that are not silicon-proven. Our memories have been purchased by over 160 customers and by foundries that comprise over 90% of the third-party foundry market.
	•		Significant Design-Time Advantages. We offer silicon-proven memories that comply with the standards for specific manufacturing processes. Our memories and software tools can be easily integrated into our customers’ system-on-a-chip design processes. By eliminating the need to design specific embedded memories, our customers can shorten the design time for their system-on-a-chip.
	•		High-Density, High-Performance and Ultra-Low Power Consumption Embedded Memories. We have continued introducing additions to our memory compilers for our ASAP, or area, speed and power, embedded memory compilers that enable the generation of high-density, high-speed and ultra-low power consumption embedded memories in multiple configurations. These technologies have been developed using custom memory design techniques to achieve industry-leading results in area, speed and power consumption.
	•		Redundancy, Embedded Test and Repair. We have introduced the STAR Memory System™, the first embedded memory product that allows design engineers to economically embed multiple megabits of SRAM into a system-on-a-chip. The STAR Memory System also includes an integrated test and repair capability that is intended to enable our customers to achieve higher yields of semiconductors. The system includes one or more STAR SRAM memory blocks, a STAR Processor and a STAR Fuse Box. The STAR SRAM comes with redundant locations, the STAR Processor decides how to test and repair defective SRAMs and the STAR Fuse Box stores the repair information. We believe that when implemented by our customers in their production, these potentially higher yields may be able to save millions of dollars in recovered silicon and other raw materials, substantially reduce test costs and enable faster time to volume.
	•		Ease of Integration. We provide a complete set of software development tools to facilitate the integration of our memories with the other elements of a system-on-a-chip design.

The Virage Logic Strategy

     Our objective is to be the leading supplier of application-optimized semiconductor IP platforms based on memory, logic and design tools and to gain increasing “real estate” for complex system-on-a-chips designed and manufactured by our customers. Key elements of our strategy include the following:

	•		Strategically Position Virage Logic as a Leading Provider of Application-Optimized Semiconductor IP Platforms. We have been known historically for our expertise in providing numerous embedded memory solutions for a variety of advanced products utilizing sophisticated system-on-a-chip technologies. Our memory solutions have enabled designers to choose from a broad suite of memory products based on their requirements for area, speed, power consumption, redundancy and other technical parameters. With the addition of logic products to our semiconductor IP platforms, our goal is to position Virage Logic to capture additional “real estate” on the chip, while enabling our customers to choose highly integrated, high-performance, application-optimized memory and logic solutions from our product portfolio, based on their unique design needs. We believe that this will position us to pursue larger market opportunities, while further entrenching our existing position as a leading provider of embedded memories to our customers.
	•		Utilize and Develop Endorsements of Leading Third-Party Semiconductor Manufacturers for Our Semiconductor IP. We work with leading third-party foundries to qualify our semiconductor IP for high-volume production in their manufacturing processes. In this manner, we are in a position to provide embedded memories and logic, as well as compilers that are silicon-proven for a specific foundry’s manufacturing process, directly to that foundry’s entire customer base. Our close associations with these

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			foundries also give us early access to process information for advanced processes thereby enabling us to be the first to market products on smaller geometries.
	•		Become a Preferred Supplier to the Leading Fabless Semiconductor Companies. Fabless semiconductor companies, or semiconductor companies that do not manufacture their own silicon chips, spend substantial sums of money purchasing memory and logic elements to incorporate in their chips. Since these companies often lack the time and resources to internally develop embedded memories and logic components, which may be outside of their core competencies, or subject to time-to-market constraints, they license intellectual property from us. To date, we have licensed our intellectual property to many fabless semiconductor companies including ATI Technologies, AMCC, PMC-Sierra, TranSwitch and Vitesse Semiconductor. We intend to continue to target the fabless semiconductor companies that produce the largest number of chips, which will enable us to increase the royalty payments we receive based on levels of production from the foundries that manufacture chips for our fabless customers.
	•		Increase our Base of Integrated Device Manufacturer Customers. Integrated device manufacturers (IDM) produce the largest number of integrated circuits and face significant cost and product differentiation challenges. The internal design teams of these companies are facing difficulties keeping pace with the increasing demand for, and proliferation of, embedded memory and logic technologies and the rapid innovation of these technologies and integration with other SOC components for advanced manufacturing processes. To date, we have licensed our intellectual property to many leading integrated device manufacturers including Agere, Conexant, Hitachi, IBM, Infineon, Intel, Matsushita, Motorola, NEC, OKI Semiconductor, Philips Electronics, Sony, STMicroelectronics and Toshiba. In addition, several IDMs are aligning their internal design flows with leading fabless semiconductor companies and outsourcing semiconductor intellectual property for SOCs to be produced at both the third-party foundries and their own internal foundries. These types of relationships will broaden our market for pre-silicon standard products proven which are designed for the leading third-party foundries. We intend to build upon our ability to reduce these customers’ design time and costs in order to attract additional integrated device manufacturer customers.
	•		Continue to Innovate Existing Technologies for Advanced Manufacturing Processes. As the semiconductor manufacturers develop advanced manufacturing processes that enable increasing density and speed as well as lower power consumption, we intend to lead the market for embedded memories designed for those processes and pursue a similar competitive advantage in further developing our logic semiconductor IP. We have assembled a team of over 170 engineers that are dedicated to memory design and we believe it will allow us to be the first to market with embedded memories for advanced manufacturing processes. We have designed embedded memories for the 0.25 micron, 0.18 micron, 0.15 micron and 0.13 micron processes and have most recently introduced embedded memories on the 90 nanometer process.
	•		Continue to Solve Manufacturing and Yield Issues Facing High-Density, Multi-Megabit SOCs. We introduced the industry’s first embedded memory product that allows design engineers to economically embed multiple megabits of SRAM into a SOC. The integrated test and repair capability ensures higher yielding semiconductors and can potentially save millions of dollars in recovering chips that historically would have been rendered unrepairable, or repairable at significant cost. This capability also substantially reduces test costs and enables faster time to volume production. Embedded memory test and repair can take place either in the factory during the wafer probe process or in the field while the SOC is used in the end product, thereby enhancing the overall reliability of the product.
	•		Expand our Research and Development Efforts. We intend to continue working with our development partners, TSMC, UMC, Chartered and Tower, to define the focus of our research and development activities to best address the changing needs of our customers. We are also focusing on developing new memory and logic architectures to support the convergence between computers, consumer products and communications markets.
	•		Expand Distribution Channels. We intend to expand our existing distribution channels by continuing to hire direct sales force members in our European sales offices based in the United Kingdom and other European countries (Germany and Israel) and increasing our direct sales force in North America. In Asia, we continue

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to distribute our products through well-established independent distributors, as well as hiring direct sales personnel. We also intend to continue developing partnerships with value-added-resellers and other distributors of intellectual property through our Memory Alliance Program (MAP) to leverage their extensive U.S. and international sales organizations.

Our Products

     We offer a wide range of application-optimized semiconductor intellectual property to semiconductor companies including:

	•		embedded memories and logic elements;
	•		compilers that can generate multiple configurations of a single type of embedded memory in a system design;
	•		memory test processor and fuse box components for embedded test and repair of defective memory cells;
	•		software development tools that can be used to build memory compilers; and
	•		custom design services.

     Our Embedded Memory Semiconductor IP. We provide embedded memory semiconductor IP in predetermined shapes, sizes and types that can be incorporated by semiconductor designers into their system-on-a-chip designs. We deliver our memory semiconductor IP to our customers through downloads from secure servers or on computer disks in a form that can be integrated directly into the design of the system-on-a-chip.

     Our Logic Semiconductor IP. We recently began providing logic libraries through our ASAP Logic product line. These products are designed to improve logic block area utilization and SOC performance while decreasing the price and power consumption of the overall chip. We deliver our logic semiconductor IP to our customers through the same manner as our embedded memory semiconductor IP.

	•		ASAP High-Speed Metal Programmable Cell Library. This cell library provides high mask cost savings during SOC design revision since only two to five mask layers need to be changed to reconfigure the chip.
	•		ASAP High-Density Standard Cell Library. The cell architecture used in this cell library provides significantly increased pin accessibility, which along with other features, results in logic block area savings. This equates to an overall reduction in chip size and lower fabrication costs.

     Our Embedded Memory Compilers. A compiler is a software program that allows semiconductor designers to configure memories to the desired specifications for their system-on-a-chip designs. Our compiler products include:

	•		CUSTOM-TOUCH® ASAP. These compilers are optimized for high density, high performance and low-power consumption and can generate memories up to 512 kilobits in size. ASAP is available in as many as nine different memory types including single- or dual-port register file, single- or dual-port SRAM, synchronous or asynchronous SRAM and ROM.
	•		CUSTOM-TOUCH NetCAM™. Our content-addressable memory, or CAM, compilers can be used in SOC’s that are used in routers, switches and other high-bandwidth Internet infrastructure equipment to accelerate hardware-based searches. These high-speed ternary and binary CAMs are key enablers in moving high speed traffic through a network.
	•		CUSTOM-TOUCH STAR™ Memory System. The system allows the designer to embed multiple megabits of SRAM into an SOC economically without sacrificing yield and manufacturability. The system includes one or more STAR SRAM blocks, a STAR Processor and a STAR Fuse Box. These memories are optimized for area, incorporate self-test and repair capabilities and can generate up to sixteen megabits of embedded memory.

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•

NOVeA™. This innovative non-volatile electrically alterable embedded memory can be produced using standard logic processes. NOVeA can retain its data at power-off while allowing data to be reprogrammed and erased during normal operation. NOVeA provides on-chip storage of calibration data, passwords, critical access information, etc. It also helps the designer reduce overall system size, achieve lower power operation and increase system performance.

     Our Software Development Tools. Our primary software development tool is EMBED-IT!® Architect, which allows semiconductor design companies to develop their own compilers with re-characterization capabilities. We also provide a software tool called EMBED-IT! Integrator to facilitate the design of multiple memory configurations used with SOCs. We may also license EMBED-IT! Integrator with EMBED-IT! Architect.

     Our Custom Design Services. We offer custom memory design services for companies that require special configurations or functionality not supported by our compilers. This has led to a number of innovations and new technologies, such as our CUSTOM-TOUCH NetCAM technology.

Markets and Applications

     We target markets with companies that utilize system-on-a-chip technologies with large memory requirements and high-performance, low-power architectures, where we believe our silicon-proven, application-optimized semiconductor IP provides customers with significant time-to-market, design and manufacturing cost advantages. Examples of the markets and applications in which our memories are implemented include:

	•		Communications and Internet Infrastructure. Communications system-on-a-chips are used throughout the Internet, including in routers, switches, DSL modems, gigabit ethernet equipment and high-bandwidth set-top boxes.
	•		Digital Appliances. Digital appliances increasingly require more functionality, Internet connectivity and low-power consumption. Our memories can be found in video game players, mobile phones, pagers, digital cameras, high-definition televisions, cable set-top boxes and DVD players.
	•		Computers. Computation equipment such as personal computers, workstations and servers require more complex chip sets and embedded memory to achieve new features such as advanced 3D graphics and digital signal processing, or DSP.

Research and Development

     We believe that our future success will depend in large part on our ability to continue developing new products and innovating our existing products for advanced manufacturing processes. To this end, we have assembled a team of engineers with significant experience in the design and development of embedded memory and logic semiconductor IP. Currently, we are focusing our research and development efforts on development of different configurations for memories and logic platforms that support the latest manufacturing processes: 90 nanometer and 65 nanometer. We are also developing new memory and logic architectures to support the emerging communications markets and the convergence between these markets and the computer and consumer products markets.

     In June 2000, we entered into a license agreement with Credence Systems, Inc. and its wholly-owned subsidiary, Fluence Technology, under which we license from Fluence memory built-in self-test logic for integration into our compilers. In exchange for this license, we have granted warrants to purchase 50,000 shares of common stock to Credence and its affiliates. In addition, we will pay Fluence Technology royalties on future sales of our products that incorporate their technology.

     We have entered into agreements with TSMC, UMC, Chartered and Tower to the development and license of our memories and compilers for each of these foundry’s design rules. Our relationship with these foundries assist us to develop the focus of our research and development activities.

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     Under our agreements with TSMC, we develop our memory products for TSMC’s 0.18 micron, 0.13 micron and 90 nanometer processes, and logic products for TSMC’s 0.13 micron process. Each party will own its own intellectual property, and both parties will jointly own any co-developed intellectual property. Following development, we will license the developed technologies to third parties that manufacture their silicon chips at TSMC. In exchange for our development, TSMC pays us licensing fees, as well as royalties based on silicon chips manufactured at TSMC using our memories. In addition, both TSMC and we agree to promote these technologies.

     Our agreement with UMC is similar to our agreement with TSMC. UMC pays us license fees as well as royalties based on revenues from third parties that manufacture silicon chips containing our memories at UMC.

     Our agreement with Chartered relates to the ongoing establishment of a joint marketing and test chip and silicon verification program for memories developed for Chartered’s design rules. Under this agreement, Chartered provides us with test chip layout, test plans and test rules to assist in our design of test chips and silicon verification for their manufacturing processes. Chartered pays us royalties based on silicon chips manufactured at Chartered using our memories. In addition, both parties agree to provide technical, marketing and sales support and to introduce customers as appropriate.

     Our agreement with Tower enables the licensing of the CUSTOM-TOUCH ASAP, CUSTOM-TOUCH STAR Memory System and NOVeA family of non-volatile embedded memories on Tower’s 0.18-micron process.

     Our research and development expenses were $13.1 million, $9.6 million and $6.7 million in fiscal 2002, 2001 and 2000, respectively, exclusive of amortization of deferred stock-based compensation. We expect that these costs will increase in the future in order to maintain a leading position as a third-party provider of silicon infrastructure in the form of semiconductor intellectual property. At September 30, 2002, we had 110 employees engaged in research and development. We expect to identify and hire additional technical personnel in fiscal year 2003 to staff our anticipated research and development activities.

Sales and Marketing

     We focus our sales efforts through direct sales in North America, Europe and Asia. In Asia, we also use indirect sales through distributors.

     Direct Sales. We maintain a network of direct sales representatives and field application engineers serving the United States, Asia, Canada and Europe. Substantially all of our direct sales representatives and field application engineers are located in North America, Europe and Japan and serve our customers in those regions. The sales force is distributed throughout North America with employees in the following locations: Austin, Boston, Fremont, Los Angeles, Newark, West Palm Beach and Ottawa. To further expand our international sales, we are continuing to build our direct sales organization in Europe, based in the United Kingdom. This past year, we expanded our European presence in Germany and Israel. We added a direct sales team in Asia to help support our independent distributors, as well as provide direct sales in Japan and the rest of Asia. Our sales force’s primary responsibility is to secure and maintain direct account relationships with fabless semiconductor companies and integrated device manufacturers for the license of our products. Developing a license relationship typically involves a three to six month sales cycle. In the past two years, we have sold our products to more than 150 customers.

     We enter into license agreements with our customers for a range of embedded memory and logic technologies. New license agreements are required for each new process technology generation. For our ASAP memory products, in addition to collecting license fees from the customers, we receive royalties from third-party foundries that manufacture chips for our fabless customers. For our CUSTOM-TOUCH STAR Memory System, NetCAM and NOVeA technologies, we receive both license and royalty fees directly from our customers, as well as royalties from the third-party foundries. Our license agreements contain limited warranties and eliminate our liability for consequential damages.

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     We have developed relationships with the following types of companies that provide us with customer referrals.

	•		Foundries. We have entered into marketing and technology relationships with several third-party foundries including TSMC, UMC, Chartered and Tower. These relationships provide us with early access to new process technologies and endorsements from their direct sales force to our mutual customer base.
	•		EDA Vendors. We have entered into joint marketing relationships with a number of electronic design automation, or EDA vendors. These relationships allow us to validate our interoperability with these EDA vendors’ software design tools.

     Indirect Sales. In addition to the direct sales force, we also sell our technologies through distributors in Japan and the rest of Asia. In Japan, we have entered into a distributor agreement with Seiko Instruments to sell and support our products. We have also entered into a sales representative agreement with Maojet Technology Corporation in Taiwan. These indirect sales organizations have expertise in selling semiconductor intellectual property and software design tools. None of these relationships are exclusive.

Customers

     We have developed a strong customer base of semiconductor companies that use our embedded memories and logic elements to design complex system-on-a-chip devices. Purchasers of our embedded memories and logic elements include fabless semiconductor companies, integrated device manufacturers and third-party foundries. For fabless semiconductor customers, we license our semiconductor IP on either a single or multiple project basis. For integrated device manufacturers, we license our semiconductor IP on a multiple project basis and offer our EMBED-IT! Architect software as an option to develop and maintain their memory intellectual property on the same software platform.

     The following chart provides a representative list of our major customers by customer type.

     We expect a small number of companies to collectively represent between 20% and 40% of our revenues for the next few years. In fiscal 2002 and 2000, no company generated more than 10% of our revenues. In fiscal 2001, Philips Electronics and Intel Corporation generated 12% and 14% of our revenues, respectively. As our customer base grows and the number of fabless semiconductor companies increases, we expect our dependence on any one customer for revenues to decline. However, as our sales to fabless semiconductor companies grow, we will become more dependent on the availability of new manufacturing process technologies and capacity from third-party foundries to manufacture our customers’ products.

Recent Acquisition

     On May 24, 2002, the Company acquired In-Chip Systems, Inc., a provider of logic platforms for system-on-a-chip applications, thereby extending our product offerings for our semiconductor IP platform.

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Proprietary and Intellectual Property

     We rely primarily on a combination of nondisclosure agreements and other contractual provisions, as well as patent, trademark, trade secret and copyright law to protect our proprietary rights. Our general policy has been to seek patent protection for those inventions and improvements likely to be incorporated in our technologies or otherwise expected to be of value. We have an active program to protect our proprietary technology through the filing of patents.

     At October 31, 2002, we had 23 U.S. patents issued, 28 U.S. patent applications on file and five draft applications being prepared for filing with the U.S. Patent and Trademark Office (USPTO). Our patents expire at various dates between 2019 and 2022, and we expect that once granted, the duration of patents covered by patent applications will be 20 years from the filing of the application. These patents will allow us to prevent others from infringing on some of our core technologies. We intend to continue to file patent applications as appropriate in the future. We cannot be sure, however, that our pending patent applications will be allowed, that any issued patents will protect our intellectual property or will not be challenged by third parties, or that the patents of others will not seriously harm our ability to do business. In addition, others may independently develop similar or competing technology or design around any of our patents. We also have not secured patent protection in foreign countries, and we can not be certain that the steps we take to prevent misappropriation of our intellectual property abroad will be effective.

     In addition, at October 31, 2002, we had two U.S. trademarks registered for EMBED-IT! and CUSTOM TOUCH and two pending U.S. trademark applications on file with the USPTO. If the applications mature to registrations, these registrations would allow us to prevent others from using other similar marks on similar goods and services in the U.S. We cannot be sure, however, that the USPTO will issue trademark registrations for any of our pending applications. Further, any trademark rights we hold or may hold in the future may be challenged or may not be of sufficient scope to provide meaningful protection.

     We protect the source code of our technologies as both trade secrets and unpublished copyrighted works. We license the object code to our customers for limited uses and maintain contractual controls over the use of our software, but we may not have the resources to enforce such controls, and such controls may be declared invalid or unenforceable. Wide dissemination of our software makes protection of our proprietary rights difficult, particularly outside the United States, and we may not be able to assert equivalent rights with respect to source code developed by our employees in Armenia as we could if it were developed in the United States.

     We protect our trade secrets and other proprietary information through nondisclosure agreements with our employees and customers and other security measures, although others may still gain access to our trade secrets or discover them independently.

     Although we believe that our technologies do not infringe on any copyright or other proprietary rights of third parties, from time to time, third parties, including our competitors, may assert patent, copyright and other intellectual property rights to technologies that are important to us.

Competition

     The semiconductor IP industry is very competitive and is characterized by constant technological change, rapid rates of technology obsolescence and the emergence of new suppliers. Our primary competition comes from the internal development groups of large integrated device manufacturers that develop semiconductor IP for their own use. In addition, we face competition from other third-party providers of semiconductor IP, such as Artisan Components and Synopsys and certain DRAM memory providers, such as Monolithic System Technology, Inc.

     As we continue to introduce new technologies, we may face competition from both existing semiconductor intellectual property suppliers and new ones entering the market. We may also face competition from semiconductor companies that currently offer stand-alone memory technologies, such as Cypress Semiconductor, Hynix Semiconductor, IDT, Micron Technology and Samsung, if these companies were to make their technologies available in embedded form. In addition, third-party foundries may decide in the future to distribute embedded memories and logic themselves, in addition to manufacturing chips containing third-party embedded memories.

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     We believe that important competitive factors in our market include performance, functionality, customization, length of development cycle, price, compatibility with prevailing design methodologies, interoperability with other devices or subsystems, ease of use, reputation for successful designs and installed base, technical service and support, technical training, configurability of technologies for specific designs and regional sales and technical support.

Employees

     At September 30, 2002, we had 284 employees, including 51 in sales and marketing, 110 in research and development, 109 in engineering operations and 14 in general and administrative functions. 106 of our engineers and other significant employees are located outside of the United States. We believe that our future success will depend in part on our continued ability to attract, hire and retain qualified personnel. None of our employees are represented by a labor union, and we believe our employee relations are good.

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Executive Officers of the Registrant

     The names and ages of our existing executive officers and significant employees at November 15, 2002 are set forth below.

     Adam A. Kablanian co-founded Virage Logic and has served as our President, Chief Executive Officer and as a Director since January 1996. Before founding Virage Logic, Mr. Kablanian was a Department Manager for LSI Logic, a semiconductor integrated device manufacturer, from August 1994 to December 1995 where he was responsible for the embedded memory design division. Before he joined LSI Logic, Mr. Kablanian managed multi-foundry technology transfer programs as an engineering manager at Waferscale Integration, a designer of programmable system devices, from April 1990 to January 1994. Mr. Kablanian holds a B.A. in Physics from the University of California at Berkeley and an M.S. in Electrical Engineering from Santa Clara University.

     Alexander Shubat co-founded Virage Logic and has served as our Vice President of Engineering and Chief Technical Officer and as a Director since January 1996. Before founding Virage Logic, Dr. Shubat served as Director of Engineering at Waferscale Integration from November 1985 to December 1995, where he managed various groups, including design, application-specific integrated circuit and high-speed memory. He holds twelve patents and has contributed to more than 25 publications. Dr. Shubat holds a B.S. and an M.S. in Electrical Engineering from the University of Toronto, Canada and a Ph.D. in Electrical Engineering from Santa Clara University.

     James R. Pekarsky has served as our Vice President of Finance and Chief Financial Officer since May 1999. Before joining Virage Logic, Mr. Pekarsky served as Director, General Manager in several divisions at Mentor Graphics, where he worked from May 1997 to May 1999, including Mentor Graphics’ Emulation Division in Paris, France and Embedded Software Division in San Jose, California. Before joining Mentor Graphics, Mr. Pekarsky served as the Director of Operations of Advanced Molecular Systems, a genetics research company, from December 1995 to May 1997. Before that, he held senior management positions in finance and operations at Sclavo Diagnostics, a clinical diagnostic company in Milan, Italy, and Bio-Rad Laboratories, a life science research company. Mr. Pekarsky holds a B.S. in Accounting from Indiana University of Pennsylvania and an M.B.A. in Finance from Golden Gate University.

     Raymond T. Leung has served as our Vice President of Engineering Operations since August 1998. Before joining Virage Logic, Mr. Leung was Senior Director of Mixed Signal Development at LSI Logic where he worked from June 1989 to August 1998. He also managed the embedded memory development group at LSI Logic and holds two patents on memory design techniques. Mr. Leung holds a B.S. in Electrical Engineering from Columbia University and an M.S. in Electrical Engineering from Stanford University.

     Raj Singh has served as our Vice President of Worldwide Sales since March 2002. Before joining Virage Logic, Mr. Singh was Vice President of Worldwide Sales and, most recently, Executive Vice President and General Manager at 3Dlabs where he worked from April 1994 to March 2002. From February 1998 to March 1994, Mr. Singh held various positions with Dupont including Business Manager and Vice President of its Dupont Pixel

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operation. Mr. Singh holds a B.A. and an M.A. in English literature from Kings College, Aberdeen University of Scotland.

     Yervant Zorian served as a Director from November 1997 to March 2001 and joined our management team as Vice President and Chief Scientist in May 2000. From November 1996 to June 2000, Dr. Zorian served as Chief Technical Advisor of LogicVision. Before that he served as a Distinguished Member of the Technical Staff at Lucent Technologies, Bell Laboratories. Since August 2000, Dr. Zorian has served as a board member of HPL Technologies, Inc. Dr. Zorian holds a B.S. in Electrical Engineering from the University of Aleppo in Syria, an M.Sc. in Computer Engineering from the University of Southern California and a Ph.D. in Electrical Engineering from McGill University.

     William J. Palumbo has served as our Vice President and General Manager of New Jersey Operations since July 1999. Before joining Virage Logic, Mr. Palumbo served as Director of the Physical Library Division for Mentor Graphics from October 1990 to July 1999. Before joining Mentor Graphics, Mr. Palumbo worked in various management positions at RCA, General Electric and Harris Semiconductor from December 1983 to September 1990. Mr. Palumbo holds one U.S. patent and has published numerous articles in technical and business forums. Mr. Palumbo holds a B.S. in Electrical Engineering from Rutgers University.

     Kenneth V. Rousseau has served as our Vice President of Software Development since February 2000. Before joining Virage Logic, Dr. Rousseau was Director of New Product Management at Synopsys, Inc., a supplier of electronic design automation tools. Before joining Synopsys, he held various positions at Cascade Design Automation, another supplier of electronic design automation tools, including Chief Technologist from August 1996 to December 1996, Vice President, Engineering from August 1994 to August 1996, Manager, Design Technologies from June 1993 to August 1994 and Engineering Fellow from January 1993 to June 1993. He also worked in the aerospace industry at Hughes Aircraft and TRW Electronics and Defense, as well as several semiconductor companies including GigaBit Logic and Vitesse. Dr. Rousseau holds a B.S. in Physics and Literature and an M.S. in Applied Physics from the California Institute of Technology and a Ph.D. in Electrical Engineering from UCLA.

     Alok Singh has served as our Vice President and General Manager of India Operations since September 1997. Before joining Virage Logic, Mr. Singh served as Director of Design Automation from November 1996 to August 1997 and Manager, Design Automation from April 1990 to October 1996 at Waferscale Integration. Mr. Singh holds a B.S. in Electrical Engineering from the University of Glasgow, Scotland.

Item 2. Properties

Facilities

     In October 2002, our principal administrative, sales, marketing and research and development facility moved to a new building in Fremont, California and occupies approximately 61,500 square feet. This facility is leased through August 2004. We also lease additional offices in Bellevue, Washington and Clinton, New Jersey that are occupied mainly by research and development and engineering operations personnel. The Bellevue office, which occupies approximately 4,100 square feet, is leased through March 2004. The Clinton office, which occupies approximately 10,900 square feet, is leased through August 2003. In addition, we have development centers in the Republic of Armenia and India. The development center in the Republic of Armenia is located in Yerevan and occupies approximately 4,300 square feet in a building leased through July 2005. The development center in India is located in Noida, near Delhi, and occupies approximately 26,000 square feet in a building leased through July 2004.

     In August 2002, we signed a purchase agreement to purchase a building to house our development center in Armenia for $1.2 million. Total cost of the building and leasehold improvements is expected to be approximately $1.5 million. The office space is approximately 40,000 square feet. It is currently under construction and is expected to be complete and operational in the fiscal third quarter 2003.

Item 3. Legal Proceedings

     Dr. Tushar Gheewala, a Vice President of Virage Logic, resigned from his position with the company effective November 8, 2002. On November 12, 2002, Dr. Gheewala filed a lawsuit against the company in the Superior Court in Alameda County, which was subsequently served on the company. The lawsuit claims that misrepresentations were made to him to secure his agreement to the acquisition of In-Chip Systems, Inc. (In-Chip) by the company, that the company breached his employment contract and related covenants, and that the company’s actions caused him to have In-Chip cease discussions with other potential acquisition partners. In the lawsuit, Dr. Gheewala is seeking declaratory relief, rescission of his employment agreement with the company, the monetary value of patents Dr. Gheewala assigned to In-Chip prior to In-Chip’s discussions with Virage Logic, the value of unvested shares and salary payments, punitive damages, interest and costs of suit. The company believes that the lawsuit has no merit and intends to defend it vigorously.

Item 4. Submission of Matters to a Vote of Security Holders

     None

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PART II

Item 5. Market for Registrant’s Common Equity and Related Stockholder Matters.

Market Price and Dividends on Virage Logic Common Stock

     Virage Logic Corporation’s common stock is traded on the Nasdaq National Market under the symbol “VIRL” since our initial public offering on August 1, 2000. The following table sets forth, for the periods indicated, the high and low closing prices for the common stock as reported on the Nasdaq National Market.

     As of November 30, 2002, there were approximately 117 stockholders of record of our common stock.

     We have never paid or declared any cash dividends on our common stock or other securities and do not anticipate paying cash dividends in the foreseeable future.

Equity Compensation Plan Information

     The equity compensation plan information required to be provided in this Annual Report on Form 10-K is incorporated by reference to the Company's proxy statement for the 2003 Annual Meeting of Stockholders to be filed with the Securities and Exchange Commission within 120 days after the end of our fiscal year ended September 30, 2002.

Recent Sales of Unregistered Securities

     On May 24, 2002, we acquired In-Chip Systems, Inc., a California corporation. In connection with this acquisition, we issued a total of 528,547 shares of common stock to the In-Chip shareholders and assumed options to purchase up to 150,991 shares of common stock that may be issued upon exercise of outstanding In-Chip stock options. No underwriters were employed in connection with this offering. The offering was exempt from the registration requirements under the Securities Act of 1933 in reliance on Rule 506, promulgated under the Securities Act of 1933.

Use of Proceeds From Registered Securities

     Our registration statement (No. 333-36108) under the Securities and Exchange Act of 1933 for our initial public offering of common stock became effective on July 31, 2000. We sold a total of 4,312,500 shares of common stock to an underwriting syndicate for an aggregate offering price to the public of $51,750,000. The managing underwriters were Lehman Brothers Inc., FleetBoston Robertson Stephens Inc. and SG Cowen Securities Corporation. 3,750,000 of these shares were sold in an offering that commenced on July 31, 2000 and was completed on August 4, 2000. An additional 562,500 shares of common stock were sold upon the underwriters’ exercise of their over-allotment option on August 28, 2000. In connection with this offering, we incurred total expenses of approximately $5.4 million, consisting of $3.6 million for underwriting discounts and commissions and approximately $1.8 million of other expenses. None of these expenses were paid directly or indirectly to any of our directors, officers, or their associates, persons owning 10% or more of any class of our securities, or affiliates of Virage Logic. Offering proceeds, net of aggregate expenses were approximately $46.3 million. We used $13.1 million and $9.6 million, in fiscal 2002 and 2001, respectively, for research and development primarily related to the hiring of additional personnel, and $11.5 million and $8.3 million, in fiscal 2002 and 2001, respectively, of the

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offering proceeds for sales and marketing primarily related to additional personnel and increased expenditures on advertising and promotions. We have applied the remaining proceeds to temporary investments in a commercial money market investment account, short-term government and mortgage-backed securities.

Item 6. Selected Consolidated Financial Data.

     The selected consolidated financial data set forth below should be read together with “Management’s Discussion and Analysis of Financial Condition and Results of Operations” and our consolidated financial statements and the notes thereto included elsewhere in this filing. The consolidated statement of operations data for each of the fiscal years ended September 30, 2002, 2001 and 2000 and the consolidated balance sheet data at September 30, 2002 and 2001 have been derived from our audited consolidated financial statements included elsewhere in this filing. The consolidated statement of operations data for the fiscal years ended September 30, 1999 and 1998 and the consolidated balance sheet data at September 30, 2000, 1999 and 1998 have been derived from our audited consolidated financial statements not included in this filing. The historical financial information may not be an accurate indicator of our future performance.

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SELECTED CONSOLIDATED FINANCIAL DATA